1 /* 2 * Copyright 2018 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 #include "amdgpu.h" 24 #include "gfxhub_v1_0.h" 25 #include "gfxhub_v1_1.h" 26 27 #include "gc/gc_9_2_1_offset.h" 28 #include "gc/gc_9_2_1_sh_mask.h" 29 30 #include "soc15_common.h" 31 32 static int gfxhub_v1_1_get_xgmi_info(struct amdgpu_device *adev) 33 { 34 u32 xgmi_lfb_cntl = RREG32_SOC15(GC, 0, mmMC_VM_XGMI_LFB_CNTL); 35 u32 max_region = 36 REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL, PF_MAX_REGION); 37 u32 max_num_physical_nodes = 0; 38 u32 max_physical_node_id = 0; 39 40 switch (adev->asic_type) { 41 case CHIP_VEGA20: 42 max_num_physical_nodes = 4; 43 max_physical_node_id = 3; 44 break; 45 case CHIP_ARCTURUS: 46 max_num_physical_nodes = 8; 47 max_physical_node_id = 7; 48 break; 49 default: 50 return -EINVAL; 51 } 52 53 /* PF_MAX_REGION=0 means xgmi is disabled */ 54 if (max_region) { 55 adev->gmc.xgmi.num_physical_nodes = max_region + 1; 56 if (adev->gmc.xgmi.num_physical_nodes > max_num_physical_nodes) 57 return -EINVAL; 58 59 adev->gmc.xgmi.physical_node_id = 60 REG_GET_FIELD(xgmi_lfb_cntl, MC_VM_XGMI_LFB_CNTL, PF_LFB_REGION); 61 if (adev->gmc.xgmi.physical_node_id > max_physical_node_id) 62 return -EINVAL; 63 adev->gmc.xgmi.node_segment_size = REG_GET_FIELD( 64 RREG32_SOC15(GC, 0, mmMC_VM_XGMI_LFB_SIZE), 65 MC_VM_XGMI_LFB_SIZE, PF_LFB_SIZE) << 24; 66 } 67 68 return 0; 69 } 70 71 const struct amdgpu_gfxhub_funcs gfxhub_v1_1_funcs = { 72 .get_mc_fb_offset = gfxhub_v1_0_get_mc_fb_offset, 73 .setup_vm_pt_regs = gfxhub_v1_0_setup_vm_pt_regs, 74 .gart_enable = gfxhub_v1_0_gart_enable, 75 .gart_disable = gfxhub_v1_0_gart_disable, 76 .set_fault_enable_default = gfxhub_v1_0_set_fault_enable_default, 77 .init = gfxhub_v1_0_init, 78 .get_xgmi_info = gfxhub_v1_1_get_xgmi_info, 79 }; 80