1 /*
2  * Copyright 2018-2019 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23 
24 #ifndef AMDGV_SRIOV_MSG__H_
25 #define AMDGV_SRIOV_MSG__H_
26 
27 /* unit in kilobytes */
28 #define AMD_SRIOV_MSG_VBIOS_OFFSET              0
29 #define AMD_SRIOV_MSG_VBIOS_SIZE_KB             64
30 #define AMD_SRIOV_MSG_DATAEXCHANGE_OFFSET_KB    AMD_SRIOV_MSG_VBIOS_SIZE_KB
31 #define AMD_SRIOV_MSG_DATAEXCHANGE_SIZE_KB      4
32 
33 /*
34  * layout
35  * 0           64KB        65KB        66KB
36  * |   VBIOS   |   PF2VF   |   VF2PF   |   Bad Page   | ...
37  * |   64KB    |   1KB     |   1KB     |
38  */
39 #define AMD_SRIOV_MSG_SIZE_KB                   1
40 #define AMD_SRIOV_MSG_PF2VF_OFFSET_KB           AMD_SRIOV_MSG_DATAEXCHANGE_OFFSET_KB
41 #define AMD_SRIOV_MSG_VF2PF_OFFSET_KB           (AMD_SRIOV_MSG_PF2VF_OFFSET_KB + AMD_SRIOV_MSG_SIZE_KB)
42 #define AMD_SRIOV_MSG_BAD_PAGE_OFFSET_KB        (AMD_SRIOV_MSG_VF2PF_OFFSET_KB + AMD_SRIOV_MSG_SIZE_KB)
43 
44 /*
45  * PF2VF history log:
46  * v1 defined in amdgim
47  * v2 current
48  *
49  * VF2PF history log:
50  * v1 defined in amdgim
51  * v2 defined in amdgim
52  * v3 current
53  */
54 #define AMD_SRIOV_MSG_FW_VRAM_PF2VF_VER			2
55 #define AMD_SRIOV_MSG_FW_VRAM_VF2PF_VER			3
56 
57 #define AMD_SRIOV_MSG_RESERVE_UCODE		24
58 
59 enum amd_sriov_ucode_engine_id {
60 	AMD_SRIOV_UCODE_ID_VCE = 0,
61 	AMD_SRIOV_UCODE_ID_UVD,
62 	AMD_SRIOV_UCODE_ID_MC,
63 	AMD_SRIOV_UCODE_ID_ME,
64 	AMD_SRIOV_UCODE_ID_PFP,
65 	AMD_SRIOV_UCODE_ID_CE,
66 	AMD_SRIOV_UCODE_ID_RLC,
67 	AMD_SRIOV_UCODE_ID_RLC_SRLC,
68 	AMD_SRIOV_UCODE_ID_RLC_SRLG,
69 	AMD_SRIOV_UCODE_ID_RLC_SRLS,
70 	AMD_SRIOV_UCODE_ID_MEC,
71 	AMD_SRIOV_UCODE_ID_MEC2,
72 	AMD_SRIOV_UCODE_ID_SOS,
73 	AMD_SRIOV_UCODE_ID_ASD,
74 	AMD_SRIOV_UCODE_ID_TA_RAS,
75 	AMD_SRIOV_UCODE_ID_TA_XGMI,
76 	AMD_SRIOV_UCODE_ID_SMC,
77 	AMD_SRIOV_UCODE_ID_SDMA,
78 	AMD_SRIOV_UCODE_ID_SDMA2,
79 	AMD_SRIOV_UCODE_ID_VCN,
80 	AMD_SRIOV_UCODE_ID_DMCU,
81 	AMD_SRIOV_UCODE_ID__MAX
82 };
83 
84 #pragma pack(push, 1) 	// PF2VF / VF2PF data areas are byte packed
85 
86 union amd_sriov_msg_feature_flags {
87 	struct {
88 		uint32_t  error_log_collect  : 1;
89 		uint32_t  host_load_ucodes   : 1;
90 		uint32_t  host_flr_vramlost  : 1;
91 		uint32_t  mm_bw_management   : 1;
92 		uint32_t  pp_one_vf_mode     : 1;
93 		uint32_t  reserved           : 27;
94 	} flags;
95 	uint32_t      all;
96 };
97 
98 union amd_sriov_msg_os_info {
99 	struct {
100 		uint32_t  windows            : 1;
101 		uint32_t  reserved           : 31;
102 	} info;
103 	uint32_t      all;
104 };
105 
106 struct amd_sriov_msg_pf2vf_info_header {
107 	/* the total structure size in byte */
108 	uint32_t size;
109 	/* version of this structure, written by the HOST */
110 	uint32_t version;
111 	/* reserved */
112 	uint32_t reserved[2];
113 };
114 
115 struct amd_sriov_msg_pf2vf_info {
116 	/* header contains size and version */
117 	struct amd_sriov_msg_pf2vf_info_header header;
118 	/* use private key from mailbox 2 to create checksum */
119 	uint32_t checksum;
120 	/* The features flags of the HOST driver supports */
121 	union amd_sriov_msg_feature_flags feature_flags;
122 	/* (max_width * max_height * fps) / (16 * 16) */
123 	uint32_t hevc_enc_max_mb_per_second;
124 	/* (max_width * max_height) / (16 * 16) */
125 	uint32_t hevc_enc_max_mb_per_frame;
126 	/* (max_width * max_height * fps) / (16 * 16) */
127 	uint32_t avc_enc_max_mb_per_second;
128 	/* (max_width * max_height) / (16 * 16) */
129 	uint32_t avc_enc_max_mb_per_frame;
130 	/* MEC FW position in BYTE from the start of VF visible frame buffer */
131 	uint64_t mecfw_offset;
132 	/* MEC FW size in BYTE */
133 	uint32_t mecfw_size;
134 	/* UVD FW position in BYTE from the start of VF visible frame buffer */
135 	uint64_t uvdfw_offset;
136 	/* UVD FW size in BYTE */
137 	uint32_t uvdfw_size;
138 	/* VCE FW position in BYTE from the start of VF visible frame buffer */
139 	uint64_t vcefw_offset;
140 	/* VCE FW size in BYTE */
141 	uint32_t vcefw_size;
142 	/* Bad pages block position in BYTE */
143 	uint32_t bp_block_offset_low;
144 	uint32_t bp_block_offset_high;
145 	/* Bad pages block size in BYTE */
146 	uint32_t bp_block_size;
147 	/* frequency for VF to update the VF2PF area in msec, 0 = manual */
148 	uint32_t vf2pf_update_interval_ms;
149 	/* identification in ROCm SMI */
150 	uint64_t uuid;
151 	uint32_t fcn_idx;
152 	/* reserved */
153 	uint32_t reserved[256-26];
154 };
155 
156 struct amd_sriov_msg_vf2pf_info_header {
157 	/* the total structure size in byte */
158 	uint32_t size;
159 	/* version of this structure, written by the guest */
160 	uint32_t version;
161 	/* reserved */
162 	uint32_t reserved[2];
163 };
164 
165 struct amd_sriov_msg_vf2pf_info {
166 	/* header contains size and version */
167 	struct amd_sriov_msg_vf2pf_info_header header;
168 	uint32_t checksum;
169 	/* driver version */
170 	uint8_t  driver_version[64];
171 	/* driver certification, 1=WHQL, 0=None */
172 	uint32_t driver_cert;
173 	/* guest OS type and version */
174 	union amd_sriov_msg_os_info os_info;
175 	/* guest fb information in the unit of MB */
176 	uint32_t fb_usage;
177 	/* guest gfx engine usage percentage */
178 	uint32_t gfx_usage;
179 	/* guest gfx engine health percentage */
180 	uint32_t gfx_health;
181 	/* guest compute engine usage percentage */
182 	uint32_t compute_usage;
183 	/* guest compute engine health percentage */
184 	uint32_t compute_health;
185 	/* guest avc engine usage percentage. 0xffff means N/A */
186 	uint32_t avc_enc_usage;
187 	/* guest avc engine health percentage. 0xffff means N/A */
188 	uint32_t avc_enc_health;
189 	/* guest hevc engine usage percentage. 0xffff means N/A */
190 	uint32_t hevc_enc_usage;
191 	/* guest hevc engine usage percentage. 0xffff means N/A */
192 	uint32_t hevc_enc_health;
193 	/* combined encode/decode usage */
194 	uint32_t encode_usage;
195 	uint32_t decode_usage;
196 	/* Version of PF2VF that VF understands */
197 	uint32_t pf2vf_version_required;
198 	/* additional FB usage */
199 	uint32_t fb_vis_usage;
200 	uint32_t fb_vis_size;
201 	uint32_t fb_size;
202 	/* guest ucode data, each one is 1.25 Dword */
203 	struct {
204 		uint8_t  id;
205 		uint32_t version;
206 	} ucode_info[AMD_SRIOV_MSG_RESERVE_UCODE];
207 
208 	/* reserved */
209 	uint32_t reserved[256-68];
210 };
211 
212 /* mailbox message send from guest to host  */
213 enum amd_sriov_mailbox_request_message {
214 	MB_REQ_MSG_REQ_GPU_INIT_ACCESS = 1,
215 	MB_REQ_MSG_REL_GPU_INIT_ACCESS,
216 	MB_REQ_MSG_REQ_GPU_FINI_ACCESS,
217 	MB_REQ_MSG_REL_GPU_FINI_ACCESS,
218 	MB_REQ_MSG_REQ_GPU_RESET_ACCESS,
219 	MB_REQ_MSG_REQ_GPU_INIT_DATA,
220 
221 	MB_REQ_MSG_LOG_VF_ERROR       = 200,
222 };
223 
224 /* mailbox message send from host to guest  */
225 enum amd_sriov_mailbox_response_message {
226 	MB_RES_MSG_CLR_MSG_BUF = 0,
227 	MB_RES_MSG_READY_TO_ACCESS_GPU = 1,
228 	MB_RES_MSG_FLR_NOTIFICATION,
229 	MB_RES_MSG_FLR_NOTIFICATION_COMPLETION,
230 	MB_RES_MSG_SUCCESS,
231 	MB_RES_MSG_FAIL,
232 	MB_RES_MSG_QUERY_ALIVE,
233 	MB_RES_MSG_GPU_INIT_DATA_READY,
234 
235 	MB_RES_MSG_TEXT_MESSAGE = 255
236 };
237 
238 /* version data stored in MAILBOX_MSGBUF_RCV_DW1 for future expansion */
239 enum amd_sriov_gpu_init_data_version {
240 	GPU_INIT_DATA_READY_V1 = 1,
241 };
242 
243 #pragma pack(pop)	// Restore previous packing option
244 
245 /* checksum function between host and guest */
246 unsigned int amd_sriov_msg_checksum(void *obj,
247 				unsigned long obj_size,
248 				unsigned int key,
249 				unsigned int checksum);
250 
251 /* assertion at compile time */
252 #ifdef __linux__
253 #define stringification(s) _stringification(s)
254 #define _stringification(s) #s
255 
256 _Static_assert(
257 	sizeof(struct amd_sriov_msg_vf2pf_info) == AMD_SRIOV_MSG_SIZE_KB << 10,
258 	"amd_sriov_msg_vf2pf_info must be " stringification(AMD_SRIOV_MSG_SIZE_KB) " KB");
259 
260 _Static_assert(
261 	sizeof(struct amd_sriov_msg_pf2vf_info) == AMD_SRIOV_MSG_SIZE_KB << 10,
262 	"amd_sriov_msg_pf2vf_info must be " stringification(AMD_SRIOV_MSG_SIZE_KB) " KB");
263 
264 _Static_assert(
265 	AMD_SRIOV_MSG_RESERVE_UCODE % 4 == 0,
266 	"AMD_SRIOV_MSG_RESERVE_UCODE must be multiple of 4");
267 
268 _Static_assert(
269 	AMD_SRIOV_MSG_RESERVE_UCODE > AMD_SRIOV_UCODE_ID__MAX,
270 	"AMD_SRIOV_MSG_RESERVE_UCODE must be bigger than AMD_SRIOV_UCODE_ID__MAX");
271 
272 #undef _stringification
273 #undef stringification
274 #endif
275 
276 #endif /* AMDGV_SRIOV_MSG__H_ */
277