1 /* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Christian König 23 */ 24 25 #include <linux/dma-mapping.h> 26 #include "amdgpu.h" 27 #include "amdgpu_vm.h" 28 #include "amdgpu_atomfirmware.h" 29 #include "atom.h" 30 31 static inline struct amdgpu_vram_mgr *to_vram_mgr(struct ttm_resource_manager *man) 32 { 33 return container_of(man, struct amdgpu_vram_mgr, manager); 34 } 35 36 static inline struct amdgpu_device *to_amdgpu_device(struct amdgpu_vram_mgr *mgr) 37 { 38 return container_of(mgr, struct amdgpu_device, mman.vram_mgr); 39 } 40 41 /** 42 * DOC: mem_info_vram_total 43 * 44 * The amdgpu driver provides a sysfs API for reporting current total VRAM 45 * available on the device 46 * The file mem_info_vram_total is used for this and returns the total 47 * amount of VRAM in bytes 48 */ 49 static ssize_t amdgpu_mem_info_vram_total_show(struct device *dev, 50 struct device_attribute *attr, char *buf) 51 { 52 struct drm_device *ddev = dev_get_drvdata(dev); 53 struct amdgpu_device *adev = ddev->dev_private; 54 55 return snprintf(buf, PAGE_SIZE, "%llu\n", adev->gmc.real_vram_size); 56 } 57 58 /** 59 * DOC: mem_info_vis_vram_total 60 * 61 * The amdgpu driver provides a sysfs API for reporting current total 62 * visible VRAM available on the device 63 * The file mem_info_vis_vram_total is used for this and returns the total 64 * amount of visible VRAM in bytes 65 */ 66 static ssize_t amdgpu_mem_info_vis_vram_total_show(struct device *dev, 67 struct device_attribute *attr, char *buf) 68 { 69 struct drm_device *ddev = dev_get_drvdata(dev); 70 struct amdgpu_device *adev = ddev->dev_private; 71 72 return snprintf(buf, PAGE_SIZE, "%llu\n", adev->gmc.visible_vram_size); 73 } 74 75 /** 76 * DOC: mem_info_vram_used 77 * 78 * The amdgpu driver provides a sysfs API for reporting current total VRAM 79 * available on the device 80 * The file mem_info_vram_used is used for this and returns the total 81 * amount of currently used VRAM in bytes 82 */ 83 static ssize_t amdgpu_mem_info_vram_used_show(struct device *dev, 84 struct device_attribute *attr, char *buf) 85 { 86 struct drm_device *ddev = dev_get_drvdata(dev); 87 struct amdgpu_device *adev = ddev->dev_private; 88 struct ttm_resource_manager *man = ttm_manager_type(&adev->mman.bdev, TTM_PL_VRAM); 89 return snprintf(buf, PAGE_SIZE, "%llu\n", 90 amdgpu_vram_mgr_usage(man)); 91 } 92 93 /** 94 * DOC: mem_info_vis_vram_used 95 * 96 * The amdgpu driver provides a sysfs API for reporting current total of 97 * used visible VRAM 98 * The file mem_info_vis_vram_used is used for this and returns the total 99 * amount of currently used visible VRAM in bytes 100 */ 101 static ssize_t amdgpu_mem_info_vis_vram_used_show(struct device *dev, 102 struct device_attribute *attr, char *buf) 103 { 104 struct drm_device *ddev = dev_get_drvdata(dev); 105 struct amdgpu_device *adev = ddev->dev_private; 106 struct ttm_resource_manager *man = ttm_manager_type(&adev->mman.bdev, TTM_PL_VRAM); 107 return snprintf(buf, PAGE_SIZE, "%llu\n", 108 amdgpu_vram_mgr_vis_usage(man)); 109 } 110 111 static ssize_t amdgpu_mem_info_vram_vendor(struct device *dev, 112 struct device_attribute *attr, 113 char *buf) 114 { 115 struct drm_device *ddev = dev_get_drvdata(dev); 116 struct amdgpu_device *adev = ddev->dev_private; 117 118 switch (adev->gmc.vram_vendor) { 119 case SAMSUNG: 120 return snprintf(buf, PAGE_SIZE, "samsung\n"); 121 case INFINEON: 122 return snprintf(buf, PAGE_SIZE, "infineon\n"); 123 case ELPIDA: 124 return snprintf(buf, PAGE_SIZE, "elpida\n"); 125 case ETRON: 126 return snprintf(buf, PAGE_SIZE, "etron\n"); 127 case NANYA: 128 return snprintf(buf, PAGE_SIZE, "nanya\n"); 129 case HYNIX: 130 return snprintf(buf, PAGE_SIZE, "hynix\n"); 131 case MOSEL: 132 return snprintf(buf, PAGE_SIZE, "mosel\n"); 133 case WINBOND: 134 return snprintf(buf, PAGE_SIZE, "winbond\n"); 135 case ESMT: 136 return snprintf(buf, PAGE_SIZE, "esmt\n"); 137 case MICRON: 138 return snprintf(buf, PAGE_SIZE, "micron\n"); 139 default: 140 return snprintf(buf, PAGE_SIZE, "unknown\n"); 141 } 142 } 143 144 static DEVICE_ATTR(mem_info_vram_total, S_IRUGO, 145 amdgpu_mem_info_vram_total_show, NULL); 146 static DEVICE_ATTR(mem_info_vis_vram_total, S_IRUGO, 147 amdgpu_mem_info_vis_vram_total_show,NULL); 148 static DEVICE_ATTR(mem_info_vram_used, S_IRUGO, 149 amdgpu_mem_info_vram_used_show, NULL); 150 static DEVICE_ATTR(mem_info_vis_vram_used, S_IRUGO, 151 amdgpu_mem_info_vis_vram_used_show, NULL); 152 static DEVICE_ATTR(mem_info_vram_vendor, S_IRUGO, 153 amdgpu_mem_info_vram_vendor, NULL); 154 155 static const struct attribute *amdgpu_vram_mgr_attributes[] = { 156 &dev_attr_mem_info_vram_total.attr, 157 &dev_attr_mem_info_vis_vram_total.attr, 158 &dev_attr_mem_info_vram_used.attr, 159 &dev_attr_mem_info_vis_vram_used.attr, 160 &dev_attr_mem_info_vram_vendor.attr, 161 NULL 162 }; 163 164 static const struct ttm_resource_manager_func amdgpu_vram_mgr_func; 165 166 /** 167 * amdgpu_vram_mgr_init - init VRAM manager and DRM MM 168 * 169 * @man: TTM memory type manager 170 * @p_size: maximum size of VRAM 171 * 172 * Allocate and initialize the VRAM manager. 173 */ 174 int amdgpu_vram_mgr_init(struct amdgpu_device *adev) 175 { 176 struct amdgpu_vram_mgr *mgr = &adev->mman.vram_mgr; 177 struct ttm_resource_manager *man = &mgr->manager; 178 int ret; 179 180 man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC; 181 man->default_caching = TTM_PL_FLAG_WC; 182 183 ttm_resource_manager_init(man, adev->gmc.real_vram_size >> PAGE_SHIFT); 184 185 man->func = &amdgpu_vram_mgr_func; 186 187 drm_mm_init(&mgr->mm, 0, man->size); 188 spin_lock_init(&mgr->lock); 189 190 /* Add the two VRAM-related sysfs files */ 191 ret = sysfs_create_files(&adev->dev->kobj, amdgpu_vram_mgr_attributes); 192 if (ret) 193 DRM_ERROR("Failed to register sysfs\n"); 194 195 ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_VRAM, &mgr->manager); 196 ttm_resource_manager_set_used(man, true); 197 return 0; 198 } 199 200 /** 201 * amdgpu_vram_mgr_fini - free and destroy VRAM manager 202 * 203 * @man: TTM memory type manager 204 * 205 * Destroy and free the VRAM manager, returns -EBUSY if ranges are still 206 * allocated inside it. 207 */ 208 void amdgpu_vram_mgr_fini(struct amdgpu_device *adev) 209 { 210 struct amdgpu_vram_mgr *mgr = &adev->mman.vram_mgr; 211 struct ttm_resource_manager *man = &mgr->manager; 212 int ret; 213 214 ttm_resource_manager_set_used(man, false); 215 216 ret = ttm_resource_manager_force_list_clean(&adev->mman.bdev, man); 217 if (ret) 218 return; 219 220 spin_lock(&mgr->lock); 221 drm_mm_takedown(&mgr->mm); 222 spin_unlock(&mgr->lock); 223 224 sysfs_remove_files(&adev->dev->kobj, amdgpu_vram_mgr_attributes); 225 226 ttm_resource_manager_cleanup(man); 227 ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_VRAM, NULL); 228 } 229 230 /** 231 * amdgpu_vram_mgr_vis_size - Calculate visible node size 232 * 233 * @adev: amdgpu device structure 234 * @node: MM node structure 235 * 236 * Calculate how many bytes of the MM node are inside visible VRAM 237 */ 238 static u64 amdgpu_vram_mgr_vis_size(struct amdgpu_device *adev, 239 struct drm_mm_node *node) 240 { 241 uint64_t start = node->start << PAGE_SHIFT; 242 uint64_t end = (node->size + node->start) << PAGE_SHIFT; 243 244 if (start >= adev->gmc.visible_vram_size) 245 return 0; 246 247 return (end > adev->gmc.visible_vram_size ? 248 adev->gmc.visible_vram_size : end) - start; 249 } 250 251 /** 252 * amdgpu_vram_mgr_bo_visible_size - CPU visible BO size 253 * 254 * @bo: &amdgpu_bo buffer object (must be in VRAM) 255 * 256 * Returns: 257 * How much of the given &amdgpu_bo buffer object lies in CPU visible VRAM. 258 */ 259 u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo) 260 { 261 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); 262 struct ttm_resource *mem = &bo->tbo.mem; 263 struct drm_mm_node *nodes = mem->mm_node; 264 unsigned pages = mem->num_pages; 265 u64 usage; 266 267 if (amdgpu_gmc_vram_full_visible(&adev->gmc)) 268 return amdgpu_bo_size(bo); 269 270 if (mem->start >= adev->gmc.visible_vram_size >> PAGE_SHIFT) 271 return 0; 272 273 for (usage = 0; nodes && pages; pages -= nodes->size, nodes++) 274 usage += amdgpu_vram_mgr_vis_size(adev, nodes); 275 276 return usage; 277 } 278 279 /** 280 * amdgpu_vram_mgr_virt_start - update virtual start address 281 * 282 * @mem: ttm_resource to update 283 * @node: just allocated node 284 * 285 * Calculate a virtual BO start address to easily check if everything is CPU 286 * accessible. 287 */ 288 static void amdgpu_vram_mgr_virt_start(struct ttm_resource *mem, 289 struct drm_mm_node *node) 290 { 291 unsigned long start; 292 293 start = node->start + node->size; 294 if (start > mem->num_pages) 295 start -= mem->num_pages; 296 else 297 start = 0; 298 mem->start = max(mem->start, start); 299 } 300 301 /** 302 * amdgpu_vram_mgr_new - allocate new ranges 303 * 304 * @man: TTM memory type manager 305 * @tbo: TTM BO we need this range for 306 * @place: placement flags and restrictions 307 * @mem: the resulting mem object 308 * 309 * Allocate VRAM for the given BO. 310 */ 311 static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man, 312 struct ttm_buffer_object *tbo, 313 const struct ttm_place *place, 314 struct ttm_resource *mem) 315 { 316 struct amdgpu_vram_mgr *mgr = to_vram_mgr(man); 317 struct amdgpu_device *adev = to_amdgpu_device(mgr); 318 struct drm_mm *mm = &mgr->mm; 319 struct drm_mm_node *nodes; 320 enum drm_mm_insert_mode mode; 321 unsigned long lpfn, num_nodes, pages_per_node, pages_left; 322 uint64_t vis_usage = 0, mem_bytes, max_bytes; 323 unsigned i; 324 int r; 325 326 lpfn = place->lpfn; 327 if (!lpfn) 328 lpfn = man->size; 329 330 max_bytes = adev->gmc.mc_vram_size; 331 if (tbo->type != ttm_bo_type_kernel) 332 max_bytes -= AMDGPU_VM_RESERVED_VRAM; 333 334 /* bail out quickly if there's likely not enough VRAM for this BO */ 335 mem_bytes = (u64)mem->num_pages << PAGE_SHIFT; 336 if (atomic64_add_return(mem_bytes, &mgr->usage) > max_bytes) { 337 atomic64_sub(mem_bytes, &mgr->usage); 338 return -ENOSPC; 339 } 340 341 if (place->flags & TTM_PL_FLAG_CONTIGUOUS) { 342 pages_per_node = ~0ul; 343 num_nodes = 1; 344 } else { 345 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 346 pages_per_node = HPAGE_PMD_NR; 347 #else 348 /* default to 2MB */ 349 pages_per_node = (2UL << (20UL - PAGE_SHIFT)); 350 #endif 351 pages_per_node = max((uint32_t)pages_per_node, mem->page_alignment); 352 num_nodes = DIV_ROUND_UP(mem->num_pages, pages_per_node); 353 } 354 355 nodes = kvmalloc_array((uint32_t)num_nodes, sizeof(*nodes), 356 GFP_KERNEL | __GFP_ZERO); 357 if (!nodes) { 358 atomic64_sub(mem_bytes, &mgr->usage); 359 return -ENOMEM; 360 } 361 362 mode = DRM_MM_INSERT_BEST; 363 if (place->flags & TTM_PL_FLAG_TOPDOWN) 364 mode = DRM_MM_INSERT_HIGH; 365 366 mem->start = 0; 367 pages_left = mem->num_pages; 368 369 spin_lock(&mgr->lock); 370 for (i = 0; pages_left >= pages_per_node; ++i) { 371 unsigned long pages = rounddown_pow_of_two(pages_left); 372 373 r = drm_mm_insert_node_in_range(mm, &nodes[i], pages, 374 pages_per_node, 0, 375 place->fpfn, lpfn, 376 mode); 377 if (unlikely(r)) 378 break; 379 380 vis_usage += amdgpu_vram_mgr_vis_size(adev, &nodes[i]); 381 amdgpu_vram_mgr_virt_start(mem, &nodes[i]); 382 pages_left -= pages; 383 } 384 385 for (; pages_left; ++i) { 386 unsigned long pages = min(pages_left, pages_per_node); 387 uint32_t alignment = mem->page_alignment; 388 389 if (pages == pages_per_node) 390 alignment = pages_per_node; 391 392 r = drm_mm_insert_node_in_range(mm, &nodes[i], 393 pages, alignment, 0, 394 place->fpfn, lpfn, 395 mode); 396 if (unlikely(r)) 397 goto error; 398 399 vis_usage += amdgpu_vram_mgr_vis_size(adev, &nodes[i]); 400 amdgpu_vram_mgr_virt_start(mem, &nodes[i]); 401 pages_left -= pages; 402 } 403 spin_unlock(&mgr->lock); 404 405 atomic64_add(vis_usage, &mgr->vis_usage); 406 407 mem->mm_node = nodes; 408 409 return 0; 410 411 error: 412 while (i--) 413 drm_mm_remove_node(&nodes[i]); 414 spin_unlock(&mgr->lock); 415 atomic64_sub(mem->num_pages << PAGE_SHIFT, &mgr->usage); 416 417 kvfree(nodes); 418 return r; 419 } 420 421 /** 422 * amdgpu_vram_mgr_del - free ranges 423 * 424 * @man: TTM memory type manager 425 * @mem: TTM memory object 426 * 427 * Free the allocated VRAM again. 428 */ 429 static void amdgpu_vram_mgr_del(struct ttm_resource_manager *man, 430 struct ttm_resource *mem) 431 { 432 struct amdgpu_vram_mgr *mgr = to_vram_mgr(man); 433 struct amdgpu_device *adev = to_amdgpu_device(mgr); 434 struct drm_mm_node *nodes = mem->mm_node; 435 uint64_t usage = 0, vis_usage = 0; 436 unsigned pages = mem->num_pages; 437 438 if (!mem->mm_node) 439 return; 440 441 spin_lock(&mgr->lock); 442 while (pages) { 443 pages -= nodes->size; 444 drm_mm_remove_node(nodes); 445 usage += nodes->size << PAGE_SHIFT; 446 vis_usage += amdgpu_vram_mgr_vis_size(adev, nodes); 447 ++nodes; 448 } 449 spin_unlock(&mgr->lock); 450 451 atomic64_sub(usage, &mgr->usage); 452 atomic64_sub(vis_usage, &mgr->vis_usage); 453 454 kvfree(mem->mm_node); 455 mem->mm_node = NULL; 456 } 457 458 /** 459 * amdgpu_vram_mgr_alloc_sgt - allocate and fill a sg table 460 * 461 * @adev: amdgpu device pointer 462 * @mem: TTM memory object 463 * @dev: the other device 464 * @dir: dma direction 465 * @sgt: resulting sg table 466 * 467 * Allocate and fill a sg table from a VRAM allocation. 468 */ 469 int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev, 470 struct ttm_resource *mem, 471 struct device *dev, 472 enum dma_data_direction dir, 473 struct sg_table **sgt) 474 { 475 struct drm_mm_node *node; 476 struct scatterlist *sg; 477 int num_entries = 0; 478 unsigned int pages; 479 int i, r; 480 481 *sgt = kmalloc(sizeof(*sg), GFP_KERNEL); 482 if (!*sgt) 483 return -ENOMEM; 484 485 for (pages = mem->num_pages, node = mem->mm_node; 486 pages; pages -= node->size, ++node) 487 ++num_entries; 488 489 r = sg_alloc_table(*sgt, num_entries, GFP_KERNEL); 490 if (r) 491 goto error_free; 492 493 for_each_sgtable_sg((*sgt), sg, i) 494 sg->length = 0; 495 496 node = mem->mm_node; 497 for_each_sgtable_sg((*sgt), sg, i) { 498 phys_addr_t phys = (node->start << PAGE_SHIFT) + 499 adev->gmc.aper_base; 500 size_t size = node->size << PAGE_SHIFT; 501 dma_addr_t addr; 502 503 ++node; 504 addr = dma_map_resource(dev, phys, size, dir, 505 DMA_ATTR_SKIP_CPU_SYNC); 506 r = dma_mapping_error(dev, addr); 507 if (r) 508 goto error_unmap; 509 510 sg_set_page(sg, NULL, size, 0); 511 sg_dma_address(sg) = addr; 512 sg_dma_len(sg) = size; 513 } 514 return 0; 515 516 error_unmap: 517 for_each_sgtable_sg((*sgt), sg, i) { 518 if (!sg->length) 519 continue; 520 521 dma_unmap_resource(dev, sg->dma_address, 522 sg->length, dir, 523 DMA_ATTR_SKIP_CPU_SYNC); 524 } 525 sg_free_table(*sgt); 526 527 error_free: 528 kfree(*sgt); 529 return r; 530 } 531 532 /** 533 * amdgpu_vram_mgr_alloc_sgt - allocate and fill a sg table 534 * 535 * @adev: amdgpu device pointer 536 * @sgt: sg table to free 537 * 538 * Free a previously allocate sg table. 539 */ 540 void amdgpu_vram_mgr_free_sgt(struct amdgpu_device *adev, 541 struct device *dev, 542 enum dma_data_direction dir, 543 struct sg_table *sgt) 544 { 545 struct scatterlist *sg; 546 int i; 547 548 for_each_sgtable_sg(sgt, sg, i) 549 dma_unmap_resource(dev, sg->dma_address, 550 sg->length, dir, 551 DMA_ATTR_SKIP_CPU_SYNC); 552 sg_free_table(sgt); 553 kfree(sgt); 554 } 555 556 /** 557 * amdgpu_vram_mgr_usage - how many bytes are used in this domain 558 * 559 * @man: TTM memory type manager 560 * 561 * Returns how many bytes are used in this domain. 562 */ 563 uint64_t amdgpu_vram_mgr_usage(struct ttm_resource_manager *man) 564 { 565 struct amdgpu_vram_mgr *mgr = to_vram_mgr(man); 566 567 return atomic64_read(&mgr->usage); 568 } 569 570 /** 571 * amdgpu_vram_mgr_vis_usage - how many bytes are used in the visible part 572 * 573 * @man: TTM memory type manager 574 * 575 * Returns how many bytes are used in the visible part of VRAM 576 */ 577 uint64_t amdgpu_vram_mgr_vis_usage(struct ttm_resource_manager *man) 578 { 579 struct amdgpu_vram_mgr *mgr = to_vram_mgr(man); 580 581 return atomic64_read(&mgr->vis_usage); 582 } 583 584 /** 585 * amdgpu_vram_mgr_debug - dump VRAM table 586 * 587 * @man: TTM memory type manager 588 * @printer: DRM printer to use 589 * 590 * Dump the table content using printk. 591 */ 592 static void amdgpu_vram_mgr_debug(struct ttm_resource_manager *man, 593 struct drm_printer *printer) 594 { 595 struct amdgpu_vram_mgr *mgr = to_vram_mgr(man); 596 597 spin_lock(&mgr->lock); 598 drm_mm_print(&mgr->mm, printer); 599 spin_unlock(&mgr->lock); 600 601 drm_printf(printer, "man size:%llu pages, ram usage:%lluMB, vis usage:%lluMB\n", 602 man->size, amdgpu_vram_mgr_usage(man) >> 20, 603 amdgpu_vram_mgr_vis_usage(man) >> 20); 604 } 605 606 static const struct ttm_resource_manager_func amdgpu_vram_mgr_func = { 607 .alloc = amdgpu_vram_mgr_new, 608 .free = amdgpu_vram_mgr_del, 609 .debug = amdgpu_vram_mgr_debug 610 }; 611