1 /* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Christian König 23 */ 24 25 #include <linux/dma-mapping.h> 26 #include "amdgpu.h" 27 #include "amdgpu_vm.h" 28 #include "amdgpu_atomfirmware.h" 29 #include "atom.h" 30 31 static inline struct amdgpu_vram_mgr *to_vram_mgr(struct ttm_resource_manager *man) 32 { 33 return container_of(man, struct amdgpu_vram_mgr, manager); 34 } 35 36 static inline struct amdgpu_device *to_amdgpu_device(struct amdgpu_vram_mgr *mgr) 37 { 38 return container_of(mgr, struct amdgpu_device, mman.vram_mgr); 39 } 40 41 /** 42 * DOC: mem_info_vram_total 43 * 44 * The amdgpu driver provides a sysfs API for reporting current total VRAM 45 * available on the device 46 * The file mem_info_vram_total is used for this and returns the total 47 * amount of VRAM in bytes 48 */ 49 static ssize_t amdgpu_mem_info_vram_total_show(struct device *dev, 50 struct device_attribute *attr, char *buf) 51 { 52 struct drm_device *ddev = dev_get_drvdata(dev); 53 struct amdgpu_device *adev = drm_to_adev(ddev); 54 55 return snprintf(buf, PAGE_SIZE, "%llu\n", adev->gmc.real_vram_size); 56 } 57 58 /** 59 * DOC: mem_info_vis_vram_total 60 * 61 * The amdgpu driver provides a sysfs API for reporting current total 62 * visible VRAM available on the device 63 * The file mem_info_vis_vram_total is used for this and returns the total 64 * amount of visible VRAM in bytes 65 */ 66 static ssize_t amdgpu_mem_info_vis_vram_total_show(struct device *dev, 67 struct device_attribute *attr, char *buf) 68 { 69 struct drm_device *ddev = dev_get_drvdata(dev); 70 struct amdgpu_device *adev = drm_to_adev(ddev); 71 72 return snprintf(buf, PAGE_SIZE, "%llu\n", adev->gmc.visible_vram_size); 73 } 74 75 /** 76 * DOC: mem_info_vram_used 77 * 78 * The amdgpu driver provides a sysfs API for reporting current total VRAM 79 * available on the device 80 * The file mem_info_vram_used is used for this and returns the total 81 * amount of currently used VRAM in bytes 82 */ 83 static ssize_t amdgpu_mem_info_vram_used_show(struct device *dev, 84 struct device_attribute *attr, char *buf) 85 { 86 struct drm_device *ddev = dev_get_drvdata(dev); 87 struct amdgpu_device *adev = drm_to_adev(ddev); 88 struct ttm_resource_manager *man = ttm_manager_type(&adev->mman.bdev, TTM_PL_VRAM); 89 90 return snprintf(buf, PAGE_SIZE, "%llu\n", 91 amdgpu_vram_mgr_usage(man)); 92 } 93 94 /** 95 * DOC: mem_info_vis_vram_used 96 * 97 * The amdgpu driver provides a sysfs API for reporting current total of 98 * used visible VRAM 99 * The file mem_info_vis_vram_used is used for this and returns the total 100 * amount of currently used visible VRAM in bytes 101 */ 102 static ssize_t amdgpu_mem_info_vis_vram_used_show(struct device *dev, 103 struct device_attribute *attr, char *buf) 104 { 105 struct drm_device *ddev = dev_get_drvdata(dev); 106 struct amdgpu_device *adev = drm_to_adev(ddev); 107 struct ttm_resource_manager *man = ttm_manager_type(&adev->mman.bdev, TTM_PL_VRAM); 108 109 return snprintf(buf, PAGE_SIZE, "%llu\n", 110 amdgpu_vram_mgr_vis_usage(man)); 111 } 112 113 static ssize_t amdgpu_mem_info_vram_vendor(struct device *dev, 114 struct device_attribute *attr, 115 char *buf) 116 { 117 struct drm_device *ddev = dev_get_drvdata(dev); 118 struct amdgpu_device *adev = drm_to_adev(ddev); 119 120 switch (adev->gmc.vram_vendor) { 121 case SAMSUNG: 122 return snprintf(buf, PAGE_SIZE, "samsung\n"); 123 case INFINEON: 124 return snprintf(buf, PAGE_SIZE, "infineon\n"); 125 case ELPIDA: 126 return snprintf(buf, PAGE_SIZE, "elpida\n"); 127 case ETRON: 128 return snprintf(buf, PAGE_SIZE, "etron\n"); 129 case NANYA: 130 return snprintf(buf, PAGE_SIZE, "nanya\n"); 131 case HYNIX: 132 return snprintf(buf, PAGE_SIZE, "hynix\n"); 133 case MOSEL: 134 return snprintf(buf, PAGE_SIZE, "mosel\n"); 135 case WINBOND: 136 return snprintf(buf, PAGE_SIZE, "winbond\n"); 137 case ESMT: 138 return snprintf(buf, PAGE_SIZE, "esmt\n"); 139 case MICRON: 140 return snprintf(buf, PAGE_SIZE, "micron\n"); 141 default: 142 return snprintf(buf, PAGE_SIZE, "unknown\n"); 143 } 144 } 145 146 static DEVICE_ATTR(mem_info_vram_total, S_IRUGO, 147 amdgpu_mem_info_vram_total_show, NULL); 148 static DEVICE_ATTR(mem_info_vis_vram_total, S_IRUGO, 149 amdgpu_mem_info_vis_vram_total_show,NULL); 150 static DEVICE_ATTR(mem_info_vram_used, S_IRUGO, 151 amdgpu_mem_info_vram_used_show, NULL); 152 static DEVICE_ATTR(mem_info_vis_vram_used, S_IRUGO, 153 amdgpu_mem_info_vis_vram_used_show, NULL); 154 static DEVICE_ATTR(mem_info_vram_vendor, S_IRUGO, 155 amdgpu_mem_info_vram_vendor, NULL); 156 157 static const struct attribute *amdgpu_vram_mgr_attributes[] = { 158 &dev_attr_mem_info_vram_total.attr, 159 &dev_attr_mem_info_vis_vram_total.attr, 160 &dev_attr_mem_info_vram_used.attr, 161 &dev_attr_mem_info_vis_vram_used.attr, 162 &dev_attr_mem_info_vram_vendor.attr, 163 NULL 164 }; 165 166 static const struct ttm_resource_manager_func amdgpu_vram_mgr_func; 167 168 /** 169 * amdgpu_vram_mgr_init - init VRAM manager and DRM MM 170 * 171 * @adev: amdgpu_device pointer 172 * 173 * Allocate and initialize the VRAM manager. 174 */ 175 int amdgpu_vram_mgr_init(struct amdgpu_device *adev) 176 { 177 struct amdgpu_vram_mgr *mgr = &adev->mman.vram_mgr; 178 struct ttm_resource_manager *man = &mgr->manager; 179 int ret; 180 181 ttm_resource_manager_init(man, adev->gmc.real_vram_size >> PAGE_SHIFT); 182 183 man->func = &amdgpu_vram_mgr_func; 184 185 drm_mm_init(&mgr->mm, 0, man->size); 186 spin_lock_init(&mgr->lock); 187 188 /* Add the two VRAM-related sysfs files */ 189 ret = sysfs_create_files(&adev->dev->kobj, amdgpu_vram_mgr_attributes); 190 if (ret) 191 DRM_ERROR("Failed to register sysfs\n"); 192 193 ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_VRAM, &mgr->manager); 194 ttm_resource_manager_set_used(man, true); 195 return 0; 196 } 197 198 /** 199 * amdgpu_vram_mgr_fini - free and destroy VRAM manager 200 * 201 * @adev: amdgpu_device pointer 202 * 203 * Destroy and free the VRAM manager, returns -EBUSY if ranges are still 204 * allocated inside it. 205 */ 206 void amdgpu_vram_mgr_fini(struct amdgpu_device *adev) 207 { 208 struct amdgpu_vram_mgr *mgr = &adev->mman.vram_mgr; 209 struct ttm_resource_manager *man = &mgr->manager; 210 int ret; 211 212 ttm_resource_manager_set_used(man, false); 213 214 ret = ttm_resource_manager_force_list_clean(&adev->mman.bdev, man); 215 if (ret) 216 return; 217 218 spin_lock(&mgr->lock); 219 drm_mm_takedown(&mgr->mm); 220 spin_unlock(&mgr->lock); 221 222 sysfs_remove_files(&adev->dev->kobj, amdgpu_vram_mgr_attributes); 223 224 ttm_resource_manager_cleanup(man); 225 ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_VRAM, NULL); 226 } 227 228 /** 229 * amdgpu_vram_mgr_vis_size - Calculate visible node size 230 * 231 * @adev: amdgpu_device pointer 232 * @node: MM node structure 233 * 234 * Calculate how many bytes of the MM node are inside visible VRAM 235 */ 236 static u64 amdgpu_vram_mgr_vis_size(struct amdgpu_device *adev, 237 struct drm_mm_node *node) 238 { 239 uint64_t start = node->start << PAGE_SHIFT; 240 uint64_t end = (node->size + node->start) << PAGE_SHIFT; 241 242 if (start >= adev->gmc.visible_vram_size) 243 return 0; 244 245 return (end > adev->gmc.visible_vram_size ? 246 adev->gmc.visible_vram_size : end) - start; 247 } 248 249 /** 250 * amdgpu_vram_mgr_bo_visible_size - CPU visible BO size 251 * 252 * @bo: &amdgpu_bo buffer object (must be in VRAM) 253 * 254 * Returns: 255 * How much of the given &amdgpu_bo buffer object lies in CPU visible VRAM. 256 */ 257 u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo) 258 { 259 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); 260 struct ttm_resource *mem = &bo->tbo.mem; 261 struct drm_mm_node *nodes = mem->mm_node; 262 unsigned pages = mem->num_pages; 263 u64 usage; 264 265 if (amdgpu_gmc_vram_full_visible(&adev->gmc)) 266 return amdgpu_bo_size(bo); 267 268 if (mem->start >= adev->gmc.visible_vram_size >> PAGE_SHIFT) 269 return 0; 270 271 for (usage = 0; nodes && pages; pages -= nodes->size, nodes++) 272 usage += amdgpu_vram_mgr_vis_size(adev, nodes); 273 274 return usage; 275 } 276 277 /** 278 * amdgpu_vram_mgr_virt_start - update virtual start address 279 * 280 * @mem: ttm_resource to update 281 * @node: just allocated node 282 * 283 * Calculate a virtual BO start address to easily check if everything is CPU 284 * accessible. 285 */ 286 static void amdgpu_vram_mgr_virt_start(struct ttm_resource *mem, 287 struct drm_mm_node *node) 288 { 289 unsigned long start; 290 291 start = node->start + node->size; 292 if (start > mem->num_pages) 293 start -= mem->num_pages; 294 else 295 start = 0; 296 mem->start = max(mem->start, start); 297 } 298 299 /** 300 * amdgpu_vram_mgr_new - allocate new ranges 301 * 302 * @man: TTM memory type manager 303 * @tbo: TTM BO we need this range for 304 * @place: placement flags and restrictions 305 * @mem: the resulting mem object 306 * 307 * Allocate VRAM for the given BO. 308 */ 309 static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man, 310 struct ttm_buffer_object *tbo, 311 const struct ttm_place *place, 312 struct ttm_resource *mem) 313 { 314 struct amdgpu_vram_mgr *mgr = to_vram_mgr(man); 315 struct amdgpu_device *adev = to_amdgpu_device(mgr); 316 struct drm_mm *mm = &mgr->mm; 317 struct drm_mm_node *nodes; 318 enum drm_mm_insert_mode mode; 319 unsigned long lpfn, num_nodes, pages_per_node, pages_left; 320 uint64_t vis_usage = 0, mem_bytes, max_bytes; 321 unsigned i; 322 int r; 323 324 lpfn = place->lpfn; 325 if (!lpfn) 326 lpfn = man->size; 327 328 max_bytes = adev->gmc.mc_vram_size; 329 if (tbo->type != ttm_bo_type_kernel) 330 max_bytes -= AMDGPU_VM_RESERVED_VRAM; 331 332 /* bail out quickly if there's likely not enough VRAM for this BO */ 333 mem_bytes = (u64)mem->num_pages << PAGE_SHIFT; 334 if (atomic64_add_return(mem_bytes, &mgr->usage) > max_bytes) { 335 atomic64_sub(mem_bytes, &mgr->usage); 336 return -ENOSPC; 337 } 338 339 if (place->flags & TTM_PL_FLAG_CONTIGUOUS) { 340 pages_per_node = ~0ul; 341 num_nodes = 1; 342 } else { 343 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 344 pages_per_node = HPAGE_PMD_NR; 345 #else 346 /* default to 2MB */ 347 pages_per_node = (2UL << (20UL - PAGE_SHIFT)); 348 #endif 349 pages_per_node = max((uint32_t)pages_per_node, mem->page_alignment); 350 num_nodes = DIV_ROUND_UP(mem->num_pages, pages_per_node); 351 } 352 353 nodes = kvmalloc_array((uint32_t)num_nodes, sizeof(*nodes), 354 GFP_KERNEL | __GFP_ZERO); 355 if (!nodes) { 356 atomic64_sub(mem_bytes, &mgr->usage); 357 return -ENOMEM; 358 } 359 360 mode = DRM_MM_INSERT_BEST; 361 if (place->flags & TTM_PL_FLAG_TOPDOWN) 362 mode = DRM_MM_INSERT_HIGH; 363 364 mem->start = 0; 365 pages_left = mem->num_pages; 366 367 spin_lock(&mgr->lock); 368 for (i = 0; pages_left >= pages_per_node; ++i) { 369 unsigned long pages = rounddown_pow_of_two(pages_left); 370 371 r = drm_mm_insert_node_in_range(mm, &nodes[i], pages, 372 pages_per_node, 0, 373 place->fpfn, lpfn, 374 mode); 375 if (unlikely(r)) 376 break; 377 378 vis_usage += amdgpu_vram_mgr_vis_size(adev, &nodes[i]); 379 amdgpu_vram_mgr_virt_start(mem, &nodes[i]); 380 pages_left -= pages; 381 } 382 383 for (; pages_left; ++i) { 384 unsigned long pages = min(pages_left, pages_per_node); 385 uint32_t alignment = mem->page_alignment; 386 387 if (pages == pages_per_node) 388 alignment = pages_per_node; 389 390 r = drm_mm_insert_node_in_range(mm, &nodes[i], 391 pages, alignment, 0, 392 place->fpfn, lpfn, 393 mode); 394 if (unlikely(r)) 395 goto error; 396 397 vis_usage += amdgpu_vram_mgr_vis_size(adev, &nodes[i]); 398 amdgpu_vram_mgr_virt_start(mem, &nodes[i]); 399 pages_left -= pages; 400 } 401 spin_unlock(&mgr->lock); 402 403 atomic64_add(vis_usage, &mgr->vis_usage); 404 405 mem->mm_node = nodes; 406 407 return 0; 408 409 error: 410 while (i--) 411 drm_mm_remove_node(&nodes[i]); 412 spin_unlock(&mgr->lock); 413 atomic64_sub(mem->num_pages << PAGE_SHIFT, &mgr->usage); 414 415 kvfree(nodes); 416 return r; 417 } 418 419 /** 420 * amdgpu_vram_mgr_del - free ranges 421 * 422 * @man: TTM memory type manager 423 * @mem: TTM memory object 424 * 425 * Free the allocated VRAM again. 426 */ 427 static void amdgpu_vram_mgr_del(struct ttm_resource_manager *man, 428 struct ttm_resource *mem) 429 { 430 struct amdgpu_vram_mgr *mgr = to_vram_mgr(man); 431 struct amdgpu_device *adev = to_amdgpu_device(mgr); 432 struct drm_mm_node *nodes = mem->mm_node; 433 uint64_t usage = 0, vis_usage = 0; 434 unsigned pages = mem->num_pages; 435 436 if (!mem->mm_node) 437 return; 438 439 spin_lock(&mgr->lock); 440 while (pages) { 441 pages -= nodes->size; 442 drm_mm_remove_node(nodes); 443 usage += nodes->size << PAGE_SHIFT; 444 vis_usage += amdgpu_vram_mgr_vis_size(adev, nodes); 445 ++nodes; 446 } 447 spin_unlock(&mgr->lock); 448 449 atomic64_sub(usage, &mgr->usage); 450 atomic64_sub(vis_usage, &mgr->vis_usage); 451 452 kvfree(mem->mm_node); 453 mem->mm_node = NULL; 454 } 455 456 /** 457 * amdgpu_vram_mgr_alloc_sgt - allocate and fill a sg table 458 * 459 * @adev: amdgpu device pointer 460 * @mem: TTM memory object 461 * @dev: the other device 462 * @dir: dma direction 463 * @sgt: resulting sg table 464 * 465 * Allocate and fill a sg table from a VRAM allocation. 466 */ 467 int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev, 468 struct ttm_resource *mem, 469 struct device *dev, 470 enum dma_data_direction dir, 471 struct sg_table **sgt) 472 { 473 struct drm_mm_node *node; 474 struct scatterlist *sg; 475 int num_entries = 0; 476 unsigned int pages; 477 int i, r; 478 479 *sgt = kmalloc(sizeof(**sgt), GFP_KERNEL); 480 if (!*sgt) 481 return -ENOMEM; 482 483 for (pages = mem->num_pages, node = mem->mm_node; 484 pages; pages -= node->size, ++node) 485 ++num_entries; 486 487 r = sg_alloc_table(*sgt, num_entries, GFP_KERNEL); 488 if (r) 489 goto error_free; 490 491 for_each_sgtable_sg((*sgt), sg, i) 492 sg->length = 0; 493 494 node = mem->mm_node; 495 for_each_sgtable_sg((*sgt), sg, i) { 496 phys_addr_t phys = (node->start << PAGE_SHIFT) + 497 adev->gmc.aper_base; 498 size_t size = node->size << PAGE_SHIFT; 499 dma_addr_t addr; 500 501 ++node; 502 addr = dma_map_resource(dev, phys, size, dir, 503 DMA_ATTR_SKIP_CPU_SYNC); 504 r = dma_mapping_error(dev, addr); 505 if (r) 506 goto error_unmap; 507 508 sg_set_page(sg, NULL, size, 0); 509 sg_dma_address(sg) = addr; 510 sg_dma_len(sg) = size; 511 } 512 return 0; 513 514 error_unmap: 515 for_each_sgtable_sg((*sgt), sg, i) { 516 if (!sg->length) 517 continue; 518 519 dma_unmap_resource(dev, sg->dma_address, 520 sg->length, dir, 521 DMA_ATTR_SKIP_CPU_SYNC); 522 } 523 sg_free_table(*sgt); 524 525 error_free: 526 kfree(*sgt); 527 return r; 528 } 529 530 /** 531 * amdgpu_vram_mgr_alloc_sgt - allocate and fill a sg table 532 * 533 * @adev: amdgpu device pointer 534 * @sgt: sg table to free 535 * 536 * Free a previously allocate sg table. 537 */ 538 void amdgpu_vram_mgr_free_sgt(struct amdgpu_device *adev, 539 struct device *dev, 540 enum dma_data_direction dir, 541 struct sg_table *sgt) 542 { 543 struct scatterlist *sg; 544 int i; 545 546 for_each_sgtable_sg(sgt, sg, i) 547 dma_unmap_resource(dev, sg->dma_address, 548 sg->length, dir, 549 DMA_ATTR_SKIP_CPU_SYNC); 550 sg_free_table(sgt); 551 kfree(sgt); 552 } 553 554 /** 555 * amdgpu_vram_mgr_usage - how many bytes are used in this domain 556 * 557 * @man: TTM memory type manager 558 * 559 * Returns how many bytes are used in this domain. 560 */ 561 uint64_t amdgpu_vram_mgr_usage(struct ttm_resource_manager *man) 562 { 563 struct amdgpu_vram_mgr *mgr = to_vram_mgr(man); 564 565 return atomic64_read(&mgr->usage); 566 } 567 568 /** 569 * amdgpu_vram_mgr_vis_usage - how many bytes are used in the visible part 570 * 571 * @man: TTM memory type manager 572 * 573 * Returns how many bytes are used in the visible part of VRAM 574 */ 575 uint64_t amdgpu_vram_mgr_vis_usage(struct ttm_resource_manager *man) 576 { 577 struct amdgpu_vram_mgr *mgr = to_vram_mgr(man); 578 579 return atomic64_read(&mgr->vis_usage); 580 } 581 582 /** 583 * amdgpu_vram_mgr_debug - dump VRAM table 584 * 585 * @man: TTM memory type manager 586 * @printer: DRM printer to use 587 * 588 * Dump the table content using printk. 589 */ 590 static void amdgpu_vram_mgr_debug(struct ttm_resource_manager *man, 591 struct drm_printer *printer) 592 { 593 struct amdgpu_vram_mgr *mgr = to_vram_mgr(man); 594 595 spin_lock(&mgr->lock); 596 drm_mm_print(&mgr->mm, printer); 597 spin_unlock(&mgr->lock); 598 599 drm_printf(printer, "man size:%llu pages, ram usage:%lluMB, vis usage:%lluMB\n", 600 man->size, amdgpu_vram_mgr_usage(man) >> 20, 601 amdgpu_vram_mgr_vis_usage(man) >> 20); 602 } 603 604 static const struct ttm_resource_manager_func amdgpu_vram_mgr_func = { 605 .alloc = amdgpu_vram_mgr_new, 606 .free = amdgpu_vram_mgr_del, 607 .debug = amdgpu_vram_mgr_debug 608 }; 609