1 /* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Christian König 23 */ 24 25 #include <linux/dma-mapping.h> 26 #include "amdgpu.h" 27 #include "amdgpu_vm.h" 28 #include "amdgpu_atomfirmware.h" 29 #include "atom.h" 30 31 static inline struct amdgpu_vram_mgr *to_vram_mgr(struct ttm_resource_manager *man) 32 { 33 return container_of(man, struct amdgpu_vram_mgr, manager); 34 } 35 36 static inline struct amdgpu_device *to_amdgpu_device(struct amdgpu_vram_mgr *mgr) 37 { 38 return container_of(mgr, struct amdgpu_device, mman.vram_mgr); 39 } 40 41 /** 42 * DOC: mem_info_vram_total 43 * 44 * The amdgpu driver provides a sysfs API for reporting current total VRAM 45 * available on the device 46 * The file mem_info_vram_total is used for this and returns the total 47 * amount of VRAM in bytes 48 */ 49 static ssize_t amdgpu_mem_info_vram_total_show(struct device *dev, 50 struct device_attribute *attr, char *buf) 51 { 52 struct drm_device *ddev = dev_get_drvdata(dev); 53 struct amdgpu_device *adev = drm_to_adev(ddev); 54 55 return snprintf(buf, PAGE_SIZE, "%llu\n", adev->gmc.real_vram_size); 56 } 57 58 /** 59 * DOC: mem_info_vis_vram_total 60 * 61 * The amdgpu driver provides a sysfs API for reporting current total 62 * visible VRAM available on the device 63 * The file mem_info_vis_vram_total is used for this and returns the total 64 * amount of visible VRAM in bytes 65 */ 66 static ssize_t amdgpu_mem_info_vis_vram_total_show(struct device *dev, 67 struct device_attribute *attr, char *buf) 68 { 69 struct drm_device *ddev = dev_get_drvdata(dev); 70 struct amdgpu_device *adev = drm_to_adev(ddev); 71 72 return snprintf(buf, PAGE_SIZE, "%llu\n", adev->gmc.visible_vram_size); 73 } 74 75 /** 76 * DOC: mem_info_vram_used 77 * 78 * The amdgpu driver provides a sysfs API for reporting current total VRAM 79 * available on the device 80 * The file mem_info_vram_used is used for this and returns the total 81 * amount of currently used VRAM in bytes 82 */ 83 static ssize_t amdgpu_mem_info_vram_used_show(struct device *dev, 84 struct device_attribute *attr, char *buf) 85 { 86 struct drm_device *ddev = dev_get_drvdata(dev); 87 struct amdgpu_device *adev = drm_to_adev(ddev); 88 struct ttm_resource_manager *man = ttm_manager_type(&adev->mman.bdev, TTM_PL_VRAM); 89 90 return snprintf(buf, PAGE_SIZE, "%llu\n", 91 amdgpu_vram_mgr_usage(man)); 92 } 93 94 /** 95 * DOC: mem_info_vis_vram_used 96 * 97 * The amdgpu driver provides a sysfs API for reporting current total of 98 * used visible VRAM 99 * The file mem_info_vis_vram_used is used for this and returns the total 100 * amount of currently used visible VRAM in bytes 101 */ 102 static ssize_t amdgpu_mem_info_vis_vram_used_show(struct device *dev, 103 struct device_attribute *attr, char *buf) 104 { 105 struct drm_device *ddev = dev_get_drvdata(dev); 106 struct amdgpu_device *adev = drm_to_adev(ddev); 107 struct ttm_resource_manager *man = ttm_manager_type(&adev->mman.bdev, TTM_PL_VRAM); 108 109 return snprintf(buf, PAGE_SIZE, "%llu\n", 110 amdgpu_vram_mgr_vis_usage(man)); 111 } 112 113 static ssize_t amdgpu_mem_info_vram_vendor(struct device *dev, 114 struct device_attribute *attr, 115 char *buf) 116 { 117 struct drm_device *ddev = dev_get_drvdata(dev); 118 struct amdgpu_device *adev = drm_to_adev(ddev); 119 120 switch (adev->gmc.vram_vendor) { 121 case SAMSUNG: 122 return snprintf(buf, PAGE_SIZE, "samsung\n"); 123 case INFINEON: 124 return snprintf(buf, PAGE_SIZE, "infineon\n"); 125 case ELPIDA: 126 return snprintf(buf, PAGE_SIZE, "elpida\n"); 127 case ETRON: 128 return snprintf(buf, PAGE_SIZE, "etron\n"); 129 case NANYA: 130 return snprintf(buf, PAGE_SIZE, "nanya\n"); 131 case HYNIX: 132 return snprintf(buf, PAGE_SIZE, "hynix\n"); 133 case MOSEL: 134 return snprintf(buf, PAGE_SIZE, "mosel\n"); 135 case WINBOND: 136 return snprintf(buf, PAGE_SIZE, "winbond\n"); 137 case ESMT: 138 return snprintf(buf, PAGE_SIZE, "esmt\n"); 139 case MICRON: 140 return snprintf(buf, PAGE_SIZE, "micron\n"); 141 default: 142 return snprintf(buf, PAGE_SIZE, "unknown\n"); 143 } 144 } 145 146 static DEVICE_ATTR(mem_info_vram_total, S_IRUGO, 147 amdgpu_mem_info_vram_total_show, NULL); 148 static DEVICE_ATTR(mem_info_vis_vram_total, S_IRUGO, 149 amdgpu_mem_info_vis_vram_total_show,NULL); 150 static DEVICE_ATTR(mem_info_vram_used, S_IRUGO, 151 amdgpu_mem_info_vram_used_show, NULL); 152 static DEVICE_ATTR(mem_info_vis_vram_used, S_IRUGO, 153 amdgpu_mem_info_vis_vram_used_show, NULL); 154 static DEVICE_ATTR(mem_info_vram_vendor, S_IRUGO, 155 amdgpu_mem_info_vram_vendor, NULL); 156 157 static const struct attribute *amdgpu_vram_mgr_attributes[] = { 158 &dev_attr_mem_info_vram_total.attr, 159 &dev_attr_mem_info_vis_vram_total.attr, 160 &dev_attr_mem_info_vram_used.attr, 161 &dev_attr_mem_info_vis_vram_used.attr, 162 &dev_attr_mem_info_vram_vendor.attr, 163 NULL 164 }; 165 166 static const struct ttm_resource_manager_func amdgpu_vram_mgr_func; 167 168 /** 169 * amdgpu_vram_mgr_init - init VRAM manager and DRM MM 170 * 171 * @man: TTM memory type manager 172 * @p_size: maximum size of VRAM 173 * 174 * Allocate and initialize the VRAM manager. 175 */ 176 int amdgpu_vram_mgr_init(struct amdgpu_device *adev) 177 { 178 struct amdgpu_vram_mgr *mgr = &adev->mman.vram_mgr; 179 struct ttm_resource_manager *man = &mgr->manager; 180 int ret; 181 182 ttm_resource_manager_init(man, adev->gmc.real_vram_size >> PAGE_SHIFT); 183 184 man->func = &amdgpu_vram_mgr_func; 185 186 drm_mm_init(&mgr->mm, 0, man->size); 187 spin_lock_init(&mgr->lock); 188 189 /* Add the two VRAM-related sysfs files */ 190 ret = sysfs_create_files(&adev->dev->kobj, amdgpu_vram_mgr_attributes); 191 if (ret) 192 DRM_ERROR("Failed to register sysfs\n"); 193 194 ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_VRAM, &mgr->manager); 195 ttm_resource_manager_set_used(man, true); 196 return 0; 197 } 198 199 /** 200 * amdgpu_vram_mgr_fini - free and destroy VRAM manager 201 * 202 * @man: TTM memory type manager 203 * 204 * Destroy and free the VRAM manager, returns -EBUSY if ranges are still 205 * allocated inside it. 206 */ 207 void amdgpu_vram_mgr_fini(struct amdgpu_device *adev) 208 { 209 struct amdgpu_vram_mgr *mgr = &adev->mman.vram_mgr; 210 struct ttm_resource_manager *man = &mgr->manager; 211 int ret; 212 213 ttm_resource_manager_set_used(man, false); 214 215 ret = ttm_resource_manager_force_list_clean(&adev->mman.bdev, man); 216 if (ret) 217 return; 218 219 spin_lock(&mgr->lock); 220 drm_mm_takedown(&mgr->mm); 221 spin_unlock(&mgr->lock); 222 223 sysfs_remove_files(&adev->dev->kobj, amdgpu_vram_mgr_attributes); 224 225 ttm_resource_manager_cleanup(man); 226 ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_VRAM, NULL); 227 } 228 229 /** 230 * amdgpu_vram_mgr_vis_size - Calculate visible node size 231 * 232 * @adev: amdgpu device structure 233 * @node: MM node structure 234 * 235 * Calculate how many bytes of the MM node are inside visible VRAM 236 */ 237 static u64 amdgpu_vram_mgr_vis_size(struct amdgpu_device *adev, 238 struct drm_mm_node *node) 239 { 240 uint64_t start = node->start << PAGE_SHIFT; 241 uint64_t end = (node->size + node->start) << PAGE_SHIFT; 242 243 if (start >= adev->gmc.visible_vram_size) 244 return 0; 245 246 return (end > adev->gmc.visible_vram_size ? 247 adev->gmc.visible_vram_size : end) - start; 248 } 249 250 /** 251 * amdgpu_vram_mgr_bo_visible_size - CPU visible BO size 252 * 253 * @bo: &amdgpu_bo buffer object (must be in VRAM) 254 * 255 * Returns: 256 * How much of the given &amdgpu_bo buffer object lies in CPU visible VRAM. 257 */ 258 u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo) 259 { 260 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); 261 struct ttm_resource *mem = &bo->tbo.mem; 262 struct drm_mm_node *nodes = mem->mm_node; 263 unsigned pages = mem->num_pages; 264 u64 usage; 265 266 if (amdgpu_gmc_vram_full_visible(&adev->gmc)) 267 return amdgpu_bo_size(bo); 268 269 if (mem->start >= adev->gmc.visible_vram_size >> PAGE_SHIFT) 270 return 0; 271 272 for (usage = 0; nodes && pages; pages -= nodes->size, nodes++) 273 usage += amdgpu_vram_mgr_vis_size(adev, nodes); 274 275 return usage; 276 } 277 278 /** 279 * amdgpu_vram_mgr_virt_start - update virtual start address 280 * 281 * @mem: ttm_resource to update 282 * @node: just allocated node 283 * 284 * Calculate a virtual BO start address to easily check if everything is CPU 285 * accessible. 286 */ 287 static void amdgpu_vram_mgr_virt_start(struct ttm_resource *mem, 288 struct drm_mm_node *node) 289 { 290 unsigned long start; 291 292 start = node->start + node->size; 293 if (start > mem->num_pages) 294 start -= mem->num_pages; 295 else 296 start = 0; 297 mem->start = max(mem->start, start); 298 } 299 300 /** 301 * amdgpu_vram_mgr_new - allocate new ranges 302 * 303 * @man: TTM memory type manager 304 * @tbo: TTM BO we need this range for 305 * @place: placement flags and restrictions 306 * @mem: the resulting mem object 307 * 308 * Allocate VRAM for the given BO. 309 */ 310 static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man, 311 struct ttm_buffer_object *tbo, 312 const struct ttm_place *place, 313 struct ttm_resource *mem) 314 { 315 struct amdgpu_vram_mgr *mgr = to_vram_mgr(man); 316 struct amdgpu_device *adev = to_amdgpu_device(mgr); 317 struct drm_mm *mm = &mgr->mm; 318 struct drm_mm_node *nodes; 319 enum drm_mm_insert_mode mode; 320 unsigned long lpfn, num_nodes, pages_per_node, pages_left; 321 uint64_t vis_usage = 0, mem_bytes, max_bytes; 322 unsigned i; 323 int r; 324 325 lpfn = place->lpfn; 326 if (!lpfn) 327 lpfn = man->size; 328 329 max_bytes = adev->gmc.mc_vram_size; 330 if (tbo->type != ttm_bo_type_kernel) 331 max_bytes -= AMDGPU_VM_RESERVED_VRAM; 332 333 /* bail out quickly if there's likely not enough VRAM for this BO */ 334 mem_bytes = (u64)mem->num_pages << PAGE_SHIFT; 335 if (atomic64_add_return(mem_bytes, &mgr->usage) > max_bytes) { 336 atomic64_sub(mem_bytes, &mgr->usage); 337 return -ENOSPC; 338 } 339 340 if (place->flags & TTM_PL_FLAG_CONTIGUOUS) { 341 pages_per_node = ~0ul; 342 num_nodes = 1; 343 } else { 344 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 345 pages_per_node = HPAGE_PMD_NR; 346 #else 347 /* default to 2MB */ 348 pages_per_node = (2UL << (20UL - PAGE_SHIFT)); 349 #endif 350 pages_per_node = max((uint32_t)pages_per_node, mem->page_alignment); 351 num_nodes = DIV_ROUND_UP(mem->num_pages, pages_per_node); 352 } 353 354 nodes = kvmalloc_array((uint32_t)num_nodes, sizeof(*nodes), 355 GFP_KERNEL | __GFP_ZERO); 356 if (!nodes) { 357 atomic64_sub(mem_bytes, &mgr->usage); 358 return -ENOMEM; 359 } 360 361 mode = DRM_MM_INSERT_BEST; 362 if (place->flags & TTM_PL_FLAG_TOPDOWN) 363 mode = DRM_MM_INSERT_HIGH; 364 365 mem->start = 0; 366 pages_left = mem->num_pages; 367 368 spin_lock(&mgr->lock); 369 for (i = 0; pages_left >= pages_per_node; ++i) { 370 unsigned long pages = rounddown_pow_of_two(pages_left); 371 372 r = drm_mm_insert_node_in_range(mm, &nodes[i], pages, 373 pages_per_node, 0, 374 place->fpfn, lpfn, 375 mode); 376 if (unlikely(r)) 377 break; 378 379 vis_usage += amdgpu_vram_mgr_vis_size(adev, &nodes[i]); 380 amdgpu_vram_mgr_virt_start(mem, &nodes[i]); 381 pages_left -= pages; 382 } 383 384 for (; pages_left; ++i) { 385 unsigned long pages = min(pages_left, pages_per_node); 386 uint32_t alignment = mem->page_alignment; 387 388 if (pages == pages_per_node) 389 alignment = pages_per_node; 390 391 r = drm_mm_insert_node_in_range(mm, &nodes[i], 392 pages, alignment, 0, 393 place->fpfn, lpfn, 394 mode); 395 if (unlikely(r)) 396 goto error; 397 398 vis_usage += amdgpu_vram_mgr_vis_size(adev, &nodes[i]); 399 amdgpu_vram_mgr_virt_start(mem, &nodes[i]); 400 pages_left -= pages; 401 } 402 spin_unlock(&mgr->lock); 403 404 atomic64_add(vis_usage, &mgr->vis_usage); 405 406 mem->mm_node = nodes; 407 408 return 0; 409 410 error: 411 while (i--) 412 drm_mm_remove_node(&nodes[i]); 413 spin_unlock(&mgr->lock); 414 atomic64_sub(mem->num_pages << PAGE_SHIFT, &mgr->usage); 415 416 kvfree(nodes); 417 return r; 418 } 419 420 /** 421 * amdgpu_vram_mgr_del - free ranges 422 * 423 * @man: TTM memory type manager 424 * @mem: TTM memory object 425 * 426 * Free the allocated VRAM again. 427 */ 428 static void amdgpu_vram_mgr_del(struct ttm_resource_manager *man, 429 struct ttm_resource *mem) 430 { 431 struct amdgpu_vram_mgr *mgr = to_vram_mgr(man); 432 struct amdgpu_device *adev = to_amdgpu_device(mgr); 433 struct drm_mm_node *nodes = mem->mm_node; 434 uint64_t usage = 0, vis_usage = 0; 435 unsigned pages = mem->num_pages; 436 437 if (!mem->mm_node) 438 return; 439 440 spin_lock(&mgr->lock); 441 while (pages) { 442 pages -= nodes->size; 443 drm_mm_remove_node(nodes); 444 usage += nodes->size << PAGE_SHIFT; 445 vis_usage += amdgpu_vram_mgr_vis_size(adev, nodes); 446 ++nodes; 447 } 448 spin_unlock(&mgr->lock); 449 450 atomic64_sub(usage, &mgr->usage); 451 atomic64_sub(vis_usage, &mgr->vis_usage); 452 453 kvfree(mem->mm_node); 454 mem->mm_node = NULL; 455 } 456 457 /** 458 * amdgpu_vram_mgr_alloc_sgt - allocate and fill a sg table 459 * 460 * @adev: amdgpu device pointer 461 * @mem: TTM memory object 462 * @dev: the other device 463 * @dir: dma direction 464 * @sgt: resulting sg table 465 * 466 * Allocate and fill a sg table from a VRAM allocation. 467 */ 468 int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev, 469 struct ttm_resource *mem, 470 struct device *dev, 471 enum dma_data_direction dir, 472 struct sg_table **sgt) 473 { 474 struct drm_mm_node *node; 475 struct scatterlist *sg; 476 int num_entries = 0; 477 unsigned int pages; 478 int i, r; 479 480 *sgt = kmalloc(sizeof(**sgt), GFP_KERNEL); 481 if (!*sgt) 482 return -ENOMEM; 483 484 for (pages = mem->num_pages, node = mem->mm_node; 485 pages; pages -= node->size, ++node) 486 ++num_entries; 487 488 r = sg_alloc_table(*sgt, num_entries, GFP_KERNEL); 489 if (r) 490 goto error_free; 491 492 for_each_sgtable_sg((*sgt), sg, i) 493 sg->length = 0; 494 495 node = mem->mm_node; 496 for_each_sgtable_sg((*sgt), sg, i) { 497 phys_addr_t phys = (node->start << PAGE_SHIFT) + 498 adev->gmc.aper_base; 499 size_t size = node->size << PAGE_SHIFT; 500 dma_addr_t addr; 501 502 ++node; 503 addr = dma_map_resource(dev, phys, size, dir, 504 DMA_ATTR_SKIP_CPU_SYNC); 505 r = dma_mapping_error(dev, addr); 506 if (r) 507 goto error_unmap; 508 509 sg_set_page(sg, NULL, size, 0); 510 sg_dma_address(sg) = addr; 511 sg_dma_len(sg) = size; 512 } 513 return 0; 514 515 error_unmap: 516 for_each_sgtable_sg((*sgt), sg, i) { 517 if (!sg->length) 518 continue; 519 520 dma_unmap_resource(dev, sg->dma_address, 521 sg->length, dir, 522 DMA_ATTR_SKIP_CPU_SYNC); 523 } 524 sg_free_table(*sgt); 525 526 error_free: 527 kfree(*sgt); 528 return r; 529 } 530 531 /** 532 * amdgpu_vram_mgr_alloc_sgt - allocate and fill a sg table 533 * 534 * @adev: amdgpu device pointer 535 * @sgt: sg table to free 536 * 537 * Free a previously allocate sg table. 538 */ 539 void amdgpu_vram_mgr_free_sgt(struct amdgpu_device *adev, 540 struct device *dev, 541 enum dma_data_direction dir, 542 struct sg_table *sgt) 543 { 544 struct scatterlist *sg; 545 int i; 546 547 for_each_sgtable_sg(sgt, sg, i) 548 dma_unmap_resource(dev, sg->dma_address, 549 sg->length, dir, 550 DMA_ATTR_SKIP_CPU_SYNC); 551 sg_free_table(sgt); 552 kfree(sgt); 553 } 554 555 /** 556 * amdgpu_vram_mgr_usage - how many bytes are used in this domain 557 * 558 * @man: TTM memory type manager 559 * 560 * Returns how many bytes are used in this domain. 561 */ 562 uint64_t amdgpu_vram_mgr_usage(struct ttm_resource_manager *man) 563 { 564 struct amdgpu_vram_mgr *mgr = to_vram_mgr(man); 565 566 return atomic64_read(&mgr->usage); 567 } 568 569 /** 570 * amdgpu_vram_mgr_vis_usage - how many bytes are used in the visible part 571 * 572 * @man: TTM memory type manager 573 * 574 * Returns how many bytes are used in the visible part of VRAM 575 */ 576 uint64_t amdgpu_vram_mgr_vis_usage(struct ttm_resource_manager *man) 577 { 578 struct amdgpu_vram_mgr *mgr = to_vram_mgr(man); 579 580 return atomic64_read(&mgr->vis_usage); 581 } 582 583 /** 584 * amdgpu_vram_mgr_debug - dump VRAM table 585 * 586 * @man: TTM memory type manager 587 * @printer: DRM printer to use 588 * 589 * Dump the table content using printk. 590 */ 591 static void amdgpu_vram_mgr_debug(struct ttm_resource_manager *man, 592 struct drm_printer *printer) 593 { 594 struct amdgpu_vram_mgr *mgr = to_vram_mgr(man); 595 596 spin_lock(&mgr->lock); 597 drm_mm_print(&mgr->mm, printer); 598 spin_unlock(&mgr->lock); 599 600 drm_printf(printer, "man size:%llu pages, ram usage:%lluMB, vis usage:%lluMB\n", 601 man->size, amdgpu_vram_mgr_usage(man) >> 20, 602 amdgpu_vram_mgr_vis_usage(man) >> 20); 603 } 604 605 static const struct ttm_resource_manager_func amdgpu_vram_mgr_func = { 606 .alloc = amdgpu_vram_mgr_new, 607 .free = amdgpu_vram_mgr_del, 608 .debug = amdgpu_vram_mgr_debug 609 }; 610