184ec374bSRyan Taylor /* SPDX-License-Identifier: GPL-2.0+ */
284ec374bSRyan Taylor 
384ec374bSRyan Taylor #ifndef _AMDGPU_VKMS_H_
484ec374bSRyan Taylor #define _AMDGPU_VKMS_H_
584ec374bSRyan Taylor 
684ec374bSRyan Taylor #define XRES_DEF  1024
784ec374bSRyan Taylor #define YRES_DEF   768
884ec374bSRyan Taylor 
984ec374bSRyan Taylor #define XRES_MAX  16384
1084ec374bSRyan Taylor #define YRES_MAX  16384
1184ec374bSRyan Taylor 
1284ec374bSRyan Taylor #define drm_crtc_to_amdgpu_vkms_output(target) \
13*deefd07eSFlora Cui 	container_of(target, struct amdgpu_vkms_output, crtc.base)
1484ec374bSRyan Taylor 
1584ec374bSRyan Taylor extern const struct amdgpu_ip_block_version amdgpu_vkms_ip_block;
1684ec374bSRyan Taylor 
1784ec374bSRyan Taylor struct amdgpu_vkms_output {
18*deefd07eSFlora Cui 	struct amdgpu_crtc crtc;
1984ec374bSRyan Taylor 	struct drm_encoder encoder;
2084ec374bSRyan Taylor 	struct drm_connector connector;
2184ec374bSRyan Taylor 	ktime_t period_ns;
2284ec374bSRyan Taylor 	struct drm_pending_vblank_event *event;
2384ec374bSRyan Taylor };
2484ec374bSRyan Taylor 
2584ec374bSRyan Taylor #endif /* _AMDGPU_VKMS_H_ */
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