1 /* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef __AMDGPU_TTM_H__ 25 #define __AMDGPU_TTM_H__ 26 27 #include <linux/dma-direction.h> 28 #include <drm/gpu_scheduler.h> 29 #include "amdgpu.h" 30 31 #define AMDGPU_PL_GDS (TTM_PL_PRIV + 0) 32 #define AMDGPU_PL_GWS (TTM_PL_PRIV + 1) 33 #define AMDGPU_PL_OA (TTM_PL_PRIV + 2) 34 35 #define AMDGPU_GTT_MAX_TRANSFER_SIZE 512 36 #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS 2 37 38 #define AMDGPU_POISON 0xd0bed0be 39 40 struct amdgpu_vram_reservation { 41 struct list_head node; 42 struct drm_mm_node mm_node; 43 }; 44 45 struct amdgpu_vram_mgr { 46 struct ttm_resource_manager manager; 47 struct drm_mm mm; 48 spinlock_t lock; 49 struct list_head reservations_pending; 50 struct list_head reserved_pages; 51 struct list_head backup_pages; 52 uint32_t num_backup_pages; 53 atomic64_t usage; 54 atomic64_t vis_usage; 55 }; 56 57 struct amdgpu_gtt_mgr { 58 struct ttm_resource_manager manager; 59 struct drm_mm mm; 60 spinlock_t lock; 61 atomic64_t available; 62 }; 63 64 struct amdgpu_mman { 65 struct ttm_bo_device bdev; 66 bool initialized; 67 void __iomem *aper_base_kaddr; 68 69 /* buffer handling */ 70 const struct amdgpu_buffer_funcs *buffer_funcs; 71 struct amdgpu_ring *buffer_funcs_ring; 72 bool buffer_funcs_enabled; 73 74 struct mutex gtt_window_lock; 75 /* Scheduler entity for buffer moves */ 76 struct drm_sched_entity entity; 77 78 struct amdgpu_vram_mgr vram_mgr; 79 struct amdgpu_gtt_mgr gtt_mgr; 80 81 uint64_t stolen_vga_size; 82 struct amdgpu_bo *stolen_vga_memory; 83 uint64_t stolen_extended_size; 84 struct amdgpu_bo *stolen_extended_memory; 85 bool keep_stolen_vga_memory; 86 87 /* discovery */ 88 uint8_t *discovery_bin; 89 uint32_t discovery_tmr_size; 90 struct amdgpu_bo *discovery_memory; 91 92 /* firmware VRAM reservation */ 93 u64 fw_vram_usage_start_offset; 94 u64 fw_vram_usage_size; 95 struct amdgpu_bo *fw_vram_usage_reserved_bo; 96 void *fw_vram_usage_va; 97 }; 98 99 struct amdgpu_copy_mem { 100 struct ttm_buffer_object *bo; 101 struct ttm_resource *mem; 102 unsigned long offset; 103 }; 104 105 int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size); 106 void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev); 107 int amdgpu_vram_mgr_init(struct amdgpu_device *adev); 108 void amdgpu_vram_mgr_fini(struct amdgpu_device *adev); 109 110 bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *mem); 111 uint64_t amdgpu_gtt_mgr_usage(struct ttm_resource_manager *man); 112 int amdgpu_gtt_mgr_recover(struct ttm_resource_manager *man); 113 114 u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo); 115 int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev, 116 struct ttm_resource *mem, 117 struct device *dev, 118 enum dma_data_direction dir, 119 struct sg_table **sgt); 120 void amdgpu_vram_mgr_free_sgt(struct device *dev, 121 enum dma_data_direction dir, 122 struct sg_table *sgt); 123 uint64_t amdgpu_vram_mgr_usage(struct ttm_resource_manager *man); 124 uint64_t amdgpu_vram_mgr_vis_usage(struct ttm_resource_manager *man); 125 int amdgpu_vram_mgr_reserve_range(struct ttm_resource_manager *man, 126 uint64_t start, uint64_t size); 127 int amdgpu_vram_mgr_reserve_backup_pages(struct ttm_resource_manager *man, 128 uint32_t num_pages); 129 int amdgpu_vram_mgr_query_page_status(struct ttm_resource_manager *man, 130 uint64_t start); 131 132 int amdgpu_ttm_init(struct amdgpu_device *adev); 133 void amdgpu_ttm_fini(struct amdgpu_device *adev); 134 void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, 135 bool enable); 136 137 int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset, 138 uint64_t dst_offset, uint32_t byte_count, 139 struct dma_resv *resv, 140 struct dma_fence **fence, bool direct_submit, 141 bool vm_needs_flush, bool tmz); 142 int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev, 143 const struct amdgpu_copy_mem *src, 144 const struct amdgpu_copy_mem *dst, 145 uint64_t size, bool tmz, 146 struct dma_resv *resv, 147 struct dma_fence **f); 148 int amdgpu_fill_buffer(struct amdgpu_bo *bo, 149 uint32_t src_data, 150 struct dma_resv *resv, 151 struct dma_fence **fence); 152 153 int amdgpu_mmap(struct file *filp, struct vm_area_struct *vma); 154 int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo); 155 int amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo); 156 uint64_t amdgpu_ttm_domain_start(struct amdgpu_device *adev, uint32_t type); 157 158 #if IS_ENABLED(CONFIG_DRM_AMDGPU_USERPTR) 159 int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo, struct page **pages); 160 bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm); 161 #else 162 static inline int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo, 163 struct page **pages) 164 { 165 return -EPERM; 166 } 167 static inline bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm) 168 { 169 return false; 170 } 171 #endif 172 173 void amdgpu_ttm_tt_set_user_pages(struct ttm_tt *ttm, struct page **pages); 174 int amdgpu_ttm_tt_set_userptr(struct ttm_buffer_object *bo, 175 uint64_t addr, uint32_t flags); 176 bool amdgpu_ttm_tt_has_userptr(struct ttm_tt *ttm); 177 struct mm_struct *amdgpu_ttm_tt_get_usermm(struct ttm_tt *ttm); 178 bool amdgpu_ttm_tt_affect_userptr(struct ttm_tt *ttm, unsigned long start, 179 unsigned long end); 180 bool amdgpu_ttm_tt_userptr_invalidated(struct ttm_tt *ttm, 181 int *last_invalidated); 182 bool amdgpu_ttm_tt_is_userptr(struct ttm_tt *ttm); 183 bool amdgpu_ttm_tt_is_readonly(struct ttm_tt *ttm); 184 uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem); 185 uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt *ttm, 186 struct ttm_resource *mem); 187 188 void amdgpu_ttm_debugfs_init(struct amdgpu_device *adev); 189 190 #endif 191