1 /*
2  * Copyright 2016 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23 
24 #ifndef __AMDGPU_TTM_H__
25 #define __AMDGPU_TTM_H__
26 
27 #include <linux/dma-direction.h>
28 #include <drm/gpu_scheduler.h>
29 #include "amdgpu.h"
30 
31 #define AMDGPU_PL_GDS		(TTM_PL_PRIV + 0)
32 #define AMDGPU_PL_GWS		(TTM_PL_PRIV + 1)
33 #define AMDGPU_PL_OA		(TTM_PL_PRIV + 2)
34 #define AMDGPU_PL_PREEMPT	(TTM_PL_PRIV + 3)
35 
36 #define AMDGPU_GTT_MAX_TRANSFER_SIZE	512
37 #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS	2
38 
39 #define AMDGPU_POISON	0xd0bed0be
40 
41 struct amdgpu_vram_mgr {
42 	struct ttm_resource_manager manager;
43 	struct drm_mm mm;
44 	spinlock_t lock;
45 	struct list_head reservations_pending;
46 	struct list_head reserved_pages;
47 	atomic64_t usage;
48 	atomic64_t vis_usage;
49 };
50 
51 struct amdgpu_gtt_mgr {
52 	struct ttm_resource_manager manager;
53 	struct drm_mm mm;
54 	spinlock_t lock;
55 	atomic64_t used;
56 };
57 
58 struct amdgpu_preempt_mgr {
59 	struct ttm_resource_manager manager;
60 	atomic64_t used;
61 };
62 
63 struct amdgpu_mman {
64 	struct ttm_device		bdev;
65 	bool				initialized;
66 	void __iomem			*aper_base_kaddr;
67 
68 	/* buffer handling */
69 	const struct amdgpu_buffer_funcs	*buffer_funcs;
70 	struct amdgpu_ring			*buffer_funcs_ring;
71 	bool					buffer_funcs_enabled;
72 
73 	struct mutex				gtt_window_lock;
74 	/* Scheduler entity for buffer moves */
75 	struct drm_sched_entity			entity;
76 
77 	struct amdgpu_vram_mgr vram_mgr;
78 	struct amdgpu_gtt_mgr gtt_mgr;
79 	struct amdgpu_preempt_mgr preempt_mgr;
80 
81 	uint64_t		stolen_vga_size;
82 	struct amdgpu_bo	*stolen_vga_memory;
83 	uint64_t		stolen_extended_size;
84 	struct amdgpu_bo	*stolen_extended_memory;
85 	bool			keep_stolen_vga_memory;
86 
87 	struct amdgpu_bo	*stolen_reserved_memory;
88 	uint64_t		stolen_reserved_offset;
89 	uint64_t		stolen_reserved_size;
90 
91 	/* discovery */
92 	uint8_t				*discovery_bin;
93 	uint32_t			discovery_tmr_size;
94 	struct amdgpu_bo		*discovery_memory;
95 
96 	/* firmware VRAM reservation */
97 	u64		fw_vram_usage_start_offset;
98 	u64		fw_vram_usage_size;
99 	struct amdgpu_bo	*fw_vram_usage_reserved_bo;
100 	void		*fw_vram_usage_va;
101 };
102 
103 struct amdgpu_copy_mem {
104 	struct ttm_buffer_object	*bo;
105 	struct ttm_resource		*mem;
106 	unsigned long			offset;
107 };
108 
109 int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size);
110 void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev);
111 int amdgpu_preempt_mgr_init(struct amdgpu_device *adev);
112 void amdgpu_preempt_mgr_fini(struct amdgpu_device *adev);
113 int amdgpu_vram_mgr_init(struct amdgpu_device *adev);
114 void amdgpu_vram_mgr_fini(struct amdgpu_device *adev);
115 
116 bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *mem);
117 uint64_t amdgpu_gtt_mgr_usage(struct ttm_resource_manager *man);
118 int amdgpu_gtt_mgr_recover(struct ttm_resource_manager *man);
119 
120 uint64_t amdgpu_preempt_mgr_usage(struct ttm_resource_manager *man);
121 
122 u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo);
123 int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
124 			      struct ttm_resource *mem,
125 			      u64 offset, u64 size,
126 			      struct device *dev,
127 			      enum dma_data_direction dir,
128 			      struct sg_table **sgt);
129 void amdgpu_vram_mgr_free_sgt(struct device *dev,
130 			      enum dma_data_direction dir,
131 			      struct sg_table *sgt);
132 uint64_t amdgpu_vram_mgr_usage(struct ttm_resource_manager *man);
133 uint64_t amdgpu_vram_mgr_vis_usage(struct ttm_resource_manager *man);
134 int amdgpu_vram_mgr_reserve_range(struct ttm_resource_manager *man,
135 				  uint64_t start, uint64_t size);
136 int amdgpu_vram_mgr_query_page_status(struct ttm_resource_manager *man,
137 				      uint64_t start);
138 
139 int amdgpu_ttm_init(struct amdgpu_device *adev);
140 void amdgpu_ttm_fini(struct amdgpu_device *adev);
141 void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev,
142 					bool enable);
143 
144 int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
145 		       uint64_t dst_offset, uint32_t byte_count,
146 		       struct dma_resv *resv,
147 		       struct dma_fence **fence, bool direct_submit,
148 		       bool vm_needs_flush, bool tmz);
149 int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
150 			       const struct amdgpu_copy_mem *src,
151 			       const struct amdgpu_copy_mem *dst,
152 			       uint64_t size, bool tmz,
153 			       struct dma_resv *resv,
154 			       struct dma_fence **f);
155 int amdgpu_fill_buffer(struct amdgpu_bo *bo,
156 			uint32_t src_data,
157 			struct dma_resv *resv,
158 			struct dma_fence **fence);
159 
160 int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo);
161 int amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo);
162 uint64_t amdgpu_ttm_domain_start(struct amdgpu_device *adev, uint32_t type);
163 
164 #if IS_ENABLED(CONFIG_DRM_AMDGPU_USERPTR)
165 int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo, struct page **pages);
166 bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm);
167 #else
168 static inline int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo,
169 					       struct page **pages)
170 {
171 	return -EPERM;
172 }
173 static inline bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm)
174 {
175 	return false;
176 }
177 #endif
178 
179 void amdgpu_ttm_tt_set_user_pages(struct ttm_tt *ttm, struct page **pages);
180 int amdgpu_ttm_tt_set_userptr(struct ttm_buffer_object *bo,
181 			      uint64_t addr, uint32_t flags);
182 bool amdgpu_ttm_tt_has_userptr(struct ttm_tt *ttm);
183 struct mm_struct *amdgpu_ttm_tt_get_usermm(struct ttm_tt *ttm);
184 bool amdgpu_ttm_tt_affect_userptr(struct ttm_tt *ttm, unsigned long start,
185 				  unsigned long end, unsigned long *userptr);
186 bool amdgpu_ttm_tt_userptr_invalidated(struct ttm_tt *ttm,
187 				       int *last_invalidated);
188 bool amdgpu_ttm_tt_is_userptr(struct ttm_tt *ttm);
189 bool amdgpu_ttm_tt_is_readonly(struct ttm_tt *ttm);
190 uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem);
191 uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt *ttm,
192 				 struct ttm_resource *mem);
193 int amdgpu_ttm_evict_resources(struct amdgpu_device *adev, int mem_type);
194 
195 void amdgpu_ttm_debugfs_init(struct amdgpu_device *adev);
196 
197 #endif
198