1 /*
2  * Copyright 2016 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23 
24 #ifndef __AMDGPU_TTM_H__
25 #define __AMDGPU_TTM_H__
26 
27 #include <linux/dma-direction.h>
28 #include <drm/gpu_scheduler.h>
29 #include "amdgpu.h"
30 
31 #define AMDGPU_PL_GDS		(TTM_PL_PRIV + 0)
32 #define AMDGPU_PL_GWS		(TTM_PL_PRIV + 1)
33 #define AMDGPU_PL_OA		(TTM_PL_PRIV + 2)
34 
35 #define AMDGPU_PL_FLAG_GDS		(TTM_PL_FLAG_PRIV << 0)
36 #define AMDGPU_PL_FLAG_GWS		(TTM_PL_FLAG_PRIV << 1)
37 #define AMDGPU_PL_FLAG_OA		(TTM_PL_FLAG_PRIV << 2)
38 
39 #define AMDGPU_GTT_MAX_TRANSFER_SIZE	512
40 #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS	2
41 
42 #define AMDGPU_POISON	0xd0bed0be
43 
44 struct amdgpu_vram_mgr {
45 	struct ttm_resource_manager manager;
46 	struct drm_mm mm;
47 	spinlock_t lock;
48 	atomic64_t usage;
49 	atomic64_t vis_usage;
50 };
51 
52 struct amdgpu_gtt_mgr {
53 	struct ttm_resource_manager manager;
54 	struct drm_mm mm;
55 	spinlock_t lock;
56 	atomic64_t available;
57 };
58 
59 struct amdgpu_mman {
60 	struct ttm_bo_device		bdev;
61 	bool				mem_global_referenced;
62 	bool				initialized;
63 	void __iomem			*aper_base_kaddr;
64 
65 #if defined(CONFIG_DEBUG_FS)
66 	struct dentry			*debugfs_entries[8];
67 #endif
68 
69 	/* buffer handling */
70 	const struct amdgpu_buffer_funcs	*buffer_funcs;
71 	struct amdgpu_ring			*buffer_funcs_ring;
72 	bool					buffer_funcs_enabled;
73 
74 	struct mutex				gtt_window_lock;
75 	/* Scheduler entity for buffer moves */
76 	struct drm_sched_entity			entity;
77 
78 	struct amdgpu_vram_mgr vram_mgr;
79 	struct amdgpu_gtt_mgr gtt_mgr;
80 };
81 
82 struct amdgpu_copy_mem {
83 	struct ttm_buffer_object	*bo;
84 	struct ttm_resource		*mem;
85 	unsigned long			offset;
86 };
87 
88 int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size);
89 void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev);
90 int amdgpu_vram_mgr_init(struct amdgpu_device *adev);
91 void amdgpu_vram_mgr_fini(struct amdgpu_device *adev);
92 
93 bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *mem);
94 uint64_t amdgpu_gtt_mgr_usage(struct ttm_resource_manager *man);
95 int amdgpu_gtt_mgr_recover(struct ttm_resource_manager *man);
96 
97 u64 amdgpu_vram_mgr_bo_visible_size(struct amdgpu_bo *bo);
98 int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
99 			      struct ttm_resource *mem,
100 			      struct device *dev,
101 			      enum dma_data_direction dir,
102 			      struct sg_table **sgt);
103 void amdgpu_vram_mgr_free_sgt(struct amdgpu_device *adev,
104 			      struct device *dev,
105 			      enum dma_data_direction dir,
106 			      struct sg_table *sgt);
107 uint64_t amdgpu_vram_mgr_usage(struct ttm_resource_manager *man);
108 uint64_t amdgpu_vram_mgr_vis_usage(struct ttm_resource_manager *man);
109 
110 int amdgpu_ttm_init(struct amdgpu_device *adev);
111 void amdgpu_ttm_late_init(struct amdgpu_device *adev);
112 void amdgpu_ttm_fini(struct amdgpu_device *adev);
113 void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev,
114 					bool enable);
115 
116 int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
117 		       uint64_t dst_offset, uint32_t byte_count,
118 		       struct dma_resv *resv,
119 		       struct dma_fence **fence, bool direct_submit,
120 		       bool vm_needs_flush, bool tmz);
121 int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
122 			       const struct amdgpu_copy_mem *src,
123 			       const struct amdgpu_copy_mem *dst,
124 			       uint64_t size, bool tmz,
125 			       struct dma_resv *resv,
126 			       struct dma_fence **f);
127 int amdgpu_fill_buffer(struct amdgpu_bo *bo,
128 			uint32_t src_data,
129 			struct dma_resv *resv,
130 			struct dma_fence **fence);
131 
132 int amdgpu_mmap(struct file *filp, struct vm_area_struct *vma);
133 int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo);
134 int amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo);
135 uint64_t amdgpu_ttm_domain_start(struct amdgpu_device *adev, uint32_t type);
136 
137 #if IS_ENABLED(CONFIG_DRM_AMDGPU_USERPTR)
138 int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo, struct page **pages);
139 bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm);
140 #else
141 static inline int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo,
142 					       struct page **pages)
143 {
144 	return -EPERM;
145 }
146 static inline bool amdgpu_ttm_tt_get_user_pages_done(struct ttm_tt *ttm)
147 {
148 	return false;
149 }
150 #endif
151 
152 void amdgpu_ttm_tt_set_user_pages(struct ttm_tt *ttm, struct page **pages);
153 int amdgpu_ttm_tt_set_userptr(struct ttm_buffer_object *bo,
154 			      uint64_t addr, uint32_t flags);
155 bool amdgpu_ttm_tt_has_userptr(struct ttm_tt *ttm);
156 struct mm_struct *amdgpu_ttm_tt_get_usermm(struct ttm_tt *ttm);
157 bool amdgpu_ttm_tt_affect_userptr(struct ttm_tt *ttm, unsigned long start,
158 				  unsigned long end);
159 bool amdgpu_ttm_tt_userptr_invalidated(struct ttm_tt *ttm,
160 				       int *last_invalidated);
161 bool amdgpu_ttm_tt_is_userptr(struct ttm_tt *ttm);
162 bool amdgpu_ttm_tt_is_readonly(struct ttm_tt *ttm);
163 uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_resource *mem);
164 uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt *ttm,
165 				 struct ttm_resource *mem);
166 
167 int amdgpu_ttm_debugfs_init(struct amdgpu_device *adev);
168 
169 #endif
170