1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #if !defined(_AMDGPU_TRACE_H) || defined(TRACE_HEADER_MULTI_READ) 3 #define _AMDGPU_TRACE_H_ 4 5 #include <linux/stringify.h> 6 #include <linux/types.h> 7 #include <linux/tracepoint.h> 8 9 #include <drm/drmP.h> 10 11 #undef TRACE_SYSTEM 12 #define TRACE_SYSTEM amdgpu 13 #define TRACE_INCLUDE_FILE amdgpu_trace 14 15 #define AMDGPU_JOB_GET_TIMELINE_NAME(job) \ 16 job->base.s_fence->finished.ops->get_timeline_name(&job->base.s_fence->finished) 17 18 TRACE_EVENT(amdgpu_mm_rreg, 19 TP_PROTO(unsigned did, uint32_t reg, uint32_t value), 20 TP_ARGS(did, reg, value), 21 TP_STRUCT__entry( 22 __field(unsigned, did) 23 __field(uint32_t, reg) 24 __field(uint32_t, value) 25 ), 26 TP_fast_assign( 27 __entry->did = did; 28 __entry->reg = reg; 29 __entry->value = value; 30 ), 31 TP_printk("0x%04lx, 0x%08lx, 0x%08lx", 32 (unsigned long)__entry->did, 33 (unsigned long)__entry->reg, 34 (unsigned long)__entry->value) 35 ); 36 37 TRACE_EVENT(amdgpu_mm_wreg, 38 TP_PROTO(unsigned did, uint32_t reg, uint32_t value), 39 TP_ARGS(did, reg, value), 40 TP_STRUCT__entry( 41 __field(unsigned, did) 42 __field(uint32_t, reg) 43 __field(uint32_t, value) 44 ), 45 TP_fast_assign( 46 __entry->did = did; 47 __entry->reg = reg; 48 __entry->value = value; 49 ), 50 TP_printk("0x%04lx, 0x%08lx, 0x%08lx", 51 (unsigned long)__entry->did, 52 (unsigned long)__entry->reg, 53 (unsigned long)__entry->value) 54 ); 55 56 TRACE_EVENT(amdgpu_iv, 57 TP_PROTO(struct amdgpu_iv_entry *iv), 58 TP_ARGS(iv), 59 TP_STRUCT__entry( 60 __field(unsigned, client_id) 61 __field(unsigned, src_id) 62 __field(unsigned, ring_id) 63 __field(unsigned, vm_id) 64 __field(unsigned, vm_id_src) 65 __field(uint64_t, timestamp) 66 __field(unsigned, timestamp_src) 67 __field(unsigned, pas_id) 68 __array(unsigned, src_data, 4) 69 ), 70 TP_fast_assign( 71 __entry->client_id = iv->client_id; 72 __entry->src_id = iv->src_id; 73 __entry->ring_id = iv->ring_id; 74 __entry->vm_id = iv->vm_id; 75 __entry->vm_id_src = iv->vm_id_src; 76 __entry->timestamp = iv->timestamp; 77 __entry->timestamp_src = iv->timestamp_src; 78 __entry->pas_id = iv->pas_id; 79 __entry->src_data[0] = iv->src_data[0]; 80 __entry->src_data[1] = iv->src_data[1]; 81 __entry->src_data[2] = iv->src_data[2]; 82 __entry->src_data[3] = iv->src_data[3]; 83 ), 84 TP_printk("client_id:%u src_id:%u ring:%u vm_id:%u timestamp: %llu pas_id:%u src_data: %08x %08x %08x %08x\n", 85 __entry->client_id, __entry->src_id, 86 __entry->ring_id, __entry->vm_id, 87 __entry->timestamp, __entry->pas_id, 88 __entry->src_data[0], __entry->src_data[1], 89 __entry->src_data[2], __entry->src_data[3]) 90 ); 91 92 93 TRACE_EVENT(amdgpu_bo_create, 94 TP_PROTO(struct amdgpu_bo *bo), 95 TP_ARGS(bo), 96 TP_STRUCT__entry( 97 __field(struct amdgpu_bo *, bo) 98 __field(u32, pages) 99 __field(u32, type) 100 __field(u32, prefer) 101 __field(u32, allow) 102 __field(u32, visible) 103 ), 104 105 TP_fast_assign( 106 __entry->bo = bo; 107 __entry->pages = bo->tbo.num_pages; 108 __entry->type = bo->tbo.mem.mem_type; 109 __entry->prefer = bo->preferred_domains; 110 __entry->allow = bo->allowed_domains; 111 __entry->visible = bo->flags; 112 ), 113 114 TP_printk("bo=%p, pages=%u, type=%d, preferred=%d, allowed=%d, visible=%d", 115 __entry->bo, __entry->pages, __entry->type, 116 __entry->prefer, __entry->allow, __entry->visible) 117 ); 118 119 TRACE_EVENT(amdgpu_cs, 120 TP_PROTO(struct amdgpu_cs_parser *p, int i), 121 TP_ARGS(p, i), 122 TP_STRUCT__entry( 123 __field(struct amdgpu_bo_list *, bo_list) 124 __field(u32, ring) 125 __field(u32, dw) 126 __field(u32, fences) 127 ), 128 129 TP_fast_assign( 130 __entry->bo_list = p->bo_list; 131 __entry->ring = p->job->ring->idx; 132 __entry->dw = p->job->ibs[i].length_dw; 133 __entry->fences = amdgpu_fence_count_emitted( 134 p->job->ring); 135 ), 136 TP_printk("bo_list=%p, ring=%u, dw=%u, fences=%u", 137 __entry->bo_list, __entry->ring, __entry->dw, 138 __entry->fences) 139 ); 140 141 TRACE_EVENT(amdgpu_cs_ioctl, 142 TP_PROTO(struct amdgpu_job *job), 143 TP_ARGS(job), 144 TP_STRUCT__entry( 145 __field(uint64_t, sched_job_id) 146 __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) 147 __field(unsigned int, context) 148 __field(unsigned int, seqno) 149 __field(struct dma_fence *, fence) 150 __field(char *, ring_name) 151 __field(u32, num_ibs) 152 ), 153 154 TP_fast_assign( 155 __entry->sched_job_id = job->base.id; 156 __assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) 157 __entry->context = job->base.s_fence->finished.context; 158 __entry->seqno = job->base.s_fence->finished.seqno; 159 __entry->ring_name = job->ring->name; 160 __entry->num_ibs = job->num_ibs; 161 ), 162 TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u", 163 __entry->sched_job_id, __get_str(timeline), __entry->context, 164 __entry->seqno, __entry->ring_name, __entry->num_ibs) 165 ); 166 167 TRACE_EVENT(amdgpu_sched_run_job, 168 TP_PROTO(struct amdgpu_job *job), 169 TP_ARGS(job), 170 TP_STRUCT__entry( 171 __field(uint64_t, sched_job_id) 172 __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) 173 __field(unsigned int, context) 174 __field(unsigned int, seqno) 175 __field(char *, ring_name) 176 __field(u32, num_ibs) 177 ), 178 179 TP_fast_assign( 180 __entry->sched_job_id = job->base.id; 181 __assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) 182 __entry->context = job->base.s_fence->finished.context; 183 __entry->seqno = job->base.s_fence->finished.seqno; 184 __entry->ring_name = job->ring->name; 185 __entry->num_ibs = job->num_ibs; 186 ), 187 TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u", 188 __entry->sched_job_id, __get_str(timeline), __entry->context, 189 __entry->seqno, __entry->ring_name, __entry->num_ibs) 190 ); 191 192 193 TRACE_EVENT(amdgpu_vm_grab_id, 194 TP_PROTO(struct amdgpu_vm *vm, struct amdgpu_ring *ring, 195 struct amdgpu_job *job), 196 TP_ARGS(vm, ring, job), 197 TP_STRUCT__entry( 198 __field(struct amdgpu_vm *, vm) 199 __field(u32, ring) 200 __field(u32, vm_id) 201 __field(u32, vm_hub) 202 __field(u64, pd_addr) 203 __field(u32, needs_flush) 204 ), 205 206 TP_fast_assign( 207 __entry->vm = vm; 208 __entry->ring = ring->idx; 209 __entry->vm_id = job->vm_id; 210 __entry->vm_hub = ring->funcs->vmhub, 211 __entry->pd_addr = job->vm_pd_addr; 212 __entry->needs_flush = job->vm_needs_flush; 213 ), 214 TP_printk("vm=%p, ring=%u, id=%u, hub=%u, pd_addr=%010Lx needs_flush=%u", 215 __entry->vm, __entry->ring, __entry->vm_id, 216 __entry->vm_hub, __entry->pd_addr, __entry->needs_flush) 217 ); 218 219 TRACE_EVENT(amdgpu_vm_bo_map, 220 TP_PROTO(struct amdgpu_bo_va *bo_va, 221 struct amdgpu_bo_va_mapping *mapping), 222 TP_ARGS(bo_va, mapping), 223 TP_STRUCT__entry( 224 __field(struct amdgpu_bo *, bo) 225 __field(long, start) 226 __field(long, last) 227 __field(u64, offset) 228 __field(u64, flags) 229 ), 230 231 TP_fast_assign( 232 __entry->bo = bo_va ? bo_va->base.bo : NULL; 233 __entry->start = mapping->start; 234 __entry->last = mapping->last; 235 __entry->offset = mapping->offset; 236 __entry->flags = mapping->flags; 237 ), 238 TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx", 239 __entry->bo, __entry->start, __entry->last, 240 __entry->offset, __entry->flags) 241 ); 242 243 TRACE_EVENT(amdgpu_vm_bo_unmap, 244 TP_PROTO(struct amdgpu_bo_va *bo_va, 245 struct amdgpu_bo_va_mapping *mapping), 246 TP_ARGS(bo_va, mapping), 247 TP_STRUCT__entry( 248 __field(struct amdgpu_bo *, bo) 249 __field(long, start) 250 __field(long, last) 251 __field(u64, offset) 252 __field(u64, flags) 253 ), 254 255 TP_fast_assign( 256 __entry->bo = bo_va->base.bo; 257 __entry->start = mapping->start; 258 __entry->last = mapping->last; 259 __entry->offset = mapping->offset; 260 __entry->flags = mapping->flags; 261 ), 262 TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx", 263 __entry->bo, __entry->start, __entry->last, 264 __entry->offset, __entry->flags) 265 ); 266 267 DECLARE_EVENT_CLASS(amdgpu_vm_mapping, 268 TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 269 TP_ARGS(mapping), 270 TP_STRUCT__entry( 271 __field(u64, soffset) 272 __field(u64, eoffset) 273 __field(u64, flags) 274 ), 275 276 TP_fast_assign( 277 __entry->soffset = mapping->start; 278 __entry->eoffset = mapping->last + 1; 279 __entry->flags = mapping->flags; 280 ), 281 TP_printk("soffs=%010llx, eoffs=%010llx, flags=%llx", 282 __entry->soffset, __entry->eoffset, __entry->flags) 283 ); 284 285 DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_update, 286 TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 287 TP_ARGS(mapping) 288 ); 289 290 DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_mapping, 291 TP_PROTO(struct amdgpu_bo_va_mapping *mapping), 292 TP_ARGS(mapping) 293 ); 294 295 TRACE_EVENT(amdgpu_vm_set_ptes, 296 TP_PROTO(uint64_t pe, uint64_t addr, unsigned count, 297 uint32_t incr, uint64_t flags), 298 TP_ARGS(pe, addr, count, incr, flags), 299 TP_STRUCT__entry( 300 __field(u64, pe) 301 __field(u64, addr) 302 __field(u32, count) 303 __field(u32, incr) 304 __field(u64, flags) 305 ), 306 307 TP_fast_assign( 308 __entry->pe = pe; 309 __entry->addr = addr; 310 __entry->count = count; 311 __entry->incr = incr; 312 __entry->flags = flags; 313 ), 314 TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%llx, count=%u", 315 __entry->pe, __entry->addr, __entry->incr, 316 __entry->flags, __entry->count) 317 ); 318 319 TRACE_EVENT(amdgpu_vm_copy_ptes, 320 TP_PROTO(uint64_t pe, uint64_t src, unsigned count), 321 TP_ARGS(pe, src, count), 322 TP_STRUCT__entry( 323 __field(u64, pe) 324 __field(u64, src) 325 __field(u32, count) 326 ), 327 328 TP_fast_assign( 329 __entry->pe = pe; 330 __entry->src = src; 331 __entry->count = count; 332 ), 333 TP_printk("pe=%010Lx, src=%010Lx, count=%u", 334 __entry->pe, __entry->src, __entry->count) 335 ); 336 337 TRACE_EVENT(amdgpu_vm_flush, 338 TP_PROTO(struct amdgpu_ring *ring, unsigned vm_id, 339 uint64_t pd_addr), 340 TP_ARGS(ring, vm_id, pd_addr), 341 TP_STRUCT__entry( 342 __field(u32, ring) 343 __field(u32, vm_id) 344 __field(u32, vm_hub) 345 __field(u64, pd_addr) 346 ), 347 348 TP_fast_assign( 349 __entry->ring = ring->idx; 350 __entry->vm_id = vm_id; 351 __entry->vm_hub = ring->funcs->vmhub; 352 __entry->pd_addr = pd_addr; 353 ), 354 TP_printk("ring=%u, id=%u, hub=%u, pd_addr=%010Lx", 355 __entry->ring, __entry->vm_id, 356 __entry->vm_hub,__entry->pd_addr) 357 ); 358 359 TRACE_EVENT(amdgpu_bo_list_set, 360 TP_PROTO(struct amdgpu_bo_list *list, struct amdgpu_bo *bo), 361 TP_ARGS(list, bo), 362 TP_STRUCT__entry( 363 __field(struct amdgpu_bo_list *, list) 364 __field(struct amdgpu_bo *, bo) 365 __field(u64, bo_size) 366 ), 367 368 TP_fast_assign( 369 __entry->list = list; 370 __entry->bo = bo; 371 __entry->bo_size = amdgpu_bo_size(bo); 372 ), 373 TP_printk("list=%p, bo=%p, bo_size=%Ld", 374 __entry->list, 375 __entry->bo, 376 __entry->bo_size) 377 ); 378 379 TRACE_EVENT(amdgpu_cs_bo_status, 380 TP_PROTO(uint64_t total_bo, uint64_t total_size), 381 TP_ARGS(total_bo, total_size), 382 TP_STRUCT__entry( 383 __field(u64, total_bo) 384 __field(u64, total_size) 385 ), 386 387 TP_fast_assign( 388 __entry->total_bo = total_bo; 389 __entry->total_size = total_size; 390 ), 391 TP_printk("total_bo_size=%Ld, total_bo_count=%Ld", 392 __entry->total_bo, __entry->total_size) 393 ); 394 395 TRACE_EVENT(amdgpu_ttm_bo_move, 396 TP_PROTO(struct amdgpu_bo* bo, uint32_t new_placement, uint32_t old_placement), 397 TP_ARGS(bo, new_placement, old_placement), 398 TP_STRUCT__entry( 399 __field(struct amdgpu_bo *, bo) 400 __field(u64, bo_size) 401 __field(u32, new_placement) 402 __field(u32, old_placement) 403 ), 404 405 TP_fast_assign( 406 __entry->bo = bo; 407 __entry->bo_size = amdgpu_bo_size(bo); 408 __entry->new_placement = new_placement; 409 __entry->old_placement = old_placement; 410 ), 411 TP_printk("bo=%p, from=%d, to=%d, size=%Ld", 412 __entry->bo, __entry->old_placement, 413 __entry->new_placement, __entry->bo_size) 414 ); 415 416 #undef AMDGPU_JOB_GET_TIMELINE_NAME 417 #endif 418 419 /* This part must be outside protection */ 420 #undef TRACE_INCLUDE_PATH 421 #define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/amd/amdgpu 422 #include <trace/define_trace.h> 423