1 /*
2  * Copyright 2014 Advanced Micro Devices, Inc.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sub license, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
20  *
21  * The above copyright notice and this permission notice (including the
22  * next paragraph) shall be included in all copies or substantial portions
23  * of the Software.
24  *
25  */
26 /*
27  * Authors:
28  *    Christian König <christian.koenig@amd.com>
29  */
30 
31 #include "amdgpu.h"
32 #include "amdgpu_trace.h"
33 #include "amdgpu_amdkfd.h"
34 
35 struct amdgpu_sync_entry {
36 	struct hlist_node	node;
37 	struct dma_fence	*fence;
38 	bool	explicit;
39 };
40 
41 static struct kmem_cache *amdgpu_sync_slab;
42 
43 /**
44  * amdgpu_sync_create - zero init sync object
45  *
46  * @sync: sync object to initialize
47  *
48  * Just clear the sync object for now.
49  */
50 void amdgpu_sync_create(struct amdgpu_sync *sync)
51 {
52 	hash_init(sync->fences);
53 	sync->last_vm_update = NULL;
54 }
55 
56 /**
57  * amdgpu_sync_same_dev - test if fence belong to us
58  *
59  * @adev: amdgpu device to use for the test
60  * @f: fence to test
61  *
62  * Test if the fence was issued by us.
63  */
64 static bool amdgpu_sync_same_dev(struct amdgpu_device *adev,
65 				 struct dma_fence *f)
66 {
67 	struct drm_sched_fence *s_fence = to_drm_sched_fence(f);
68 
69 	if (s_fence) {
70 		struct amdgpu_ring *ring;
71 
72 		ring = container_of(s_fence->sched, struct amdgpu_ring, sched);
73 		return ring->adev == adev;
74 	}
75 
76 	return false;
77 }
78 
79 /**
80  * amdgpu_sync_get_owner - extract the owner of a fence
81  *
82  * @fence: fence get the owner from
83  *
84  * Extract who originally created the fence.
85  */
86 static void *amdgpu_sync_get_owner(struct dma_fence *f)
87 {
88 	struct drm_sched_fence *s_fence;
89 	struct amdgpu_amdkfd_fence *kfd_fence;
90 
91 	if (!f)
92 		return AMDGPU_FENCE_OWNER_UNDEFINED;
93 
94 	s_fence = to_drm_sched_fence(f);
95 	if (s_fence)
96 		return s_fence->owner;
97 
98 	kfd_fence = to_amdgpu_amdkfd_fence(f);
99 	if (kfd_fence)
100 		return AMDGPU_FENCE_OWNER_KFD;
101 
102 	return AMDGPU_FENCE_OWNER_UNDEFINED;
103 }
104 
105 /**
106  * amdgpu_sync_keep_later - Keep the later fence
107  *
108  * @keep: existing fence to test
109  * @fence: new fence
110  *
111  * Either keep the existing fence or the new one, depending which one is later.
112  */
113 static void amdgpu_sync_keep_later(struct dma_fence **keep,
114 				   struct dma_fence *fence)
115 {
116 	if (*keep && dma_fence_is_later(*keep, fence))
117 		return;
118 
119 	dma_fence_put(*keep);
120 	*keep = dma_fence_get(fence);
121 }
122 
123 /**
124  * amdgpu_sync_add_later - add the fence to the hash
125  *
126  * @sync: sync object to add the fence to
127  * @f: fence to add
128  *
129  * Tries to add the fence to an existing hash entry. Returns true when an entry
130  * was found, false otherwise.
131  */
132 static bool amdgpu_sync_add_later(struct amdgpu_sync *sync, struct dma_fence *f,
133 				  bool explicit)
134 {
135 	struct amdgpu_sync_entry *e;
136 
137 	hash_for_each_possible(sync->fences, e, node, f->context) {
138 		if (unlikely(e->fence->context != f->context))
139 			continue;
140 
141 		amdgpu_sync_keep_later(&e->fence, f);
142 
143 		/* Preserve eplicit flag to not loose pipe line sync */
144 		e->explicit |= explicit;
145 
146 		return true;
147 	}
148 	return false;
149 }
150 
151 /**
152  * amdgpu_sync_fence - remember to sync to this fence
153  *
154  * @sync: sync object to add fence to
155  * @f: fence to sync to
156  * @explicit: if this is an explicit dependency
157  *
158  * Add the fence to the sync object.
159  */
160 int amdgpu_sync_fence(struct amdgpu_sync *sync, struct dma_fence *f,
161 		      bool explicit)
162 {
163 	struct amdgpu_sync_entry *e;
164 
165 	if (!f)
166 		return 0;
167 
168 	if (amdgpu_sync_add_later(sync, f, explicit))
169 		return 0;
170 
171 	e = kmem_cache_alloc(amdgpu_sync_slab, GFP_KERNEL);
172 	if (!e)
173 		return -ENOMEM;
174 
175 	e->explicit = explicit;
176 
177 	hash_add(sync->fences, &e->node, f->context);
178 	e->fence = dma_fence_get(f);
179 	return 0;
180 }
181 
182 /**
183  * amdgpu_sync_vm_fence - remember to sync to this VM fence
184  *
185  * @adev: amdgpu device
186  * @sync: sync object to add fence to
187  * @fence: the VM fence to add
188  *
189  * Add the fence to the sync object and remember it as VM update.
190  */
191 int amdgpu_sync_vm_fence(struct amdgpu_sync *sync, struct dma_fence *fence)
192 {
193 	if (!fence)
194 		return 0;
195 
196 	amdgpu_sync_keep_later(&sync->last_vm_update, fence);
197 	return amdgpu_sync_fence(sync, fence, false);
198 }
199 
200 /**
201  * amdgpu_sync_resv - sync to a reservation object
202  *
203  * @sync: sync object to add fences from reservation object to
204  * @resv: reservation object with embedded fence
205  * @mode: how owner affects which fences we sync to
206  * @owner: owner of the planned job submission
207  *
208  * Sync to the fence
209  */
210 int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync,
211 		     struct dma_resv *resv, enum amdgpu_sync_mode mode,
212 		     void *owner)
213 {
214 	struct dma_resv_list *flist;
215 	struct dma_fence *f;
216 	unsigned i;
217 	int r = 0;
218 
219 	if (resv == NULL)
220 		return -EINVAL;
221 
222 	/* always sync to the exclusive fence */
223 	f = dma_resv_get_excl(resv);
224 	r = amdgpu_sync_fence(sync, f, false);
225 
226 	flist = dma_resv_get_list(resv);
227 	if (!flist || r)
228 		return r;
229 
230 	for (i = 0; i < flist->shared_count; ++i) {
231 		void *fence_owner;
232 
233 		f = rcu_dereference_protected(flist->shared[i],
234 					      dma_resv_held(resv));
235 
236 		fence_owner = amdgpu_sync_get_owner(f);
237 
238 		/* Always sync to moves, no matter what */
239 		if (fence_owner == AMDGPU_FENCE_OWNER_UNDEFINED) {
240 			r = amdgpu_sync_fence(sync, f, false);
241 			if (r)
242 				break;
243 		}
244 
245 		/* We only want to trigger KFD eviction fences on
246 		 * evict or move jobs. Skip KFD fences otherwise.
247 		 */
248 		if (fence_owner == AMDGPU_FENCE_OWNER_KFD &&
249 		    owner != AMDGPU_FENCE_OWNER_UNDEFINED)
250 			continue;
251 
252 		/* Never sync to VM updates either. */
253 		if (fence_owner == AMDGPU_FENCE_OWNER_VM &&
254 		    owner != AMDGPU_FENCE_OWNER_UNDEFINED)
255 			continue;
256 
257 		/* Ignore fences depending on the sync mode */
258 		switch (mode) {
259 		case AMDGPU_SYNC_ALWAYS:
260 			break;
261 
262 		case AMDGPU_SYNC_NE_OWNER:
263 			if (amdgpu_sync_same_dev(adev, f) &&
264 			    fence_owner == owner)
265 				continue;
266 			break;
267 
268 		case AMDGPU_SYNC_EQ_OWNER:
269 			if (amdgpu_sync_same_dev(adev, f) &&
270 			    fence_owner != owner)
271 				continue;
272 			break;
273 
274 		case AMDGPU_SYNC_EXPLICIT:
275 			continue;
276 		}
277 
278 		r = amdgpu_sync_fence(sync, f, false);
279 		if (r)
280 			break;
281 	}
282 	return r;
283 }
284 
285 /**
286  * amdgpu_sync_peek_fence - get the next fence not signaled yet
287  *
288  * @sync: the sync object
289  * @ring: optional ring to use for test
290  *
291  * Returns the next fence not signaled yet without removing it from the sync
292  * object.
293  */
294 struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
295 					 struct amdgpu_ring *ring)
296 {
297 	struct amdgpu_sync_entry *e;
298 	struct hlist_node *tmp;
299 	int i;
300 
301 	hash_for_each_safe(sync->fences, i, tmp, e, node) {
302 		struct dma_fence *f = e->fence;
303 		struct drm_sched_fence *s_fence = to_drm_sched_fence(f);
304 
305 		if (dma_fence_is_signaled(f)) {
306 			hash_del(&e->node);
307 			dma_fence_put(f);
308 			kmem_cache_free(amdgpu_sync_slab, e);
309 			continue;
310 		}
311 		if (ring && s_fence) {
312 			/* For fences from the same ring it is sufficient
313 			 * when they are scheduled.
314 			 */
315 			if (s_fence->sched == &ring->sched) {
316 				if (dma_fence_is_signaled(&s_fence->scheduled))
317 					continue;
318 
319 				return &s_fence->scheduled;
320 			}
321 		}
322 
323 		return f;
324 	}
325 
326 	return NULL;
327 }
328 
329 /**
330  * amdgpu_sync_get_fence - get the next fence from the sync object
331  *
332  * @sync: sync object to use
333  * @explicit: true if the next fence is explicit
334  *
335  * Get and removes the next fence from the sync object not signaled yet.
336  */
337 struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync, bool *explicit)
338 {
339 	struct amdgpu_sync_entry *e;
340 	struct hlist_node *tmp;
341 	struct dma_fence *f;
342 	int i;
343 	hash_for_each_safe(sync->fences, i, tmp, e, node) {
344 
345 		f = e->fence;
346 		if (explicit)
347 			*explicit = e->explicit;
348 
349 		hash_del(&e->node);
350 		kmem_cache_free(amdgpu_sync_slab, e);
351 
352 		if (!dma_fence_is_signaled(f))
353 			return f;
354 
355 		dma_fence_put(f);
356 	}
357 	return NULL;
358 }
359 
360 /**
361  * amdgpu_sync_clone - clone a sync object
362  *
363  * @source: sync object to clone
364  * @clone: pointer to destination sync object
365  *
366  * Adds references to all unsignaled fences in @source to @clone. Also
367  * removes signaled fences from @source while at it.
368  */
369 int amdgpu_sync_clone(struct amdgpu_sync *source, struct amdgpu_sync *clone)
370 {
371 	struct amdgpu_sync_entry *e;
372 	struct hlist_node *tmp;
373 	struct dma_fence *f;
374 	int i, r;
375 
376 	hash_for_each_safe(source->fences, i, tmp, e, node) {
377 		f = e->fence;
378 		if (!dma_fence_is_signaled(f)) {
379 			r = amdgpu_sync_fence(clone, f, e->explicit);
380 			if (r)
381 				return r;
382 		} else {
383 			hash_del(&e->node);
384 			dma_fence_put(f);
385 			kmem_cache_free(amdgpu_sync_slab, e);
386 		}
387 	}
388 
389 	dma_fence_put(clone->last_vm_update);
390 	clone->last_vm_update = dma_fence_get(source->last_vm_update);
391 
392 	return 0;
393 }
394 
395 int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr)
396 {
397 	struct amdgpu_sync_entry *e;
398 	struct hlist_node *tmp;
399 	int i, r;
400 
401 	hash_for_each_safe(sync->fences, i, tmp, e, node) {
402 		r = dma_fence_wait(e->fence, intr);
403 		if (r)
404 			return r;
405 
406 		hash_del(&e->node);
407 		dma_fence_put(e->fence);
408 		kmem_cache_free(amdgpu_sync_slab, e);
409 	}
410 
411 	return 0;
412 }
413 
414 /**
415  * amdgpu_sync_free - free the sync object
416  *
417  * @sync: sync object to use
418  *
419  * Free the sync object.
420  */
421 void amdgpu_sync_free(struct amdgpu_sync *sync)
422 {
423 	struct amdgpu_sync_entry *e;
424 	struct hlist_node *tmp;
425 	unsigned i;
426 
427 	hash_for_each_safe(sync->fences, i, tmp, e, node) {
428 		hash_del(&e->node);
429 		dma_fence_put(e->fence);
430 		kmem_cache_free(amdgpu_sync_slab, e);
431 	}
432 
433 	dma_fence_put(sync->last_vm_update);
434 }
435 
436 /**
437  * amdgpu_sync_init - init sync object subsystem
438  *
439  * Allocate the slab allocator.
440  */
441 int amdgpu_sync_init(void)
442 {
443 	amdgpu_sync_slab = kmem_cache_create(
444 		"amdgpu_sync", sizeof(struct amdgpu_sync_entry), 0,
445 		SLAB_HWCACHE_ALIGN, NULL);
446 	if (!amdgpu_sync_slab)
447 		return -ENOMEM;
448 
449 	return 0;
450 }
451 
452 /**
453  * amdgpu_sync_fini - fini sync object subsystem
454  *
455  * Free the slab allocator.
456  */
457 void amdgpu_sync_fini(void)
458 {
459 	kmem_cache_destroy(amdgpu_sync_slab);
460 }
461