1 /*
2  * Copyright 2018 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23 
24 #include "amdgpu.h"
25 #include "amdgpu_sdma.h"
26 
27 #define AMDGPU_CSA_SDMA_SIZE 64
28 /* SDMA CSA reside in the 3rd page of CSA */
29 #define AMDGPU_CSA_SDMA_OFFSET (4096 * 2)
30 
31 /*
32  * GPU SDMA IP block helpers function.
33  */
34 
35 struct amdgpu_sdma_instance *amdgpu_sdma_get_instance_from_ring(struct amdgpu_ring *ring)
36 {
37 	struct amdgpu_device *adev = ring->adev;
38 	int i;
39 
40 	for (i = 0; i < adev->sdma.num_instances; i++)
41 		if (ring == &adev->sdma.instance[i].ring ||
42 		    ring == &adev->sdma.instance[i].page)
43 			return &adev->sdma.instance[i];
44 
45 	return NULL;
46 }
47 
48 int amdgpu_sdma_get_index_from_ring(struct amdgpu_ring *ring, uint32_t *index)
49 {
50 	struct amdgpu_device *adev = ring->adev;
51 	int i;
52 
53 	for (i = 0; i < adev->sdma.num_instances; i++) {
54 		if (ring == &adev->sdma.instance[i].ring ||
55 			ring == &adev->sdma.instance[i].page) {
56 			*index = i;
57 			return 0;
58 		}
59 	}
60 
61 	return -EINVAL;
62 }
63 
64 uint64_t amdgpu_sdma_get_csa_mc_addr(struct amdgpu_ring *ring,
65 				     unsigned vmid)
66 {
67 	struct amdgpu_device *adev = ring->adev;
68 	uint64_t csa_mc_addr;
69 	uint32_t index = 0;
70 	int r;
71 
72 	if (vmid == 0 || !amdgpu_mcbp)
73 		return 0;
74 
75 	r = amdgpu_sdma_get_index_from_ring(ring, &index);
76 
77 	if (r || index > 31)
78 		csa_mc_addr = 0;
79 	else
80 		csa_mc_addr = amdgpu_csa_vaddr(adev) +
81 			AMDGPU_CSA_SDMA_OFFSET +
82 			index * AMDGPU_CSA_SDMA_SIZE;
83 
84 	return csa_mc_addr;
85 }
86