1 /* 2 * Copyright 2021 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef __AMDGPU_RESET_H__ 25 #define __AMDGPU_RESET_H__ 26 27 #include "amdgpu.h" 28 29 enum AMDGPU_RESET_FLAGS { 30 31 AMDGPU_NEED_FULL_RESET = 0, 32 AMDGPU_SKIP_HW_RESET = 1, 33 }; 34 35 struct amdgpu_reset_context { 36 enum amd_reset_method method; 37 struct amdgpu_device *reset_req_dev; 38 struct amdgpu_job *job; 39 struct amdgpu_hive_info *hive; 40 unsigned long flags; 41 }; 42 43 struct amdgpu_reset_handler { 44 enum amd_reset_method reset_method; 45 struct list_head handler_list; 46 int (*prepare_env)(struct amdgpu_reset_control *reset_ctl, 47 struct amdgpu_reset_context *context); 48 int (*prepare_hwcontext)(struct amdgpu_reset_control *reset_ctl, 49 struct amdgpu_reset_context *context); 50 int (*perform_reset)(struct amdgpu_reset_control *reset_ctl, 51 struct amdgpu_reset_context *context); 52 int (*restore_hwcontext)(struct amdgpu_reset_control *reset_ctl, 53 struct amdgpu_reset_context *context); 54 int (*restore_env)(struct amdgpu_reset_control *reset_ctl, 55 struct amdgpu_reset_context *context); 56 57 int (*do_reset)(struct amdgpu_device *adev); 58 }; 59 60 struct amdgpu_reset_control { 61 void *handle; 62 struct work_struct reset_work; 63 struct mutex reset_lock; 64 struct list_head reset_handlers; 65 atomic_t in_reset; 66 enum amd_reset_method active_reset; 67 struct amdgpu_reset_handler *(*get_reset_handler)( 68 struct amdgpu_reset_control *reset_ctl, 69 struct amdgpu_reset_context *context); 70 void (*async_reset)(struct work_struct *work); 71 }; 72 73 int amdgpu_reset_init(struct amdgpu_device *adev); 74 int amdgpu_reset_fini(struct amdgpu_device *adev); 75 76 int amdgpu_reset_prepare_hwcontext(struct amdgpu_device *adev, 77 struct amdgpu_reset_context *reset_context); 78 79 int amdgpu_reset_perform_reset(struct amdgpu_device *adev, 80 struct amdgpu_reset_context *reset_context); 81 82 int amdgpu_reset_add_handler(struct amdgpu_reset_control *reset_ctl, 83 struct amdgpu_reset_handler *handler); 84 85 #endif 86