1a4322e18SWenhui Sheng /*
2a4322e18SWenhui Sheng  * Copyright 2020 Advanced Micro Devices, Inc.
3a4322e18SWenhui Sheng  *
4a4322e18SWenhui Sheng  * Permission is hereby granted, free of charge, to any person obtaining a
5a4322e18SWenhui Sheng  * copy of this software and associated documentation files (the "Software"),
6a4322e18SWenhui Sheng  * to deal in the Software without restriction, including without limitation
7a4322e18SWenhui Sheng  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8a4322e18SWenhui Sheng  * and/or sell copies of the Software, and to permit persons to whom the
9a4322e18SWenhui Sheng  * Software is furnished to do so, subject to the following conditions:
10a4322e18SWenhui Sheng  *
11a4322e18SWenhui Sheng  * The above copyright notice and this permission notice shall be included in
12a4322e18SWenhui Sheng  * all copies or substantial portions of the Software.
13a4322e18SWenhui Sheng  *
14a4322e18SWenhui Sheng  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15a4322e18SWenhui Sheng  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16a4322e18SWenhui Sheng  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17a4322e18SWenhui Sheng  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18a4322e18SWenhui Sheng  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19a4322e18SWenhui Sheng  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20a4322e18SWenhui Sheng  * OTHER DEALINGS IN THE SOFTWARE.
21a4322e18SWenhui Sheng  *
22a4322e18SWenhui Sheng  *
23a4322e18SWenhui Sheng  */
24a4322e18SWenhui Sheng #include <linux/debugfs.h>
25a4322e18SWenhui Sheng #include <linux/pm_runtime.h>
26a4322e18SWenhui Sheng 
27a4322e18SWenhui Sheng #include "amdgpu.h"
28a4322e18SWenhui Sheng #include "amdgpu_rap.h"
29a4322e18SWenhui Sheng 
30a4322e18SWenhui Sheng /**
31a4322e18SWenhui Sheng  * DOC: AMDGPU RAP debugfs test interface
32a4322e18SWenhui Sheng  *
33a4322e18SWenhui Sheng  * how to use?
34a4322e18SWenhui Sheng  * echo opcode > <debugfs_dir>/dri/xxx/rap_test
35a4322e18SWenhui Sheng  *
36a4322e18SWenhui Sheng  * opcode:
37a4322e18SWenhui Sheng  * currently, only 2 is supported by Linux host driver,
38a4322e18SWenhui Sheng  * opcode 2 stands for TA_CMD_RAP__VALIDATE_L0, used to
39a4322e18SWenhui Sheng  * trigger L0 policy validation, you can refer more detail
40a4322e18SWenhui Sheng  * from header file ta_rap_if.h
41a4322e18SWenhui Sheng  *
42a4322e18SWenhui Sheng  */
amdgpu_rap_debugfs_write(struct file * f,const char __user * buf,size_t size,loff_t * pos)43a4322e18SWenhui Sheng static ssize_t amdgpu_rap_debugfs_write(struct file *f, const char __user *buf,
44a4322e18SWenhui Sheng 		size_t size, loff_t *pos)
45a4322e18SWenhui Sheng {
46a4322e18SWenhui Sheng 	struct amdgpu_device *adev = (struct amdgpu_device *)file_inode(f)->i_private;
47a4322e18SWenhui Sheng 	struct ta_rap_shared_memory *rap_shared_mem;
48a4322e18SWenhui Sheng 	struct ta_rap_cmd_output_data *rap_cmd_output;
494a580877SLuben Tuikov 	struct drm_device *dev = adev_to_drm(adev);
50a4322e18SWenhui Sheng 	uint32_t op;
512fb3c5d0SKevin Wang 	enum ta_rap_status status;
52a4322e18SWenhui Sheng 	int ret;
53a4322e18SWenhui Sheng 
54a4322e18SWenhui Sheng 	if (*pos || size != 2)
55a4322e18SWenhui Sheng 		return -EINVAL;
56a4322e18SWenhui Sheng 
57a4322e18SWenhui Sheng 	ret = kstrtouint_from_user(buf, size, *pos, &op);
58a4322e18SWenhui Sheng 	if (ret)
59a4322e18SWenhui Sheng 		return ret;
60a4322e18SWenhui Sheng 
61a4322e18SWenhui Sheng 	ret = pm_runtime_get_sync(dev->dev);
62a4322e18SWenhui Sheng 	if (ret < 0) {
63a4322e18SWenhui Sheng 		pm_runtime_put_autosuspend(dev->dev);
64a4322e18SWenhui Sheng 		return ret;
65a4322e18SWenhui Sheng 	}
66a4322e18SWenhui Sheng 
67a4322e18SWenhui Sheng 	/* make sure gfx core is on, RAP TA cann't handle
68a4322e18SWenhui Sheng 	 * GFX OFF case currently.
69a4322e18SWenhui Sheng 	 */
70a4322e18SWenhui Sheng 	amdgpu_gfx_off_ctrl(adev, false);
71a4322e18SWenhui Sheng 
72a4322e18SWenhui Sheng 	switch (op) {
73a4322e18SWenhui Sheng 	case 2:
742fb3c5d0SKevin Wang 		ret = psp_rap_invoke(&adev->psp, op, &status);
752fb3c5d0SKevin Wang 		if (!ret && status == TA_RAP_STATUS__SUCCESS) {
76a4322e18SWenhui Sheng 			dev_info(adev->dev, "RAP L0 validate test success.\n");
77a4322e18SWenhui Sheng 		} else {
78a4322e18SWenhui Sheng 			rap_shared_mem = (struct ta_rap_shared_memory *)
79*ce97f37bSCandice Li 					 adev->psp.rap_context.context.mem_context.shared_buf;
80a4322e18SWenhui Sheng 			rap_cmd_output = &(rap_shared_mem->rap_out_message.output);
81a4322e18SWenhui Sheng 
82a4322e18SWenhui Sheng 			dev_info(adev->dev, "RAP test failed, the output is:\n");
83a4322e18SWenhui Sheng 			dev_info(adev->dev, "\tlast_subsection: 0x%08x.\n",
84a4322e18SWenhui Sheng 				 rap_cmd_output->last_subsection);
85a4322e18SWenhui Sheng 			dev_info(adev->dev, "\tnum_total_validate: 0x%08x.\n",
86a4322e18SWenhui Sheng 				 rap_cmd_output->num_total_validate);
87a4322e18SWenhui Sheng 			dev_info(adev->dev, "\tnum_valid: 0x%08x.\n",
88a4322e18SWenhui Sheng 				 rap_cmd_output->num_valid);
89a4322e18SWenhui Sheng 			dev_info(adev->dev, "\tlast_validate_addr: 0x%08x.\n",
90a4322e18SWenhui Sheng 				 rap_cmd_output->last_validate_addr);
91a4322e18SWenhui Sheng 			dev_info(adev->dev, "\tlast_validate_val: 0x%08x.\n",
92a4322e18SWenhui Sheng 				 rap_cmd_output->last_validate_val);
93a4322e18SWenhui Sheng 			dev_info(adev->dev, "\tlast_validate_val_exptd: 0x%08x.\n",
94a4322e18SWenhui Sheng 				 rap_cmd_output->last_validate_val_exptd);
95a4322e18SWenhui Sheng 		}
96a4322e18SWenhui Sheng 		break;
97a4322e18SWenhui Sheng 	default:
98a4322e18SWenhui Sheng 		dev_info(adev->dev, "Unsupported op id: %d, ", op);
99a4322e18SWenhui Sheng 		dev_info(adev->dev, "Only support op 2(L0 validate test).\n");
1002fb3c5d0SKevin Wang 		break;
101a4322e18SWenhui Sheng 	}
102a4322e18SWenhui Sheng 
103a4322e18SWenhui Sheng 	amdgpu_gfx_off_ctrl(adev, true);
104a4322e18SWenhui Sheng 	pm_runtime_mark_last_busy(dev->dev);
105a4322e18SWenhui Sheng 	pm_runtime_put_autosuspend(dev->dev);
106a4322e18SWenhui Sheng 
107a4322e18SWenhui Sheng 	return size;
108a4322e18SWenhui Sheng }
109a4322e18SWenhui Sheng 
110a4322e18SWenhui Sheng static const struct file_operations amdgpu_rap_debugfs_ops = {
111a4322e18SWenhui Sheng 	.owner = THIS_MODULE,
112a4322e18SWenhui Sheng 	.read = NULL,
113a4322e18SWenhui Sheng 	.write = amdgpu_rap_debugfs_write,
114a4322e18SWenhui Sheng 	.llseek = default_llseek
115a4322e18SWenhui Sheng };
116a4322e18SWenhui Sheng 
amdgpu_rap_debugfs_init(struct amdgpu_device * adev)117a4322e18SWenhui Sheng void amdgpu_rap_debugfs_init(struct amdgpu_device *adev)
118a4322e18SWenhui Sheng {
1194a580877SLuben Tuikov 	struct drm_minor *minor = adev_to_drm(adev)->primary;
120a4322e18SWenhui Sheng 
121*ce97f37bSCandice Li 	if (!adev->psp.rap_context.context.initialized)
122a4322e18SWenhui Sheng 		return;
123a4322e18SWenhui Sheng 
124a4322e18SWenhui Sheng 	debugfs_create_file("rap_test", S_IWUSR, minor->debugfs_root,
125a4322e18SWenhui Sheng 				adev, &amdgpu_rap_debugfs_ops);
126a4322e18SWenhui Sheng }
127