1a538bbe7SJack Xiao /* 2a538bbe7SJack Xiao * Copyright 2019 Advanced Micro Devices, Inc. 3a538bbe7SJack Xiao * 4a538bbe7SJack Xiao * Permission is hereby granted, free of charge, to any person obtaining a 5a538bbe7SJack Xiao * copy of this software and associated documentation files (the "Software"), 6a538bbe7SJack Xiao * to deal in the Software without restriction, including without limitation 7a538bbe7SJack Xiao * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8a538bbe7SJack Xiao * and/or sell copies of the Software, and to permit persons to whom the 9a538bbe7SJack Xiao * Software is furnished to do so, subject to the following conditions: 10a538bbe7SJack Xiao * 11a538bbe7SJack Xiao * The above copyright notice and this permission notice shall be included in 12a538bbe7SJack Xiao * all copies or substantial portions of the Software. 13a538bbe7SJack Xiao * 14a538bbe7SJack Xiao * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15a538bbe7SJack Xiao * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16a538bbe7SJack Xiao * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17a538bbe7SJack Xiao * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18a538bbe7SJack Xiao * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19a538bbe7SJack Xiao * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20a538bbe7SJack Xiao * OTHER DEALINGS IN THE SOFTWARE. 21a538bbe7SJack Xiao * 22a538bbe7SJack Xiao */ 23a538bbe7SJack Xiao 24a538bbe7SJack Xiao #ifndef __AMDGPU_MES_H__ 25a538bbe7SJack Xiao #define __AMDGPU_MES_H__ 26a538bbe7SJack Xiao 277bbc3676SJack Xiao struct amdgpu_mes_funcs; 28a538bbe7SJack Xiao 297bbc3676SJack Xiao struct amdgpu_mes { 307bbc3676SJack Xiao struct amdgpu_adev *adev; 317bbc3676SJack Xiao 325aa91248SJack Xiao const struct firmware *fw; 335aa91248SJack Xiao 345aa91248SJack Xiao /* mes ucode */ 355aa91248SJack Xiao struct amdgpu_bo *ucode_fw_obj; 365aa91248SJack Xiao uint64_t ucode_fw_gpu_addr; 375aa91248SJack Xiao uint32_t *ucode_fw_ptr; 385aa91248SJack Xiao uint32_t ucode_fw_version; 395aa91248SJack Xiao uint64_t uc_start_addr; 405aa91248SJack Xiao 415aa91248SJack Xiao /* mes ucode data */ 425aa91248SJack Xiao struct amdgpu_bo *data_fw_obj; 435aa91248SJack Xiao uint64_t data_fw_gpu_addr; 445aa91248SJack Xiao uint32_t *data_fw_ptr; 455aa91248SJack Xiao uint32_t data_fw_version; 465aa91248SJack Xiao uint64_t data_start_addr; 475aa91248SJack Xiao 487bbc3676SJack Xiao /* ip specific functions */ 497bbc3676SJack Xiao struct amdgpu_mes_funcs *funcs; 507bbc3676SJack Xiao }; 517bbc3676SJack Xiao 527bbc3676SJack Xiao struct mes_add_queue_input { 537bbc3676SJack Xiao uint32_t process_id; 547bbc3676SJack Xiao uint64_t page_table_base_addr; 557bbc3676SJack Xiao uint64_t process_va_start; 567bbc3676SJack Xiao uint64_t process_va_end; 577bbc3676SJack Xiao uint64_t process_quantum; 587bbc3676SJack Xiao uint64_t process_context_addr; 597bbc3676SJack Xiao uint64_t gang_quantum; 607bbc3676SJack Xiao uint64_t gang_context_addr; 617bbc3676SJack Xiao uint32_t inprocess_gang_priority; 627bbc3676SJack Xiao uint32_t gang_global_priority_level; 637bbc3676SJack Xiao uint32_t doorbell_offset; 647bbc3676SJack Xiao uint64_t mqd_addr; 657bbc3676SJack Xiao uint64_t wptr_addr; 667bbc3676SJack Xiao uint32_t queue_type; 677bbc3676SJack Xiao uint32_t paging; 687bbc3676SJack Xiao }; 697bbc3676SJack Xiao 707bbc3676SJack Xiao struct mes_remove_queue_input { 717bbc3676SJack Xiao uint32_t doorbell_offset; 727bbc3676SJack Xiao uint64_t gang_context_addr; 737bbc3676SJack Xiao }; 747bbc3676SJack Xiao 757bbc3676SJack Xiao struct mes_suspend_gang_input { 767bbc3676SJack Xiao bool suspend_all_gangs; 777bbc3676SJack Xiao uint64_t gang_context_addr; 787bbc3676SJack Xiao uint64_t suspend_fence_addr; 797bbc3676SJack Xiao uint32_t suspend_fence_value; 807bbc3676SJack Xiao }; 817bbc3676SJack Xiao 827bbc3676SJack Xiao struct mes_resume_gang_input { 837bbc3676SJack Xiao bool resume_all_gangs; 847bbc3676SJack Xiao uint64_t gang_context_addr; 857bbc3676SJack Xiao }; 867bbc3676SJack Xiao 877bbc3676SJack Xiao struct amdgpu_mes_funcs { 887bbc3676SJack Xiao int (*add_hw_queue)(struct amdgpu_mes *mes, 897bbc3676SJack Xiao struct mes_add_queue_input *input); 907bbc3676SJack Xiao 917bbc3676SJack Xiao int (*remove_hw_queue)(struct amdgpu_mes *mes, 927bbc3676SJack Xiao struct mes_remove_queue_input *input); 937bbc3676SJack Xiao 947bbc3676SJack Xiao int (*suspend_gang)(struct amdgpu_mes *mes, 957bbc3676SJack Xiao struct mes_suspend_gang_input *input); 967bbc3676SJack Xiao 977bbc3676SJack Xiao int (*resume_gang)(struct amdgpu_mes *mes, 987bbc3676SJack Xiao struct mes_resume_gang_input *input); 99a538bbe7SJack Xiao }; 100a538bbe7SJack Xiao 101a538bbe7SJack Xiao #endif /* __AMDGPU_MES_H__ */ 102