1 /* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Christian König 23 */ 24 25 #include <drm/ttm/ttm_range_manager.h> 26 27 #include "amdgpu.h" 28 29 struct amdgpu_gtt_node { 30 struct ttm_buffer_object *tbo; 31 struct ttm_range_mgr_node base; 32 }; 33 34 static inline struct amdgpu_gtt_mgr * 35 to_gtt_mgr(struct ttm_resource_manager *man) 36 { 37 return container_of(man, struct amdgpu_gtt_mgr, manager); 38 } 39 40 static inline struct amdgpu_gtt_node * 41 to_amdgpu_gtt_node(struct ttm_resource *res) 42 { 43 return container_of(res->mm_node, struct amdgpu_gtt_node, 44 base.mm_nodes[0]); 45 } 46 47 /** 48 * DOC: mem_info_gtt_total 49 * 50 * The amdgpu driver provides a sysfs API for reporting current total size of 51 * the GTT. 52 * The file mem_info_gtt_total is used for this, and returns the total size of 53 * the GTT block, in bytes 54 */ 55 static ssize_t amdgpu_mem_info_gtt_total_show(struct device *dev, 56 struct device_attribute *attr, 57 char *buf) 58 { 59 struct drm_device *ddev = dev_get_drvdata(dev); 60 struct amdgpu_device *adev = drm_to_adev(ddev); 61 struct ttm_resource_manager *man; 62 63 man = ttm_manager_type(&adev->mman.bdev, TTM_PL_TT); 64 return sysfs_emit(buf, "%llu\n", man->size * PAGE_SIZE); 65 } 66 67 /** 68 * DOC: mem_info_gtt_used 69 * 70 * The amdgpu driver provides a sysfs API for reporting current total amount of 71 * used GTT. 72 * The file mem_info_gtt_used is used for this, and returns the current used 73 * size of the GTT block, in bytes 74 */ 75 static ssize_t amdgpu_mem_info_gtt_used_show(struct device *dev, 76 struct device_attribute *attr, 77 char *buf) 78 { 79 struct drm_device *ddev = dev_get_drvdata(dev); 80 struct amdgpu_device *adev = drm_to_adev(ddev); 81 struct ttm_resource_manager *man; 82 83 man = ttm_manager_type(&adev->mman.bdev, TTM_PL_TT); 84 return sysfs_emit(buf, "%llu\n", amdgpu_gtt_mgr_usage(man)); 85 } 86 87 static DEVICE_ATTR(mem_info_gtt_total, S_IRUGO, 88 amdgpu_mem_info_gtt_total_show, NULL); 89 static DEVICE_ATTR(mem_info_gtt_used, S_IRUGO, 90 amdgpu_mem_info_gtt_used_show, NULL); 91 92 static struct attribute *amdgpu_gtt_mgr_attributes[] = { 93 &dev_attr_mem_info_gtt_total.attr, 94 &dev_attr_mem_info_gtt_used.attr, 95 NULL 96 }; 97 98 const struct attribute_group amdgpu_gtt_mgr_attr_group = { 99 .attrs = amdgpu_gtt_mgr_attributes 100 }; 101 102 /** 103 * amdgpu_gtt_mgr_has_gart_addr - Check if mem has address space 104 * 105 * @mem: the mem object to check 106 * 107 * Check if a mem object has already address space allocated. 108 */ 109 bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *mem) 110 { 111 struct amdgpu_gtt_node *node = to_amdgpu_gtt_node(mem); 112 113 return drm_mm_node_allocated(&node->base.mm_nodes[0]); 114 } 115 116 /** 117 * amdgpu_gtt_mgr_new - allocate a new node 118 * 119 * @man: TTM memory type manager 120 * @tbo: TTM BO we need this range for 121 * @place: placement flags and restrictions 122 * @mem: the resulting mem object 123 * 124 * Dummy, allocate the node but no space for it yet. 125 */ 126 static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man, 127 struct ttm_buffer_object *tbo, 128 const struct ttm_place *place, 129 struct ttm_resource *mem) 130 { 131 struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man); 132 struct amdgpu_gtt_node *node; 133 int r; 134 135 spin_lock(&mgr->lock); 136 if ((tbo->resource == mem || tbo->resource->mem_type != TTM_PL_TT) && 137 atomic64_read(&mgr->available) < mem->num_pages) { 138 spin_unlock(&mgr->lock); 139 return -ENOSPC; 140 } 141 atomic64_sub(mem->num_pages, &mgr->available); 142 spin_unlock(&mgr->lock); 143 144 node = kzalloc(struct_size(node, base.mm_nodes, 1), GFP_KERNEL); 145 if (!node) { 146 r = -ENOMEM; 147 goto err_out; 148 } 149 150 node->tbo = tbo; 151 ttm_resource_init(tbo, place, &node->base.base); 152 153 if (place->lpfn) { 154 spin_lock(&mgr->lock); 155 r = drm_mm_insert_node_in_range(&mgr->mm, 156 &node->base.mm_nodes[0], 157 mem->num_pages, 158 tbo->page_alignment, 0, 159 place->fpfn, place->lpfn, 160 DRM_MM_INSERT_BEST); 161 spin_unlock(&mgr->lock); 162 if (unlikely(r)) 163 goto err_free; 164 165 mem->start = node->base.mm_nodes[0].start; 166 } else { 167 node->base.mm_nodes[0].start = 0; 168 node->base.mm_nodes[0].size = mem->num_pages; 169 mem->start = AMDGPU_BO_INVALID_OFFSET; 170 } 171 172 mem->mm_node = &node->base.mm_nodes[0]; 173 return 0; 174 175 err_free: 176 kfree(node); 177 178 err_out: 179 atomic64_add(mem->num_pages, &mgr->available); 180 181 return r; 182 } 183 184 /** 185 * amdgpu_gtt_mgr_del - free ranges 186 * 187 * @man: TTM memory type manager 188 * @mem: TTM memory object 189 * 190 * Free the allocated GTT again. 191 */ 192 static void amdgpu_gtt_mgr_del(struct ttm_resource_manager *man, 193 struct ttm_resource *mem) 194 { 195 struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man); 196 struct amdgpu_gtt_node *node; 197 198 if (!mem->mm_node) 199 return; 200 201 node = to_amdgpu_gtt_node(mem); 202 203 spin_lock(&mgr->lock); 204 if (drm_mm_node_allocated(&node->base.mm_nodes[0])) 205 drm_mm_remove_node(&node->base.mm_nodes[0]); 206 spin_unlock(&mgr->lock); 207 atomic64_add(mem->num_pages, &mgr->available); 208 209 kfree(node); 210 } 211 212 /** 213 * amdgpu_gtt_mgr_usage - return usage of GTT domain 214 * 215 * @man: TTM memory type manager 216 * 217 * Return how many bytes are used in the GTT domain 218 */ 219 uint64_t amdgpu_gtt_mgr_usage(struct ttm_resource_manager *man) 220 { 221 struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man); 222 s64 result = man->size - atomic64_read(&mgr->available); 223 224 return (result > 0 ? result : 0) * PAGE_SIZE; 225 } 226 227 /** 228 * amdgpu_gtt_mgr_recover - re-init gart 229 * 230 * @man: TTM memory type manager 231 * 232 * Re-init the gart for each known BO in the GTT. 233 */ 234 int amdgpu_gtt_mgr_recover(struct ttm_resource_manager *man) 235 { 236 struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man); 237 struct amdgpu_gtt_node *node; 238 struct drm_mm_node *mm_node; 239 int r = 0; 240 241 spin_lock(&mgr->lock); 242 drm_mm_for_each_node(mm_node, &mgr->mm) { 243 node = container_of(mm_node, typeof(*node), base.mm_nodes[0]); 244 r = amdgpu_ttm_recover_gart(node->tbo); 245 if (r) 246 break; 247 } 248 spin_unlock(&mgr->lock); 249 250 return r; 251 } 252 253 /** 254 * amdgpu_gtt_mgr_debug - dump VRAM table 255 * 256 * @man: TTM memory type manager 257 * @printer: DRM printer to use 258 * 259 * Dump the table content using printk. 260 */ 261 static void amdgpu_gtt_mgr_debug(struct ttm_resource_manager *man, 262 struct drm_printer *printer) 263 { 264 struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man); 265 266 spin_lock(&mgr->lock); 267 drm_mm_print(&mgr->mm, printer); 268 spin_unlock(&mgr->lock); 269 270 drm_printf(printer, "man size:%llu pages, gtt available:%lld pages, usage:%lluMB\n", 271 man->size, (u64)atomic64_read(&mgr->available), 272 amdgpu_gtt_mgr_usage(man) >> 20); 273 } 274 275 static const struct ttm_resource_manager_func amdgpu_gtt_mgr_func = { 276 .alloc = amdgpu_gtt_mgr_new, 277 .free = amdgpu_gtt_mgr_del, 278 .debug = amdgpu_gtt_mgr_debug 279 }; 280 281 /** 282 * amdgpu_gtt_mgr_init - init GTT manager and DRM MM 283 * 284 * @adev: amdgpu_device pointer 285 * @gtt_size: maximum size of GTT 286 * 287 * Allocate and initialize the GTT manager. 288 */ 289 int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size) 290 { 291 struct amdgpu_gtt_mgr *mgr = &adev->mman.gtt_mgr; 292 struct ttm_resource_manager *man = &mgr->manager; 293 uint64_t start, size; 294 295 man->use_tt = true; 296 man->func = &amdgpu_gtt_mgr_func; 297 298 ttm_resource_manager_init(man, gtt_size >> PAGE_SHIFT); 299 300 start = AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GTT_NUM_TRANSFER_WINDOWS; 301 size = (adev->gmc.gart_size >> PAGE_SHIFT) - start; 302 drm_mm_init(&mgr->mm, start, size); 303 spin_lock_init(&mgr->lock); 304 atomic64_set(&mgr->available, gtt_size >> PAGE_SHIFT); 305 306 ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_TT, &mgr->manager); 307 ttm_resource_manager_set_used(man, true); 308 return 0; 309 } 310 311 /** 312 * amdgpu_gtt_mgr_fini - free and destroy GTT manager 313 * 314 * @adev: amdgpu_device pointer 315 * 316 * Destroy and free the GTT manager, returns -EBUSY if ranges are still 317 * allocated inside it. 318 */ 319 void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev) 320 { 321 struct amdgpu_gtt_mgr *mgr = &adev->mman.gtt_mgr; 322 struct ttm_resource_manager *man = &mgr->manager; 323 int ret; 324 325 ttm_resource_manager_set_used(man, false); 326 327 ret = ttm_resource_manager_evict_all(&adev->mman.bdev, man); 328 if (ret) 329 return; 330 331 spin_lock(&mgr->lock); 332 drm_mm_takedown(&mgr->mm); 333 spin_unlock(&mgr->lock); 334 335 ttm_resource_manager_cleanup(man); 336 ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_TT, NULL); 337 } 338