1 /* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Christian König 23 */ 24 25 #include <drm/drmP.h> 26 #include "amdgpu.h" 27 28 struct amdgpu_gtt_mgr { 29 struct drm_mm mm; 30 spinlock_t lock; 31 atomic64_t available; 32 }; 33 34 /** 35 * amdgpu_gtt_mgr_init - init GTT manager and DRM MM 36 * 37 * @man: TTM memory type manager 38 * @p_size: maximum size of GTT 39 * 40 * Allocate and initialize the GTT manager. 41 */ 42 static int amdgpu_gtt_mgr_init(struct ttm_mem_type_manager *man, 43 unsigned long p_size) 44 { 45 struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev); 46 struct amdgpu_gtt_mgr *mgr; 47 uint64_t start, size; 48 49 mgr = kzalloc(sizeof(*mgr), GFP_KERNEL); 50 if (!mgr) 51 return -ENOMEM; 52 53 start = AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GTT_NUM_TRANSFER_WINDOWS; 54 size = (adev->mc.gart_size >> PAGE_SHIFT) - start; 55 drm_mm_init(&mgr->mm, start, size); 56 spin_lock_init(&mgr->lock); 57 atomic64_set(&mgr->available, p_size); 58 man->priv = mgr; 59 return 0; 60 } 61 62 /** 63 * amdgpu_gtt_mgr_fini - free and destroy GTT manager 64 * 65 * @man: TTM memory type manager 66 * 67 * Destroy and free the GTT manager, returns -EBUSY if ranges are still 68 * allocated inside it. 69 */ 70 static int amdgpu_gtt_mgr_fini(struct ttm_mem_type_manager *man) 71 { 72 struct amdgpu_gtt_mgr *mgr = man->priv; 73 74 drm_mm_takedown(&mgr->mm); 75 spin_unlock(&mgr->lock); 76 kfree(mgr); 77 man->priv = NULL; 78 return 0; 79 } 80 81 /** 82 * amdgpu_gtt_mgr_is_allocated - Check if mem has address space 83 * 84 * @mem: the mem object to check 85 * 86 * Check if a mem object has already address space allocated. 87 */ 88 bool amdgpu_gtt_mgr_is_allocated(struct ttm_mem_reg *mem) 89 { 90 struct drm_mm_node *node = mem->mm_node; 91 92 return (node->start != AMDGPU_BO_INVALID_OFFSET); 93 } 94 95 /** 96 * amdgpu_gtt_mgr_alloc - allocate new ranges 97 * 98 * @man: TTM memory type manager 99 * @tbo: TTM BO we need this range for 100 * @place: placement flags and restrictions 101 * @mem: the resulting mem object 102 * 103 * Allocate the address space for a node. 104 */ 105 static int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man, 106 struct ttm_buffer_object *tbo, 107 const struct ttm_place *place, 108 struct ttm_mem_reg *mem) 109 { 110 struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev); 111 struct amdgpu_gtt_mgr *mgr = man->priv; 112 struct drm_mm_node *node = mem->mm_node; 113 enum drm_mm_insert_mode mode; 114 unsigned long fpfn, lpfn; 115 int r; 116 117 if (amdgpu_gtt_mgr_is_allocated(mem)) 118 return 0; 119 120 if (place) 121 fpfn = place->fpfn; 122 else 123 fpfn = 0; 124 125 if (place && place->lpfn) 126 lpfn = place->lpfn; 127 else 128 lpfn = adev->gart.num_cpu_pages; 129 130 mode = DRM_MM_INSERT_BEST; 131 if (place && place->flags & TTM_PL_FLAG_TOPDOWN) 132 mode = DRM_MM_INSERT_HIGH; 133 134 spin_lock(&mgr->lock); 135 r = drm_mm_insert_node_in_range(&mgr->mm, node, 136 mem->num_pages, mem->page_alignment, 0, 137 fpfn, lpfn, mode); 138 spin_unlock(&mgr->lock); 139 140 if (!r) 141 mem->start = node->start; 142 143 return r; 144 } 145 146 /** 147 * amdgpu_gtt_mgr_new - allocate a new node 148 * 149 * @man: TTM memory type manager 150 * @tbo: TTM BO we need this range for 151 * @place: placement flags and restrictions 152 * @mem: the resulting mem object 153 * 154 * Dummy, allocate the node but no space for it yet. 155 */ 156 static int amdgpu_gtt_mgr_new(struct ttm_mem_type_manager *man, 157 struct ttm_buffer_object *tbo, 158 const struct ttm_place *place, 159 struct ttm_mem_reg *mem) 160 { 161 struct amdgpu_gtt_mgr *mgr = man->priv; 162 struct drm_mm_node *node; 163 int r; 164 165 spin_lock(&mgr->lock); 166 if ((&tbo->mem == mem || tbo->mem.mem_type != TTM_PL_TT) && 167 atomic64_read(&mgr->available) < mem->num_pages) { 168 spin_unlock(&mgr->lock); 169 return 0; 170 } 171 atomic64_sub(mem->num_pages, &mgr->available); 172 spin_unlock(&mgr->lock); 173 174 node = kzalloc(sizeof(*node), GFP_KERNEL); 175 if (!node) { 176 r = -ENOMEM; 177 goto err_out; 178 } 179 180 node->start = AMDGPU_BO_INVALID_OFFSET; 181 node->size = mem->num_pages; 182 mem->mm_node = node; 183 184 if (place->fpfn || place->lpfn || place->flags & TTM_PL_FLAG_TOPDOWN) { 185 r = amdgpu_gtt_mgr_alloc(man, tbo, place, mem); 186 if (unlikely(r)) { 187 kfree(node); 188 mem->mm_node = NULL; 189 r = 0; 190 goto err_out; 191 } 192 } else { 193 mem->start = node->start; 194 } 195 196 return 0; 197 err_out: 198 atomic64_add(mem->num_pages, &mgr->available); 199 200 return r; 201 } 202 203 /** 204 * amdgpu_gtt_mgr_del - free ranges 205 * 206 * @man: TTM memory type manager 207 * @tbo: TTM BO we need this range for 208 * @place: placement flags and restrictions 209 * @mem: TTM memory object 210 * 211 * Free the allocated GTT again. 212 */ 213 static void amdgpu_gtt_mgr_del(struct ttm_mem_type_manager *man, 214 struct ttm_mem_reg *mem) 215 { 216 struct amdgpu_gtt_mgr *mgr = man->priv; 217 struct drm_mm_node *node = mem->mm_node; 218 219 if (!node) 220 return; 221 222 spin_lock(&mgr->lock); 223 if (node->start != AMDGPU_BO_INVALID_OFFSET) 224 drm_mm_remove_node(node); 225 spin_unlock(&mgr->lock); 226 atomic64_add(mem->num_pages, &mgr->available); 227 228 kfree(node); 229 mem->mm_node = NULL; 230 } 231 232 /** 233 * amdgpu_gtt_mgr_usage - return usage of GTT domain 234 * 235 * @man: TTM memory type manager 236 * 237 * Return how many bytes are used in the GTT domain 238 */ 239 uint64_t amdgpu_gtt_mgr_usage(struct ttm_mem_type_manager *man) 240 { 241 struct amdgpu_gtt_mgr *mgr = man->priv; 242 s64 result = man->size - atomic64_read(&mgr->available); 243 244 return (result > 0 ? result : 0) * PAGE_SIZE; 245 } 246 247 /** 248 * amdgpu_gtt_mgr_debug - dump VRAM table 249 * 250 * @man: TTM memory type manager 251 * @printer: DRM printer to use 252 * 253 * Dump the table content using printk. 254 */ 255 static void amdgpu_gtt_mgr_debug(struct ttm_mem_type_manager *man, 256 struct drm_printer *printer) 257 { 258 struct amdgpu_gtt_mgr *mgr = man->priv; 259 260 spin_lock(&mgr->lock); 261 drm_mm_print(&mgr->mm, printer); 262 spin_unlock(&mgr->lock); 263 264 drm_printf(printer, "man size:%llu pages, gtt available:%lld pages, usage:%lluMB\n", 265 man->size, (u64)atomic64_read(&mgr->available), 266 amdgpu_gtt_mgr_usage(man) >> 20); 267 } 268 269 const struct ttm_mem_type_manager_func amdgpu_gtt_mgr_func = { 270 .init = amdgpu_gtt_mgr_init, 271 .takedown = amdgpu_gtt_mgr_fini, 272 .get_node = amdgpu_gtt_mgr_new, 273 .put_node = amdgpu_gtt_mgr_del, 274 .debug = amdgpu_gtt_mgr_debug 275 }; 276