1 /* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Christian König 23 */ 24 25 #include <drm/drmP.h> 26 #include "amdgpu.h" 27 28 struct amdgpu_gtt_mgr { 29 struct drm_mm mm; 30 spinlock_t lock; 31 atomic64_t available; 32 }; 33 34 /** 35 * amdgpu_gtt_mgr_init - init GTT manager and DRM MM 36 * 37 * @man: TTM memory type manager 38 * @p_size: maximum size of GTT 39 * 40 * Allocate and initialize the GTT manager. 41 */ 42 static int amdgpu_gtt_mgr_init(struct ttm_mem_type_manager *man, 43 unsigned long p_size) 44 { 45 struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev); 46 struct amdgpu_gtt_mgr *mgr; 47 uint64_t start, size; 48 49 mgr = kzalloc(sizeof(*mgr), GFP_KERNEL); 50 if (!mgr) 51 return -ENOMEM; 52 53 start = AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GTT_NUM_TRANSFER_WINDOWS; 54 size = (adev->mc.gart_size >> PAGE_SHIFT) - start; 55 drm_mm_init(&mgr->mm, start, size); 56 spin_lock_init(&mgr->lock); 57 atomic64_set(&mgr->available, p_size); 58 man->priv = mgr; 59 return 0; 60 } 61 62 /** 63 * amdgpu_gtt_mgr_fini - free and destroy GTT manager 64 * 65 * @man: TTM memory type manager 66 * 67 * Destroy and free the GTT manager, returns -EBUSY if ranges are still 68 * allocated inside it. 69 */ 70 static int amdgpu_gtt_mgr_fini(struct ttm_mem_type_manager *man) 71 { 72 struct amdgpu_gtt_mgr *mgr = man->priv; 73 74 spin_lock(&mgr->lock); 75 if (!drm_mm_clean(&mgr->mm)) { 76 spin_unlock(&mgr->lock); 77 return -EBUSY; 78 } 79 80 drm_mm_takedown(&mgr->mm); 81 spin_unlock(&mgr->lock); 82 kfree(mgr); 83 man->priv = NULL; 84 return 0; 85 } 86 87 /** 88 * amdgpu_gtt_mgr_is_allocated - Check if mem has address space 89 * 90 * @mem: the mem object to check 91 * 92 * Check if a mem object has already address space allocated. 93 */ 94 bool amdgpu_gtt_mgr_is_allocated(struct ttm_mem_reg *mem) 95 { 96 struct drm_mm_node *node = mem->mm_node; 97 98 return (node->start != AMDGPU_BO_INVALID_OFFSET); 99 } 100 101 /** 102 * amdgpu_gtt_mgr_alloc - allocate new ranges 103 * 104 * @man: TTM memory type manager 105 * @tbo: TTM BO we need this range for 106 * @place: placement flags and restrictions 107 * @mem: the resulting mem object 108 * 109 * Allocate the address space for a node. 110 */ 111 static int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man, 112 struct ttm_buffer_object *tbo, 113 const struct ttm_place *place, 114 struct ttm_mem_reg *mem) 115 { 116 struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev); 117 struct amdgpu_gtt_mgr *mgr = man->priv; 118 struct drm_mm_node *node = mem->mm_node; 119 enum drm_mm_insert_mode mode; 120 unsigned long fpfn, lpfn; 121 int r; 122 123 if (amdgpu_gtt_mgr_is_allocated(mem)) 124 return 0; 125 126 if (place) 127 fpfn = place->fpfn; 128 else 129 fpfn = 0; 130 131 if (place && place->lpfn) 132 lpfn = place->lpfn; 133 else 134 lpfn = adev->gart.num_cpu_pages; 135 136 mode = DRM_MM_INSERT_BEST; 137 if (place && place->flags & TTM_PL_FLAG_TOPDOWN) 138 mode = DRM_MM_INSERT_HIGH; 139 140 spin_lock(&mgr->lock); 141 r = drm_mm_insert_node_in_range(&mgr->mm, node, 142 mem->num_pages, mem->page_alignment, 0, 143 fpfn, lpfn, mode); 144 spin_unlock(&mgr->lock); 145 146 if (!r) 147 mem->start = node->start; 148 149 return r; 150 } 151 152 /** 153 * amdgpu_gtt_mgr_new - allocate a new node 154 * 155 * @man: TTM memory type manager 156 * @tbo: TTM BO we need this range for 157 * @place: placement flags and restrictions 158 * @mem: the resulting mem object 159 * 160 * Dummy, allocate the node but no space for it yet. 161 */ 162 static int amdgpu_gtt_mgr_new(struct ttm_mem_type_manager *man, 163 struct ttm_buffer_object *tbo, 164 const struct ttm_place *place, 165 struct ttm_mem_reg *mem) 166 { 167 struct amdgpu_gtt_mgr *mgr = man->priv; 168 struct drm_mm_node *node; 169 int r; 170 171 spin_lock(&mgr->lock); 172 if (atomic64_read(&mgr->available) < mem->num_pages) { 173 spin_unlock(&mgr->lock); 174 return 0; 175 } 176 atomic64_sub(mem->num_pages, &mgr->available); 177 spin_unlock(&mgr->lock); 178 179 node = kzalloc(sizeof(*node), GFP_KERNEL); 180 if (!node) { 181 r = -ENOMEM; 182 goto err_out; 183 } 184 185 node->start = AMDGPU_BO_INVALID_OFFSET; 186 node->size = mem->num_pages; 187 mem->mm_node = node; 188 189 if (place->fpfn || place->lpfn || place->flags & TTM_PL_FLAG_TOPDOWN) { 190 r = amdgpu_gtt_mgr_alloc(man, tbo, place, mem); 191 if (unlikely(r)) { 192 kfree(node); 193 mem->mm_node = NULL; 194 r = 0; 195 goto err_out; 196 } 197 } else { 198 mem->start = node->start; 199 } 200 201 return 0; 202 err_out: 203 atomic64_add(mem->num_pages, &mgr->available); 204 205 return r; 206 } 207 208 /** 209 * amdgpu_gtt_mgr_del - free ranges 210 * 211 * @man: TTM memory type manager 212 * @tbo: TTM BO we need this range for 213 * @place: placement flags and restrictions 214 * @mem: TTM memory object 215 * 216 * Free the allocated GTT again. 217 */ 218 static void amdgpu_gtt_mgr_del(struct ttm_mem_type_manager *man, 219 struct ttm_mem_reg *mem) 220 { 221 struct amdgpu_gtt_mgr *mgr = man->priv; 222 struct drm_mm_node *node = mem->mm_node; 223 224 if (!node) 225 return; 226 227 spin_lock(&mgr->lock); 228 if (node->start != AMDGPU_BO_INVALID_OFFSET) 229 drm_mm_remove_node(node); 230 spin_unlock(&mgr->lock); 231 atomic64_add(mem->num_pages, &mgr->available); 232 233 kfree(node); 234 mem->mm_node = NULL; 235 } 236 237 /** 238 * amdgpu_gtt_mgr_usage - return usage of GTT domain 239 * 240 * @man: TTM memory type manager 241 * 242 * Return how many bytes are used in the GTT domain 243 */ 244 uint64_t amdgpu_gtt_mgr_usage(struct ttm_mem_type_manager *man) 245 { 246 struct amdgpu_gtt_mgr *mgr = man->priv; 247 248 return (u64)(man->size - atomic64_read(&mgr->available)) * PAGE_SIZE; 249 } 250 251 /** 252 * amdgpu_gtt_mgr_debug - dump VRAM table 253 * 254 * @man: TTM memory type manager 255 * @printer: DRM printer to use 256 * 257 * Dump the table content using printk. 258 */ 259 static void amdgpu_gtt_mgr_debug(struct ttm_mem_type_manager *man, 260 struct drm_printer *printer) 261 { 262 struct amdgpu_gtt_mgr *mgr = man->priv; 263 264 spin_lock(&mgr->lock); 265 drm_mm_print(&mgr->mm, printer); 266 spin_unlock(&mgr->lock); 267 268 drm_printf(printer, "man size:%llu pages, gtt available:%llu pages, usage:%lluMB\n", 269 man->size, (u64)atomic64_read(&mgr->available), 270 amdgpu_gtt_mgr_usage(man) >> 20); 271 } 272 273 const struct ttm_mem_type_manager_func amdgpu_gtt_mgr_func = { 274 .init = amdgpu_gtt_mgr_init, 275 .takedown = amdgpu_gtt_mgr_fini, 276 .get_node = amdgpu_gtt_mgr_new, 277 .put_node = amdgpu_gtt_mgr_del, 278 .debug = amdgpu_gtt_mgr_debug 279 }; 280