1 /*
2  * Copyright 2014 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23 
24 #ifndef __AMDGPU_GDS_H__
25 #define __AMDGPU_GDS_H__
26 
27 /* Because TTM request that alloacted buffer should be PAGE_SIZE aligned,
28  * we should report GDS/GWS/OA size as PAGE_SIZE aligned
29  * */
30 #define AMDGPU_GDS_SHIFT	2
31 #define AMDGPU_GWS_SHIFT	PAGE_SHIFT
32 #define AMDGPU_OA_SHIFT		PAGE_SHIFT
33 
34 #define AMDGPU_PL_GDS		TTM_PL_PRIV0
35 #define AMDGPU_PL_GWS		TTM_PL_PRIV1
36 #define AMDGPU_PL_OA		TTM_PL_PRIV2
37 
38 #define AMDGPU_PL_FLAG_GDS		TTM_PL_FLAG_PRIV0
39 #define AMDGPU_PL_FLAG_GWS		TTM_PL_FLAG_PRIV1
40 #define AMDGPU_PL_FLAG_OA		TTM_PL_FLAG_PRIV2
41 
42 struct amdgpu_ring;
43 struct amdgpu_bo;
44 
45 struct amdgpu_gds_asic_info {
46 	uint32_t	total_size;
47 	uint32_t	gfx_partition_size;
48 	uint32_t	cs_partition_size;
49 };
50 
51 struct amdgpu_gds {
52 	struct amdgpu_gds_asic_info	mem;
53 	struct amdgpu_gds_asic_info	gws;
54 	struct amdgpu_gds_asic_info	oa;
55 	/* At present, GDS, GWS and OA resources for gfx (graphics)
56 	 * is always pre-allocated and available for graphics operation.
57 	 * Such resource is shared between all gfx clients.
58 	 * TODO: move this operation to user space
59 	 * */
60 	struct amdgpu_bo*		gds_gfx_bo;
61 	struct amdgpu_bo*		gws_gfx_bo;
62 	struct amdgpu_bo*		oa_gfx_bo;
63 };
64 
65 struct amdgpu_gds_reg_offset {
66 	uint32_t	mem_base;
67 	uint32_t	mem_size;
68 	uint32_t	gws;
69 	uint32_t	oa;
70 };
71 
72 #endif /* __AMDGPU_GDS_H__ */
73