1 /*
2  * Copyright 2020 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23 
24 #include <linux/debugfs.h>
25 #include <linux/firmware.h>
26 #include <linux/dma-mapping.h>
27 
28 #include "amdgpu.h"
29 #include "amdgpu_fw_attestation.h"
30 #include "amdgpu_psp.h"
31 #include "amdgpu_ucode.h"
32 #include "soc15_common.h"
33 
34 #define FW_ATTESTATION_DB_COOKIE        0x143b6a37
35 #define FW_ATTESTATION_RECORD_VALID  	1
36 #define FW_ATTESTATION_MAX_SIZE		4096
37 
38 typedef struct FW_ATT_DB_HEADER
39 {
40 	uint32_t AttDbVersion;           /* version of the fwar feature */
41 	uint32_t AttDbCookie;            /* cookie as an extra check for corrupt data */
42 } FW_ATT_DB_HEADER;
43 
44 typedef struct FW_ATT_RECORD
45 {
46 	uint16_t AttFwIdV1;              /* Legacy FW Type field */
47 	uint16_t AttFwIdV2;              /* V2 FW ID field */
48 	uint32_t AttFWVersion;           /* FW Version */
49 	uint16_t AttFWActiveFunctionID;  /* The VF ID (only in VF Attestation Table) */
50 	uint16_t AttSource;              /* FW source indicator */
51 	uint16_t RecordValid;            /* Indicates whether the record is a valid entry */
52 	uint8_t  AttFwTaId;              /* Ta ID (only in TA Attestation Table) */
53 	uint8_t  Reserved;
54 } FW_ATT_RECORD;
55 
56 static ssize_t amdgpu_fw_attestation_debugfs_read(struct file *f,
57 						  char __user *buf,
58 						  size_t size,
59 						  loff_t *pos)
60 {
61 	struct amdgpu_device *adev = (struct amdgpu_device *)file_inode(f)->i_private;
62 	uint64_t records_addr = 0;
63 	uint64_t vram_pos = 0;
64 	FW_ATT_DB_HEADER fw_att_hdr = {0};
65 	FW_ATT_RECORD fw_att_record = {0};
66 
67 	if (size < sizeof(FW_ATT_RECORD)) {
68 		DRM_WARN("FW attestation input buffer not enough memory");
69 		return -EINVAL;
70 	}
71 
72 	if ((*pos + sizeof(FW_ATT_DB_HEADER)) >= FW_ATTESTATION_MAX_SIZE) {
73 		DRM_WARN("FW attestation out of bounds");
74 		return 0;
75 	}
76 
77 	if (psp_get_fw_attestation_records_addr(&adev->psp, &records_addr)) {
78 		DRM_WARN("Failed to get FW attestation record address");
79 		return -EINVAL;
80 	}
81 
82 	vram_pos =  records_addr - adev->gmc.vram_start;
83 
84 	if (*pos == 0) {
85 		amdgpu_device_vram_access(adev,
86 					  vram_pos,
87 					  (uint32_t*)&fw_att_hdr,
88 					  sizeof(FW_ATT_DB_HEADER),
89 					  false);
90 
91 		if (fw_att_hdr.AttDbCookie != FW_ATTESTATION_DB_COOKIE) {
92 			DRM_WARN("Invalid FW attestation cookie");
93 			return -EINVAL;
94 		}
95 
96 		DRM_INFO("FW attestation version = 0x%X", fw_att_hdr.AttDbVersion);
97 	}
98 
99 	amdgpu_device_vram_access(adev,
100 				  vram_pos + sizeof(FW_ATT_DB_HEADER) + *pos,
101 				  (uint32_t*)&fw_att_record,
102 				  sizeof(FW_ATT_RECORD),
103 				  false);
104 
105 	if (fw_att_record.RecordValid != FW_ATTESTATION_RECORD_VALID)
106 		return 0;
107 
108 	if (copy_to_user(buf, (void*)&fw_att_record, sizeof(FW_ATT_RECORD)))
109 		return -EINVAL;
110 
111 	*pos += sizeof(FW_ATT_RECORD);
112 
113 	return sizeof(FW_ATT_RECORD);
114 }
115 
116 static const struct file_operations amdgpu_fw_attestation_debugfs_ops = {
117 	.owner = THIS_MODULE,
118 	.read = amdgpu_fw_attestation_debugfs_read,
119 	.write = NULL,
120 	.llseek = default_llseek
121 };
122 
123 static int amdgpu_is_fw_attestation_supported(struct amdgpu_device *adev)
124 {
125 	if (adev->asic_type >= CHIP_SIENNA_CICHLID)
126 		return 1;
127 
128 	return 0;
129 }
130 
131 void amdgpu_fw_attestation_debugfs_init(struct amdgpu_device *adev)
132 {
133 	if (!amdgpu_is_fw_attestation_supported(adev))
134 		return;
135 
136 	debugfs_create_file("amdgpu_fw_attestation",
137 			    S_IRUSR,
138 			    adev_to_drm(adev)->primary->debugfs_root,
139 			    adev,
140 			    &amdgpu_fw_attestation_debugfs_ops);
141 }
142