1d38ceaf9SAlex Deucher /*
2d38ceaf9SAlex Deucher  * Copyright 2007-8 Advanced Micro Devices, Inc.
3d38ceaf9SAlex Deucher  * Copyright 2008 Red Hat Inc.
4d38ceaf9SAlex Deucher  *
5d38ceaf9SAlex Deucher  * Permission is hereby granted, free of charge, to any person obtaining a
6d38ceaf9SAlex Deucher  * copy of this software and associated documentation files (the "Software"),
7d38ceaf9SAlex Deucher  * to deal in the Software without restriction, including without limitation
8d38ceaf9SAlex Deucher  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9d38ceaf9SAlex Deucher  * and/or sell copies of the Software, and to permit persons to whom the
10d38ceaf9SAlex Deucher  * Software is furnished to do so, subject to the following conditions:
11d38ceaf9SAlex Deucher  *
12d38ceaf9SAlex Deucher  * The above copyright notice and this permission notice shall be included in
13d38ceaf9SAlex Deucher  * all copies or substantial portions of the Software.
14d38ceaf9SAlex Deucher  *
15d38ceaf9SAlex Deucher  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16d38ceaf9SAlex Deucher  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17d38ceaf9SAlex Deucher  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18d38ceaf9SAlex Deucher  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19d38ceaf9SAlex Deucher  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20d38ceaf9SAlex Deucher  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21d38ceaf9SAlex Deucher  * OTHER DEALINGS IN THE SOFTWARE.
22d38ceaf9SAlex Deucher  *
23d38ceaf9SAlex Deucher  * Authors: Dave Airlie
24d38ceaf9SAlex Deucher  *          Alex Deucher
25d38ceaf9SAlex Deucher  */
26fdf2f6c5SSam Ravnborg 
27d38ceaf9SAlex Deucher #include <drm/drm_crtc_helper.h>
28d38ceaf9SAlex Deucher #include <drm/amdgpu_drm.h>
29d38ceaf9SAlex Deucher #include "amdgpu.h"
30d38ceaf9SAlex Deucher #include "amdgpu_connectors.h"
315df58525SHuang Rui #include "amdgpu_display.h"
32d38ceaf9SAlex Deucher #include "atom.h"
33d38ceaf9SAlex Deucher #include "atombios_encoders.h"
34d38ceaf9SAlex Deucher 
35d38ceaf9SAlex Deucher void
36d38ceaf9SAlex Deucher amdgpu_link_encoder_connector(struct drm_device *dev)
37d38ceaf9SAlex Deucher {
38d38ceaf9SAlex Deucher 	struct amdgpu_device *adev = dev->dev_private;
39d38ceaf9SAlex Deucher 	struct drm_connector *connector;
40d38ceaf9SAlex Deucher 	struct amdgpu_connector *amdgpu_connector;
41d38ceaf9SAlex Deucher 	struct drm_encoder *encoder;
42d38ceaf9SAlex Deucher 	struct amdgpu_encoder *amdgpu_encoder;
43d38ceaf9SAlex Deucher 
44d38ceaf9SAlex Deucher 	/* walk the list and link encoders to connectors */
45d38ceaf9SAlex Deucher 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
46d38ceaf9SAlex Deucher 		amdgpu_connector = to_amdgpu_connector(connector);
47d38ceaf9SAlex Deucher 		list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
48d38ceaf9SAlex Deucher 			amdgpu_encoder = to_amdgpu_encoder(encoder);
49d38ceaf9SAlex Deucher 			if (amdgpu_encoder->devices & amdgpu_connector->devices) {
50cde4c44dSDaniel Vetter 				drm_connector_attach_encoder(connector, encoder);
51d38ceaf9SAlex Deucher 				if (amdgpu_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
52d38ceaf9SAlex Deucher 					amdgpu_atombios_encoder_init_backlight(amdgpu_encoder, connector);
53d38ceaf9SAlex Deucher 					adev->mode_info.bl_encoder = amdgpu_encoder;
54d38ceaf9SAlex Deucher 				}
55d38ceaf9SAlex Deucher 			}
56d38ceaf9SAlex Deucher 		}
57d38ceaf9SAlex Deucher 	}
58d38ceaf9SAlex Deucher }
59d38ceaf9SAlex Deucher 
60d38ceaf9SAlex Deucher void amdgpu_encoder_set_active_device(struct drm_encoder *encoder)
61d38ceaf9SAlex Deucher {
62d38ceaf9SAlex Deucher 	struct drm_device *dev = encoder->dev;
63d38ceaf9SAlex Deucher 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
64d38ceaf9SAlex Deucher 	struct drm_connector *connector;
65d38ceaf9SAlex Deucher 
66d38ceaf9SAlex Deucher 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
67d38ceaf9SAlex Deucher 		if (connector->encoder == encoder) {
68d38ceaf9SAlex Deucher 			struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
69d38ceaf9SAlex Deucher 			amdgpu_encoder->active_device = amdgpu_encoder->devices & amdgpu_connector->devices;
70d38ceaf9SAlex Deucher 			DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
71d38ceaf9SAlex Deucher 				  amdgpu_encoder->active_device, amdgpu_encoder->devices,
72d38ceaf9SAlex Deucher 				  amdgpu_connector->devices, encoder->encoder_type);
73d38ceaf9SAlex Deucher 		}
74d38ceaf9SAlex Deucher 	}
75d38ceaf9SAlex Deucher }
76d38ceaf9SAlex Deucher 
77d38ceaf9SAlex Deucher struct drm_connector *
78d38ceaf9SAlex Deucher amdgpu_get_connector_for_encoder(struct drm_encoder *encoder)
79d38ceaf9SAlex Deucher {
80d38ceaf9SAlex Deucher 	struct drm_device *dev = encoder->dev;
81d38ceaf9SAlex Deucher 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
82d38ceaf9SAlex Deucher 	struct drm_connector *connector;
83d38ceaf9SAlex Deucher 	struct amdgpu_connector *amdgpu_connector;
84d38ceaf9SAlex Deucher 
85d38ceaf9SAlex Deucher 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
86d38ceaf9SAlex Deucher 		amdgpu_connector = to_amdgpu_connector(connector);
87d38ceaf9SAlex Deucher 		if (amdgpu_encoder->active_device & amdgpu_connector->devices)
88d38ceaf9SAlex Deucher 			return connector;
89d38ceaf9SAlex Deucher 	}
90d38ceaf9SAlex Deucher 	return NULL;
91d38ceaf9SAlex Deucher }
92d38ceaf9SAlex Deucher 
93d38ceaf9SAlex Deucher struct drm_connector *
94d38ceaf9SAlex Deucher amdgpu_get_connector_for_encoder_init(struct drm_encoder *encoder)
95d38ceaf9SAlex Deucher {
96d38ceaf9SAlex Deucher 	struct drm_device *dev = encoder->dev;
97d38ceaf9SAlex Deucher 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
98d38ceaf9SAlex Deucher 	struct drm_connector *connector;
99d38ceaf9SAlex Deucher 	struct amdgpu_connector *amdgpu_connector;
100d38ceaf9SAlex Deucher 
101d38ceaf9SAlex Deucher 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
102d38ceaf9SAlex Deucher 		amdgpu_connector = to_amdgpu_connector(connector);
103d38ceaf9SAlex Deucher 		if (amdgpu_encoder->devices & amdgpu_connector->devices)
104d38ceaf9SAlex Deucher 			return connector;
105d38ceaf9SAlex Deucher 	}
106d38ceaf9SAlex Deucher 	return NULL;
107d38ceaf9SAlex Deucher }
108d38ceaf9SAlex Deucher 
109d38ceaf9SAlex Deucher struct drm_encoder *amdgpu_get_external_encoder(struct drm_encoder *encoder)
110d38ceaf9SAlex Deucher {
111d38ceaf9SAlex Deucher 	struct drm_device *dev = encoder->dev;
112d38ceaf9SAlex Deucher 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
113d38ceaf9SAlex Deucher 	struct drm_encoder *other_encoder;
114d38ceaf9SAlex Deucher 	struct amdgpu_encoder *other_amdgpu_encoder;
115d38ceaf9SAlex Deucher 
116d38ceaf9SAlex Deucher 	if (amdgpu_encoder->is_ext_encoder)
117d38ceaf9SAlex Deucher 		return NULL;
118d38ceaf9SAlex Deucher 
119d38ceaf9SAlex Deucher 	list_for_each_entry(other_encoder, &dev->mode_config.encoder_list, head) {
120d38ceaf9SAlex Deucher 		if (other_encoder == encoder)
121d38ceaf9SAlex Deucher 			continue;
122d38ceaf9SAlex Deucher 		other_amdgpu_encoder = to_amdgpu_encoder(other_encoder);
123d38ceaf9SAlex Deucher 		if (other_amdgpu_encoder->is_ext_encoder &&
124d38ceaf9SAlex Deucher 		    (amdgpu_encoder->devices & other_amdgpu_encoder->devices))
125d38ceaf9SAlex Deucher 			return other_encoder;
126d38ceaf9SAlex Deucher 	}
127d38ceaf9SAlex Deucher 	return NULL;
128d38ceaf9SAlex Deucher }
129d38ceaf9SAlex Deucher 
130d38ceaf9SAlex Deucher u16 amdgpu_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder)
131d38ceaf9SAlex Deucher {
132d38ceaf9SAlex Deucher 	struct drm_encoder *other_encoder = amdgpu_get_external_encoder(encoder);
133d38ceaf9SAlex Deucher 
134d38ceaf9SAlex Deucher 	if (other_encoder) {
135d38ceaf9SAlex Deucher 		struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(other_encoder);
136d38ceaf9SAlex Deucher 
137d38ceaf9SAlex Deucher 		switch (amdgpu_encoder->encoder_id) {
138d38ceaf9SAlex Deucher 		case ENCODER_OBJECT_ID_TRAVIS:
139d38ceaf9SAlex Deucher 		case ENCODER_OBJECT_ID_NUTMEG:
140d38ceaf9SAlex Deucher 			return amdgpu_encoder->encoder_id;
141d38ceaf9SAlex Deucher 		default:
142d38ceaf9SAlex Deucher 			return ENCODER_OBJECT_ID_NONE;
143d38ceaf9SAlex Deucher 		}
144d38ceaf9SAlex Deucher 	}
145d38ceaf9SAlex Deucher 	return ENCODER_OBJECT_ID_NONE;
146d38ceaf9SAlex Deucher }
147d38ceaf9SAlex Deucher 
148d38ceaf9SAlex Deucher void amdgpu_panel_mode_fixup(struct drm_encoder *encoder,
149d38ceaf9SAlex Deucher 			     struct drm_display_mode *adjusted_mode)
150d38ceaf9SAlex Deucher {
151d38ceaf9SAlex Deucher 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
152d38ceaf9SAlex Deucher 	struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode;
153d38ceaf9SAlex Deucher 	unsigned hblank = native_mode->htotal - native_mode->hdisplay;
154d38ceaf9SAlex Deucher 	unsigned vblank = native_mode->vtotal - native_mode->vdisplay;
155d38ceaf9SAlex Deucher 	unsigned hover = native_mode->hsync_start - native_mode->hdisplay;
156d38ceaf9SAlex Deucher 	unsigned vover = native_mode->vsync_start - native_mode->vdisplay;
157d38ceaf9SAlex Deucher 	unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start;
158d38ceaf9SAlex Deucher 	unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start;
159d38ceaf9SAlex Deucher 
160d38ceaf9SAlex Deucher 	adjusted_mode->clock = native_mode->clock;
161d38ceaf9SAlex Deucher 	adjusted_mode->flags = native_mode->flags;
162d38ceaf9SAlex Deucher 
163d38ceaf9SAlex Deucher 	adjusted_mode->hdisplay = native_mode->hdisplay;
164d38ceaf9SAlex Deucher 	adjusted_mode->vdisplay = native_mode->vdisplay;
165d38ceaf9SAlex Deucher 
166d38ceaf9SAlex Deucher 	adjusted_mode->htotal = native_mode->hdisplay + hblank;
167d38ceaf9SAlex Deucher 	adjusted_mode->hsync_start = native_mode->hdisplay + hover;
168d38ceaf9SAlex Deucher 	adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width;
169d38ceaf9SAlex Deucher 
170d38ceaf9SAlex Deucher 	adjusted_mode->vtotal = native_mode->vdisplay + vblank;
171d38ceaf9SAlex Deucher 	adjusted_mode->vsync_start = native_mode->vdisplay + vover;
172d38ceaf9SAlex Deucher 	adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width;
173d38ceaf9SAlex Deucher 
174d38ceaf9SAlex Deucher 	drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
175d38ceaf9SAlex Deucher 
176d38ceaf9SAlex Deucher 	adjusted_mode->crtc_hdisplay = native_mode->hdisplay;
177d38ceaf9SAlex Deucher 	adjusted_mode->crtc_vdisplay = native_mode->vdisplay;
178d38ceaf9SAlex Deucher 
179d38ceaf9SAlex Deucher 	adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + hblank;
180d38ceaf9SAlex Deucher 	adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover;
181d38ceaf9SAlex Deucher 	adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width;
182d38ceaf9SAlex Deucher 
183d38ceaf9SAlex Deucher 	adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank;
184d38ceaf9SAlex Deucher 	adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + vover;
185d38ceaf9SAlex Deucher 	adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + vsync_width;
186d38ceaf9SAlex Deucher 
187d38ceaf9SAlex Deucher }
188d38ceaf9SAlex Deucher 
189d38ceaf9SAlex Deucher bool amdgpu_dig_monitor_is_duallink(struct drm_encoder *encoder,
190d38ceaf9SAlex Deucher 				    u32 pixel_clock)
191d38ceaf9SAlex Deucher {
192d38ceaf9SAlex Deucher 	struct drm_connector *connector;
193d38ceaf9SAlex Deucher 	struct amdgpu_connector *amdgpu_connector;
194d38ceaf9SAlex Deucher 	struct amdgpu_connector_atom_dig *dig_connector;
195d38ceaf9SAlex Deucher 
196d38ceaf9SAlex Deucher 	connector = amdgpu_get_connector_for_encoder(encoder);
197d38ceaf9SAlex Deucher 	/* if we don't have an active device yet, just use one of
198d38ceaf9SAlex Deucher 	 * the connectors tied to the encoder.
199d38ceaf9SAlex Deucher 	 */
200d38ceaf9SAlex Deucher 	if (!connector)
201d38ceaf9SAlex Deucher 		connector = amdgpu_get_connector_for_encoder_init(encoder);
202d38ceaf9SAlex Deucher 	amdgpu_connector = to_amdgpu_connector(connector);
203d38ceaf9SAlex Deucher 
204d38ceaf9SAlex Deucher 	switch (connector->connector_type) {
205d38ceaf9SAlex Deucher 	case DRM_MODE_CONNECTOR_DVII:
206d38ceaf9SAlex Deucher 	case DRM_MODE_CONNECTOR_HDMIB:
207d38ceaf9SAlex Deucher 		if (amdgpu_connector->use_digital) {
208d38ceaf9SAlex Deucher 			/* HDMI 1.3 supports up to 340 Mhz over single link */
209d38ceaf9SAlex Deucher 			if (drm_detect_hdmi_monitor(amdgpu_connector_edid(connector))) {
210d38ceaf9SAlex Deucher 				if (pixel_clock > 340000)
211d38ceaf9SAlex Deucher 					return true;
212d38ceaf9SAlex Deucher 				else
213d38ceaf9SAlex Deucher 					return false;
214d38ceaf9SAlex Deucher 			} else {
215d38ceaf9SAlex Deucher 				if (pixel_clock > 165000)
216d38ceaf9SAlex Deucher 					return true;
217d38ceaf9SAlex Deucher 				else
218d38ceaf9SAlex Deucher 					return false;
219d38ceaf9SAlex Deucher 			}
220d38ceaf9SAlex Deucher 		} else
221d38ceaf9SAlex Deucher 			return false;
222d38ceaf9SAlex Deucher 	case DRM_MODE_CONNECTOR_DVID:
223d38ceaf9SAlex Deucher 	case DRM_MODE_CONNECTOR_HDMIA:
224d38ceaf9SAlex Deucher 	case DRM_MODE_CONNECTOR_DisplayPort:
225d38ceaf9SAlex Deucher 		dig_connector = amdgpu_connector->con_priv;
226d38ceaf9SAlex Deucher 		if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
227d38ceaf9SAlex Deucher 		    (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
228d38ceaf9SAlex Deucher 			return false;
229d38ceaf9SAlex Deucher 		else {
230d38ceaf9SAlex Deucher 			/* HDMI 1.3 supports up to 340 Mhz over single link */
231d38ceaf9SAlex Deucher 			if (drm_detect_hdmi_monitor(amdgpu_connector_edid(connector))) {
232d38ceaf9SAlex Deucher 				if (pixel_clock > 340000)
233d38ceaf9SAlex Deucher 					return true;
234d38ceaf9SAlex Deucher 				else
235d38ceaf9SAlex Deucher 					return false;
236d38ceaf9SAlex Deucher 			} else {
237d38ceaf9SAlex Deucher 				if (pixel_clock > 165000)
238d38ceaf9SAlex Deucher 					return true;
239d38ceaf9SAlex Deucher 				else
240d38ceaf9SAlex Deucher 					return false;
241d38ceaf9SAlex Deucher 			}
242d38ceaf9SAlex Deucher 		}
243d38ceaf9SAlex Deucher 	default:
244d38ceaf9SAlex Deucher 		return false;
245d38ceaf9SAlex Deucher 	}
246d38ceaf9SAlex Deucher }
247