1d38ceaf9SAlex Deucher /*
2d38ceaf9SAlex Deucher  * Copyright 2007-8 Advanced Micro Devices, Inc.
3d38ceaf9SAlex Deucher  * Copyright 2008 Red Hat Inc.
4d38ceaf9SAlex Deucher  *
5d38ceaf9SAlex Deucher  * Permission is hereby granted, free of charge, to any person obtaining a
6d38ceaf9SAlex Deucher  * copy of this software and associated documentation files (the "Software"),
7d38ceaf9SAlex Deucher  * to deal in the Software without restriction, including without limitation
8d38ceaf9SAlex Deucher  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9d38ceaf9SAlex Deucher  * and/or sell copies of the Software, and to permit persons to whom the
10d38ceaf9SAlex Deucher  * Software is furnished to do so, subject to the following conditions:
11d38ceaf9SAlex Deucher  *
12d38ceaf9SAlex Deucher  * The above copyright notice and this permission notice shall be included in
13d38ceaf9SAlex Deucher  * all copies or substantial portions of the Software.
14d38ceaf9SAlex Deucher  *
15d38ceaf9SAlex Deucher  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16d38ceaf9SAlex Deucher  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17d38ceaf9SAlex Deucher  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18d38ceaf9SAlex Deucher  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19d38ceaf9SAlex Deucher  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20d38ceaf9SAlex Deucher  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21d38ceaf9SAlex Deucher  * OTHER DEALINGS IN THE SOFTWARE.
22d38ceaf9SAlex Deucher  *
23d38ceaf9SAlex Deucher  * Authors: Dave Airlie
24d38ceaf9SAlex Deucher  *          Alex Deucher
25d38ceaf9SAlex Deucher  */
26fdf2f6c5SSam Ravnborg 
27d38ceaf9SAlex Deucher #include <drm/amdgpu_drm.h>
28d38ceaf9SAlex Deucher #include "amdgpu.h"
29d38ceaf9SAlex Deucher #include "amdgpu_connectors.h"
305df58525SHuang Rui #include "amdgpu_display.h"
31d38ceaf9SAlex Deucher #include "atom.h"
32d38ceaf9SAlex Deucher #include "atombios_encoders.h"
33d38ceaf9SAlex Deucher 
34d38ceaf9SAlex Deucher void
amdgpu_link_encoder_connector(struct drm_device * dev)35d38ceaf9SAlex Deucher amdgpu_link_encoder_connector(struct drm_device *dev)
36d38ceaf9SAlex Deucher {
371348969aSLuben Tuikov 	struct amdgpu_device *adev = drm_to_adev(dev);
38d38ceaf9SAlex Deucher 	struct drm_connector *connector;
39f8d2d39eSLyude Paul 	struct drm_connector_list_iter iter;
40d38ceaf9SAlex Deucher 	struct amdgpu_connector *amdgpu_connector;
41d38ceaf9SAlex Deucher 	struct drm_encoder *encoder;
42d38ceaf9SAlex Deucher 	struct amdgpu_encoder *amdgpu_encoder;
43d38ceaf9SAlex Deucher 
44f8d2d39eSLyude Paul 	drm_connector_list_iter_begin(dev, &iter);
45d38ceaf9SAlex Deucher 	/* walk the list and link encoders to connectors */
46f8d2d39eSLyude Paul 	drm_for_each_connector_iter(connector, &iter) {
47d38ceaf9SAlex Deucher 		amdgpu_connector = to_amdgpu_connector(connector);
48d38ceaf9SAlex Deucher 		list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
49d38ceaf9SAlex Deucher 			amdgpu_encoder = to_amdgpu_encoder(encoder);
50d38ceaf9SAlex Deucher 			if (amdgpu_encoder->devices & amdgpu_connector->devices) {
51cde4c44dSDaniel Vetter 				drm_connector_attach_encoder(connector, encoder);
52d38ceaf9SAlex Deucher 				if (amdgpu_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
53d38ceaf9SAlex Deucher 					amdgpu_atombios_encoder_init_backlight(amdgpu_encoder, connector);
54d38ceaf9SAlex Deucher 					adev->mode_info.bl_encoder = amdgpu_encoder;
55d38ceaf9SAlex Deucher 				}
56d38ceaf9SAlex Deucher 			}
57d38ceaf9SAlex Deucher 		}
58d38ceaf9SAlex Deucher 	}
59f8d2d39eSLyude Paul 	drm_connector_list_iter_end(&iter);
60d38ceaf9SAlex Deucher }
61d38ceaf9SAlex Deucher 
amdgpu_encoder_set_active_device(struct drm_encoder * encoder)62d38ceaf9SAlex Deucher void amdgpu_encoder_set_active_device(struct drm_encoder *encoder)
63d38ceaf9SAlex Deucher {
64d38ceaf9SAlex Deucher 	struct drm_device *dev = encoder->dev;
65d38ceaf9SAlex Deucher 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
66d38ceaf9SAlex Deucher 	struct drm_connector *connector;
67f8d2d39eSLyude Paul 	struct drm_connector_list_iter iter;
68d38ceaf9SAlex Deucher 
69f8d2d39eSLyude Paul 	drm_connector_list_iter_begin(dev, &iter);
70f8d2d39eSLyude Paul 	drm_for_each_connector_iter(connector, &iter) {
71d38ceaf9SAlex Deucher 		if (connector->encoder == encoder) {
72d38ceaf9SAlex Deucher 			struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
73*29f187f7SSrinivasan Shanmugam 
74d38ceaf9SAlex Deucher 			amdgpu_encoder->active_device = amdgpu_encoder->devices & amdgpu_connector->devices;
75d38ceaf9SAlex Deucher 			DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
76d38ceaf9SAlex Deucher 				  amdgpu_encoder->active_device, amdgpu_encoder->devices,
77d38ceaf9SAlex Deucher 				  amdgpu_connector->devices, encoder->encoder_type);
78d38ceaf9SAlex Deucher 		}
79d38ceaf9SAlex Deucher 	}
80f8d2d39eSLyude Paul 	drm_connector_list_iter_end(&iter);
81d38ceaf9SAlex Deucher }
82d38ceaf9SAlex Deucher 
83d38ceaf9SAlex Deucher struct drm_connector *
amdgpu_get_connector_for_encoder(struct drm_encoder * encoder)84d38ceaf9SAlex Deucher amdgpu_get_connector_for_encoder(struct drm_encoder *encoder)
85d38ceaf9SAlex Deucher {
86d38ceaf9SAlex Deucher 	struct drm_device *dev = encoder->dev;
87d38ceaf9SAlex Deucher 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
88f8d2d39eSLyude Paul 	struct drm_connector *connector, *found = NULL;
89f8d2d39eSLyude Paul 	struct drm_connector_list_iter iter;
90d38ceaf9SAlex Deucher 	struct amdgpu_connector *amdgpu_connector;
91d38ceaf9SAlex Deucher 
92f8d2d39eSLyude Paul 	drm_connector_list_iter_begin(dev, &iter);
93f8d2d39eSLyude Paul 	drm_for_each_connector_iter(connector, &iter) {
94d38ceaf9SAlex Deucher 		amdgpu_connector = to_amdgpu_connector(connector);
95f8d2d39eSLyude Paul 		if (amdgpu_encoder->active_device & amdgpu_connector->devices) {
96f8d2d39eSLyude Paul 			found = connector;
97f8d2d39eSLyude Paul 			break;
98d38ceaf9SAlex Deucher 		}
99f8d2d39eSLyude Paul 	}
100f8d2d39eSLyude Paul 	drm_connector_list_iter_end(&iter);
101f8d2d39eSLyude Paul 	return found;
102d38ceaf9SAlex Deucher }
103d38ceaf9SAlex Deucher 
104d38ceaf9SAlex Deucher struct drm_connector *
amdgpu_get_connector_for_encoder_init(struct drm_encoder * encoder)105d38ceaf9SAlex Deucher amdgpu_get_connector_for_encoder_init(struct drm_encoder *encoder)
106d38ceaf9SAlex Deucher {
107d38ceaf9SAlex Deucher 	struct drm_device *dev = encoder->dev;
108d38ceaf9SAlex Deucher 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
109f8d2d39eSLyude Paul 	struct drm_connector *connector, *found = NULL;
110f8d2d39eSLyude Paul 	struct drm_connector_list_iter iter;
111d38ceaf9SAlex Deucher 	struct amdgpu_connector *amdgpu_connector;
112d38ceaf9SAlex Deucher 
113f8d2d39eSLyude Paul 	drm_connector_list_iter_begin(dev, &iter);
114f8d2d39eSLyude Paul 	drm_for_each_connector_iter(connector, &iter) {
115d38ceaf9SAlex Deucher 		amdgpu_connector = to_amdgpu_connector(connector);
116f8d2d39eSLyude Paul 		if (amdgpu_encoder->devices & amdgpu_connector->devices) {
117f8d2d39eSLyude Paul 			found = connector;
118f8d2d39eSLyude Paul 			break;
119d38ceaf9SAlex Deucher 		}
120f8d2d39eSLyude Paul 	}
121f8d2d39eSLyude Paul 	drm_connector_list_iter_end(&iter);
122f8d2d39eSLyude Paul 	return found;
123d38ceaf9SAlex Deucher }
124d38ceaf9SAlex Deucher 
amdgpu_get_external_encoder(struct drm_encoder * encoder)125d38ceaf9SAlex Deucher struct drm_encoder *amdgpu_get_external_encoder(struct drm_encoder *encoder)
126d38ceaf9SAlex Deucher {
127d38ceaf9SAlex Deucher 	struct drm_device *dev = encoder->dev;
128d38ceaf9SAlex Deucher 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
129d38ceaf9SAlex Deucher 	struct drm_encoder *other_encoder;
130d38ceaf9SAlex Deucher 	struct amdgpu_encoder *other_amdgpu_encoder;
131d38ceaf9SAlex Deucher 
132d38ceaf9SAlex Deucher 	if (amdgpu_encoder->is_ext_encoder)
133d38ceaf9SAlex Deucher 		return NULL;
134d38ceaf9SAlex Deucher 
135d38ceaf9SAlex Deucher 	list_for_each_entry(other_encoder, &dev->mode_config.encoder_list, head) {
136d38ceaf9SAlex Deucher 		if (other_encoder == encoder)
137d38ceaf9SAlex Deucher 			continue;
138d38ceaf9SAlex Deucher 		other_amdgpu_encoder = to_amdgpu_encoder(other_encoder);
139d38ceaf9SAlex Deucher 		if (other_amdgpu_encoder->is_ext_encoder &&
140d38ceaf9SAlex Deucher 		    (amdgpu_encoder->devices & other_amdgpu_encoder->devices))
141d38ceaf9SAlex Deucher 			return other_encoder;
142d38ceaf9SAlex Deucher 	}
143d38ceaf9SAlex Deucher 	return NULL;
144d38ceaf9SAlex Deucher }
145d38ceaf9SAlex Deucher 
amdgpu_encoder_get_dp_bridge_encoder_id(struct drm_encoder * encoder)146d38ceaf9SAlex Deucher u16 amdgpu_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder)
147d38ceaf9SAlex Deucher {
148d38ceaf9SAlex Deucher 	struct drm_encoder *other_encoder = amdgpu_get_external_encoder(encoder);
149d38ceaf9SAlex Deucher 
150d38ceaf9SAlex Deucher 	if (other_encoder) {
151d38ceaf9SAlex Deucher 		struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(other_encoder);
152d38ceaf9SAlex Deucher 
153d38ceaf9SAlex Deucher 		switch (amdgpu_encoder->encoder_id) {
154d38ceaf9SAlex Deucher 		case ENCODER_OBJECT_ID_TRAVIS:
155d38ceaf9SAlex Deucher 		case ENCODER_OBJECT_ID_NUTMEG:
156d38ceaf9SAlex Deucher 			return amdgpu_encoder->encoder_id;
157d38ceaf9SAlex Deucher 		default:
158d38ceaf9SAlex Deucher 			return ENCODER_OBJECT_ID_NONE;
159d38ceaf9SAlex Deucher 		}
160d38ceaf9SAlex Deucher 	}
161d38ceaf9SAlex Deucher 	return ENCODER_OBJECT_ID_NONE;
162d38ceaf9SAlex Deucher }
163d38ceaf9SAlex Deucher 
amdgpu_panel_mode_fixup(struct drm_encoder * encoder,struct drm_display_mode * adjusted_mode)164d38ceaf9SAlex Deucher void amdgpu_panel_mode_fixup(struct drm_encoder *encoder,
165d38ceaf9SAlex Deucher 			     struct drm_display_mode *adjusted_mode)
166d38ceaf9SAlex Deucher {
167d38ceaf9SAlex Deucher 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
168d38ceaf9SAlex Deucher 	struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode;
169*29f187f7SSrinivasan Shanmugam 	unsigned int hblank = native_mode->htotal - native_mode->hdisplay;
170*29f187f7SSrinivasan Shanmugam 	unsigned int vblank = native_mode->vtotal - native_mode->vdisplay;
171*29f187f7SSrinivasan Shanmugam 	unsigned int hover = native_mode->hsync_start - native_mode->hdisplay;
172*29f187f7SSrinivasan Shanmugam 	unsigned int vover = native_mode->vsync_start - native_mode->vdisplay;
173*29f187f7SSrinivasan Shanmugam 	unsigned int hsync_width = native_mode->hsync_end - native_mode->hsync_start;
174*29f187f7SSrinivasan Shanmugam 	unsigned int vsync_width = native_mode->vsync_end - native_mode->vsync_start;
175d38ceaf9SAlex Deucher 
176d38ceaf9SAlex Deucher 	adjusted_mode->clock = native_mode->clock;
177d38ceaf9SAlex Deucher 	adjusted_mode->flags = native_mode->flags;
178d38ceaf9SAlex Deucher 
179d38ceaf9SAlex Deucher 	adjusted_mode->hdisplay = native_mode->hdisplay;
180d38ceaf9SAlex Deucher 	adjusted_mode->vdisplay = native_mode->vdisplay;
181d38ceaf9SAlex Deucher 
182d38ceaf9SAlex Deucher 	adjusted_mode->htotal = native_mode->hdisplay + hblank;
183d38ceaf9SAlex Deucher 	adjusted_mode->hsync_start = native_mode->hdisplay + hover;
184d38ceaf9SAlex Deucher 	adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width;
185d38ceaf9SAlex Deucher 
186d38ceaf9SAlex Deucher 	adjusted_mode->vtotal = native_mode->vdisplay + vblank;
187d38ceaf9SAlex Deucher 	adjusted_mode->vsync_start = native_mode->vdisplay + vover;
188d38ceaf9SAlex Deucher 	adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width;
189d38ceaf9SAlex Deucher 
190d38ceaf9SAlex Deucher 	drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
191d38ceaf9SAlex Deucher 
192d38ceaf9SAlex Deucher 	adjusted_mode->crtc_hdisplay = native_mode->hdisplay;
193d38ceaf9SAlex Deucher 	adjusted_mode->crtc_vdisplay = native_mode->vdisplay;
194d38ceaf9SAlex Deucher 
195d38ceaf9SAlex Deucher 	adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + hblank;
196d38ceaf9SAlex Deucher 	adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover;
197d38ceaf9SAlex Deucher 	adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width;
198d38ceaf9SAlex Deucher 
199d38ceaf9SAlex Deucher 	adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank;
200d38ceaf9SAlex Deucher 	adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + vover;
201d38ceaf9SAlex Deucher 	adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + vsync_width;
202d38ceaf9SAlex Deucher 
203d38ceaf9SAlex Deucher }
204d38ceaf9SAlex Deucher 
amdgpu_dig_monitor_is_duallink(struct drm_encoder * encoder,u32 pixel_clock)205d38ceaf9SAlex Deucher bool amdgpu_dig_monitor_is_duallink(struct drm_encoder *encoder,
206d38ceaf9SAlex Deucher 				    u32 pixel_clock)
207d38ceaf9SAlex Deucher {
208d38ceaf9SAlex Deucher 	struct drm_connector *connector;
209d38ceaf9SAlex Deucher 	struct amdgpu_connector *amdgpu_connector;
210d38ceaf9SAlex Deucher 	struct amdgpu_connector_atom_dig *dig_connector;
211d38ceaf9SAlex Deucher 
212d38ceaf9SAlex Deucher 	connector = amdgpu_get_connector_for_encoder(encoder);
213d38ceaf9SAlex Deucher 	/* if we don't have an active device yet, just use one of
214d38ceaf9SAlex Deucher 	 * the connectors tied to the encoder.
215d38ceaf9SAlex Deucher 	 */
216d38ceaf9SAlex Deucher 	if (!connector)
217d38ceaf9SAlex Deucher 		connector = amdgpu_get_connector_for_encoder_init(encoder);
218d38ceaf9SAlex Deucher 	amdgpu_connector = to_amdgpu_connector(connector);
219d38ceaf9SAlex Deucher 
220d38ceaf9SAlex Deucher 	switch (connector->connector_type) {
221d38ceaf9SAlex Deucher 	case DRM_MODE_CONNECTOR_DVII:
222d38ceaf9SAlex Deucher 	case DRM_MODE_CONNECTOR_HDMIB:
223d38ceaf9SAlex Deucher 		if (amdgpu_connector->use_digital) {
224d38ceaf9SAlex Deucher 			/* HDMI 1.3 supports up to 340 Mhz over single link */
2253c021931SClaudio Suarez 			if (connector->display_info.is_hdmi) {
226d38ceaf9SAlex Deucher 				if (pixel_clock > 340000)
227d38ceaf9SAlex Deucher 					return true;
228d38ceaf9SAlex Deucher 				else
229d38ceaf9SAlex Deucher 					return false;
230d38ceaf9SAlex Deucher 			} else {
231d38ceaf9SAlex Deucher 				if (pixel_clock > 165000)
232d38ceaf9SAlex Deucher 					return true;
233d38ceaf9SAlex Deucher 				else
234d38ceaf9SAlex Deucher 					return false;
235d38ceaf9SAlex Deucher 			}
236d38ceaf9SAlex Deucher 		} else
237d38ceaf9SAlex Deucher 			return false;
238d38ceaf9SAlex Deucher 	case DRM_MODE_CONNECTOR_DVID:
239d38ceaf9SAlex Deucher 	case DRM_MODE_CONNECTOR_HDMIA:
240d38ceaf9SAlex Deucher 	case DRM_MODE_CONNECTOR_DisplayPort:
241d38ceaf9SAlex Deucher 		dig_connector = amdgpu_connector->con_priv;
242d38ceaf9SAlex Deucher 		if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
243d38ceaf9SAlex Deucher 		    (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
244d38ceaf9SAlex Deucher 			return false;
245d38ceaf9SAlex Deucher 		else {
246d38ceaf9SAlex Deucher 			/* HDMI 1.3 supports up to 340 Mhz over single link */
2473c021931SClaudio Suarez 			if (connector->display_info.is_hdmi) {
248d38ceaf9SAlex Deucher 				if (pixel_clock > 340000)
249d38ceaf9SAlex Deucher 					return true;
250d38ceaf9SAlex Deucher 				else
251d38ceaf9SAlex Deucher 					return false;
252d38ceaf9SAlex Deucher 			} else {
253d38ceaf9SAlex Deucher 				if (pixel_clock > 165000)
254d38ceaf9SAlex Deucher 					return true;
255d38ceaf9SAlex Deucher 				else
256d38ceaf9SAlex Deucher 					return false;
257d38ceaf9SAlex Deucher 			}
258d38ceaf9SAlex Deucher 		}
259d38ceaf9SAlex Deucher 	default:
260d38ceaf9SAlex Deucher 		return false;
261d38ceaf9SAlex Deucher 	}
262d38ceaf9SAlex Deucher }
263