1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright 2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 */ 24 25 #include "amdgpu.h" 26 27 /** 28 * amdgpu_mm_rdoorbell - read a doorbell dword 29 * 30 * @adev: amdgpu_device pointer 31 * @index: doorbell index 32 * 33 * Returns the value in the doorbell aperture at the 34 * requested doorbell index (CIK). 35 */ 36 u32 amdgpu_mm_rdoorbell(struct amdgpu_device *adev, u32 index) 37 { 38 if (amdgpu_device_skip_hw_access(adev)) 39 return 0; 40 41 if (index < adev->doorbell.num_kernel_doorbells) 42 return readl(adev->doorbell.ptr + index); 43 44 DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n", index); 45 return 0; 46 } 47 48 /** 49 * amdgpu_mm_wdoorbell - write a doorbell dword 50 * 51 * @adev: amdgpu_device pointer 52 * @index: doorbell index 53 * @v: value to write 54 * 55 * Writes @v to the doorbell aperture at the 56 * requested doorbell index (CIK). 57 */ 58 void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v) 59 { 60 if (amdgpu_device_skip_hw_access(adev)) 61 return; 62 63 if (index < adev->doorbell.num_kernel_doorbells) 64 writel(v, adev->doorbell.ptr + index); 65 else 66 DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n", index); 67 } 68 69 /** 70 * amdgpu_mm_rdoorbell64 - read a doorbell Qword 71 * 72 * @adev: amdgpu_device pointer 73 * @index: doorbell index 74 * 75 * Returns the value in the doorbell aperture at the 76 * requested doorbell index (VEGA10+). 77 */ 78 u64 amdgpu_mm_rdoorbell64(struct amdgpu_device *adev, u32 index) 79 { 80 if (amdgpu_device_skip_hw_access(adev)) 81 return 0; 82 83 if (index < adev->doorbell.num_kernel_doorbells) 84 return atomic64_read((atomic64_t *)(adev->doorbell.ptr + index)); 85 86 DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n", index); 87 return 0; 88 } 89 90 /** 91 * amdgpu_mm_wdoorbell64 - write a doorbell Qword 92 * 93 * @adev: amdgpu_device pointer 94 * @index: doorbell index 95 * @v: value to write 96 * 97 * Writes @v to the doorbell aperture at the 98 * requested doorbell index (VEGA10+). 99 */ 100 void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev, u32 index, u64 v) 101 { 102 if (amdgpu_device_skip_hw_access(adev)) 103 return; 104 105 if (index < adev->doorbell.num_kernel_doorbells) 106 atomic64_set((atomic64_t *)(adev->doorbell.ptr + index), v); 107 else 108 DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n", index); 109 } 110 111 /* 112 * GPU doorbell aperture helpers function. 113 */ 114 /** 115 * amdgpu_doorbell_init - Init doorbell driver information. 116 * 117 * @adev: amdgpu_device pointer 118 * 119 * Init doorbell driver information (CIK) 120 * Returns 0 on success, error on failure. 121 */ 122 int amdgpu_doorbell_init(struct amdgpu_device *adev) 123 { 124 125 /* No doorbell on SI hardware generation */ 126 if (adev->asic_type < CHIP_BONAIRE) { 127 adev->doorbell.base = 0; 128 adev->doorbell.size = 0; 129 adev->doorbell.num_kernel_doorbells = 0; 130 adev->doorbell.ptr = NULL; 131 return 0; 132 } 133 134 if (pci_resource_flags(adev->pdev, 2) & IORESOURCE_UNSET) 135 return -EINVAL; 136 137 amdgpu_asic_init_doorbell_index(adev); 138 139 /* doorbell bar mapping */ 140 adev->doorbell.base = pci_resource_start(adev->pdev, 2); 141 adev->doorbell.size = pci_resource_len(adev->pdev, 2); 142 143 if (adev->enable_mes) { 144 adev->doorbell.num_kernel_doorbells = 145 adev->doorbell.size / sizeof(u32); 146 } else { 147 adev->doorbell.num_kernel_doorbells = 148 min_t(u32, adev->doorbell.size / sizeof(u32), 149 adev->doorbell_index.max_assignment+1); 150 if (adev->doorbell.num_kernel_doorbells == 0) 151 return -EINVAL; 152 153 /* For Vega, reserve and map two pages on doorbell BAR since SDMA 154 * paging queue doorbell use the second page. The 155 * AMDGPU_DOORBELL64_MAX_ASSIGNMENT definition assumes all the 156 * doorbells are in the first page. So with paging queue enabled, 157 * the max num_kernel_doorbells should + 1 page (0x400 in dword) 158 */ 159 if (adev->asic_type >= CHIP_VEGA10) 160 adev->doorbell.num_kernel_doorbells += 0x400; 161 } 162 163 adev->doorbell.ptr = ioremap(adev->doorbell.base, 164 adev->doorbell.num_kernel_doorbells * 165 sizeof(u32)); 166 if (adev->doorbell.ptr == NULL) 167 return -ENOMEM; 168 169 return 0; 170 } 171 172 /** 173 * amdgpu_doorbell_fini - Tear down doorbell driver information. 174 * 175 * @adev: amdgpu_device pointer 176 * 177 * Tear down doorbell driver information (CIK) 178 */ 179 void amdgpu_doorbell_fini(struct amdgpu_device *adev) 180 { 181 iounmap(adev->doorbell.ptr); 182 adev->doorbell.ptr = NULL; 183 } 184