1bdf84a80SJoseph Greathouse /* 2bdf84a80SJoseph Greathouse * Copyright 2020 Advanced Micro Devices, Inc. 3bdf84a80SJoseph Greathouse * 4bdf84a80SJoseph Greathouse * Permission is hereby granted, free of charge, to any person obtaining a 5bdf84a80SJoseph Greathouse * copy of this software and associated documentation files (the "Software"), 6bdf84a80SJoseph Greathouse * to deal in the Software without restriction, including without limitation 7bdf84a80SJoseph Greathouse * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8bdf84a80SJoseph Greathouse * and/or sell copies of the Software, and to permit persons to whom the 9bdf84a80SJoseph Greathouse * Software is furnished to do so, subject to the following conditions: 10bdf84a80SJoseph Greathouse * 11bdf84a80SJoseph Greathouse * The above copyright notice and this permission notice shall be included in 12bdf84a80SJoseph Greathouse * all copies or substantial portions of the Software. 13bdf84a80SJoseph Greathouse * 14bdf84a80SJoseph Greathouse * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15bdf84a80SJoseph Greathouse * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16bdf84a80SJoseph Greathouse * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17bdf84a80SJoseph Greathouse * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18bdf84a80SJoseph Greathouse * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19bdf84a80SJoseph Greathouse * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20bdf84a80SJoseph Greathouse * OTHER DEALINGS IN THE SOFTWARE. 21bdf84a80SJoseph Greathouse * 22bdf84a80SJoseph Greathouse */ 23bdf84a80SJoseph Greathouse 24bdf84a80SJoseph Greathouse #ifndef __AMDGPU_DF_H__ 25bdf84a80SJoseph Greathouse #define __AMDGPU_DF_H__ 26bdf84a80SJoseph Greathouse 27bdf84a80SJoseph Greathouse struct amdgpu_df_hash_status { 28bdf84a80SJoseph Greathouse bool hash_64k; 29bdf84a80SJoseph Greathouse bool hash_2m; 30bdf84a80SJoseph Greathouse bool hash_1g; 31bdf84a80SJoseph Greathouse }; 32bdf84a80SJoseph Greathouse 33bdf84a80SJoseph Greathouse struct amdgpu_df_funcs { 34bdf84a80SJoseph Greathouse void (*sw_init)(struct amdgpu_device *adev); 35bdf84a80SJoseph Greathouse void (*sw_fini)(struct amdgpu_device *adev); 36bdf84a80SJoseph Greathouse void (*enable_broadcast_mode)(struct amdgpu_device *adev, 37bdf84a80SJoseph Greathouse bool enable); 38bdf84a80SJoseph Greathouse u32 (*get_fb_channel_number)(struct amdgpu_device *adev); 39bdf84a80SJoseph Greathouse u32 (*get_hbm_channel_number)(struct amdgpu_device *adev); 40bdf84a80SJoseph Greathouse void (*update_medium_grain_clock_gating)(struct amdgpu_device *adev, 41bdf84a80SJoseph Greathouse bool enable); 42bdf84a80SJoseph Greathouse void (*get_clockgating_state)(struct amdgpu_device *adev, 43bdf84a80SJoseph Greathouse u32 *flags); 44bdf84a80SJoseph Greathouse void (*enable_ecc_force_par_wr_rmw)(struct amdgpu_device *adev, 45bdf84a80SJoseph Greathouse bool enable); 46bdf84a80SJoseph Greathouse int (*pmc_start)(struct amdgpu_device *adev, uint64_t config, 47576e0ec2SJonathan Kim int counter_idx, int is_add); 48bdf84a80SJoseph Greathouse int (*pmc_stop)(struct amdgpu_device *adev, uint64_t config, 49576e0ec2SJonathan Kim int counter_idx, int is_remove); 50bdf84a80SJoseph Greathouse void (*pmc_get_count)(struct amdgpu_device *adev, uint64_t config, 51576e0ec2SJonathan Kim int counter_idx, uint64_t *count); 52bdf84a80SJoseph Greathouse uint64_t (*get_fica)(struct amdgpu_device *adev, uint32_t ficaa_val); 53bdf84a80SJoseph Greathouse void (*set_fica)(struct amdgpu_device *adev, uint32_t ficaa_val, 54bdf84a80SJoseph Greathouse uint32_t ficadl_val, uint32_t ficadh_val); 55*ca5c636dSTao Zhou bool (*query_ras_poison_mode)(struct amdgpu_device *adev); 56bdf84a80SJoseph Greathouse }; 57bdf84a80SJoseph Greathouse 58bdf84a80SJoseph Greathouse struct amdgpu_df { 59bdf84a80SJoseph Greathouse struct amdgpu_df_hash_status hash_status; 60bdf84a80SJoseph Greathouse const struct amdgpu_df_funcs *funcs; 61bdf84a80SJoseph Greathouse }; 62bdf84a80SJoseph Greathouse 63bdf84a80SJoseph Greathouse #endif /* __AMDGPU_DF_H__ */ 64