1 /*
2  * Copyright 2018 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23 #ifndef __AMDGPU_BO_LIST_H__
24 #define __AMDGPU_BO_LIST_H__
25 
26 #include <drm/ttm/ttm_execbuf_util.h>
27 #include <drm/amdgpu_drm.h>
28 
29 struct amdgpu_device;
30 struct amdgpu_bo;
31 struct amdgpu_bo_va;
32 struct amdgpu_fpriv;
33 
34 struct amdgpu_bo_list_entry {
35 	struct ttm_validate_buffer	tv;
36 	struct amdgpu_bo_va		*bo_va;
37 	uint32_t			priority;
38 	struct page			**user_pages;
39 	bool				user_invalidated;
40 };
41 
42 struct amdgpu_bo_list {
43 	struct rcu_head rhead;
44 	struct kref refcount;
45 	struct amdgpu_bo *gds_obj;
46 	struct amdgpu_bo *gws_obj;
47 	struct amdgpu_bo *oa_obj;
48 	unsigned first_userptr;
49 	unsigned num_entries;
50 
51 	/* Protect access during command submission.
52 	 */
53 	struct mutex bo_list_mutex;
54 };
55 
56 int amdgpu_bo_list_get(struct amdgpu_fpriv *fpriv, int id,
57 		       struct amdgpu_bo_list **result);
58 void amdgpu_bo_list_get_list(struct amdgpu_bo_list *list,
59 			     struct list_head *validated);
60 void amdgpu_bo_list_put(struct amdgpu_bo_list *list);
61 int amdgpu_bo_create_list_entry_array(struct drm_amdgpu_bo_list_in *in,
62 				      struct drm_amdgpu_bo_list_entry **info_param);
63 
64 int amdgpu_bo_list_create(struct amdgpu_device *adev,
65 				 struct drm_file *filp,
66 				 struct drm_amdgpu_bo_list_entry *info,
67 				 size_t num_entries,
68 				 struct amdgpu_bo_list **list);
69 
70 static inline struct amdgpu_bo_list_entry *
71 amdgpu_bo_list_array_entry(struct amdgpu_bo_list *list, unsigned index)
72 {
73 	struct amdgpu_bo_list_entry *array = (void *)&list[1];
74 
75 	return &array[index];
76 }
77 
78 #define amdgpu_bo_list_for_each_entry(e, list) \
79 	for (e = amdgpu_bo_list_array_entry(list, 0); \
80 	     e != amdgpu_bo_list_array_entry(list, (list)->num_entries); \
81 	     ++e)
82 
83 #define amdgpu_bo_list_for_each_userptr_entry(e, list) \
84 	for (e = amdgpu_bo_list_array_entry(list, (list)->first_userptr); \
85 	     e != amdgpu_bo_list_array_entry(list, (list)->num_entries); \
86 	     ++e)
87 
88 #endif
89