1d13f050fSJonathan Kim /*
2d13f050fSJonathan Kim  * Copyright 2023 Advanced Micro Devices, Inc.
3d13f050fSJonathan Kim  *
4d13f050fSJonathan Kim  * Permission is hereby granted, free of charge, to any person obtaining a
5d13f050fSJonathan Kim  * copy of this software and associated documentation files (the "Software"),
6d13f050fSJonathan Kim  * to deal in the Software without restriction, including without limitation
7d13f050fSJonathan Kim  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8d13f050fSJonathan Kim  * and/or sell copies of the Software, and to permit persons to whom the
9d13f050fSJonathan Kim  * Software is furnished to do so, subject to the following conditions:
10d13f050fSJonathan Kim  *
11d13f050fSJonathan Kim  * The above copyright notice and this permission notice shall be included in
12d13f050fSJonathan Kim  * all copies or substantial portions of the Software.
13d13f050fSJonathan Kim  *
14d13f050fSJonathan Kim  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15d13f050fSJonathan Kim  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16d13f050fSJonathan Kim  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17d13f050fSJonathan Kim  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18d13f050fSJonathan Kim  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19d13f050fSJonathan Kim  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20d13f050fSJonathan Kim  * OTHER DEALINGS IN THE SOFTWARE.
21d13f050fSJonathan Kim  */
22d13f050fSJonathan Kim 
23d13f050fSJonathan Kim uint32_t kgd_gfx_v10_enable_debug_trap(struct amdgpu_device *adev,
24d13f050fSJonathan Kim 				      bool restore_dbg_registers,
25d13f050fSJonathan Kim 				      uint32_t vmid);
26d13f050fSJonathan Kim uint32_t kgd_gfx_v10_disable_debug_trap(struct amdgpu_device *adev,
27d13f050fSJonathan Kim 					bool keep_trap_enabled,
28d13f050fSJonathan Kim 					uint32_t vmid);
29101827e1SJonathan Kim int kgd_gfx_v10_validate_trap_override_request(struct amdgpu_device *adev,
30101827e1SJonathan Kim 					     uint32_t trap_override,
31101827e1SJonathan Kim 					     uint32_t *trap_mask_supported);
32101827e1SJonathan Kim uint32_t kgd_gfx_v10_set_wave_launch_trap_override(struct amdgpu_device *adev,
33101827e1SJonathan Kim 					     uint32_t vmid,
34101827e1SJonathan Kim 					     uint32_t trap_override,
35101827e1SJonathan Kim 					     uint32_t trap_mask_bits,
36101827e1SJonathan Kim 					     uint32_t trap_mask_request,
37101827e1SJonathan Kim 					     uint32_t *trap_mask_prev,
38101827e1SJonathan Kim 					     uint32_t kfd_dbg_trap_cntl_prev);
39aea1b473SJonathan Kim uint32_t kgd_gfx_v10_set_wave_launch_mode(struct amdgpu_device *adev,
40aea1b473SJonathan Kim 					 uint8_t wave_launch_mode,
41aea1b473SJonathan Kim 					 uint32_t vmid);
42e0f85f46SJonathan Kim uint32_t kgd_gfx_v10_set_address_watch(struct amdgpu_device *adev,
43e0f85f46SJonathan Kim 					uint64_t watch_address,
44e0f85f46SJonathan Kim 					uint32_t watch_address_mask,
45e0f85f46SJonathan Kim 					uint32_t watch_id,
46e0f85f46SJonathan Kim 					uint32_t watch_mode,
47036e348fSEric Huang 					uint32_t debug_vmid,
48036e348fSEric Huang 					uint32_t inst);
49e0f85f46SJonathan Kim uint32_t kgd_gfx_v10_clear_address_watch(struct amdgpu_device *adev,
50e0f85f46SJonathan Kim 					uint32_t watch_id);
51036e348fSEric Huang void kgd_gfx_v10_get_iq_wait_times(struct amdgpu_device *adev,
52036e348fSEric Huang 				uint32_t *wait_times,
53036e348fSEric Huang 				uint32_t inst);
547cee6a68SJonathan Kim void kgd_gfx_v10_build_grace_period_packet_info(struct amdgpu_device *adev,
557cee6a68SJonathan Kim 					       uint32_t wait_times,
567cee6a68SJonathan Kim 					       uint32_t grace_period,
577cee6a68SJonathan Kim 					       uint32_t *reg_offset,
58*81faf9e0SMukul Joshi 					       uint32_t *reg_data);
59