1 /*
2  * Copyright 2014 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 
23 /* amdgpu_amdkfd.h defines the private interface between amdgpu and amdkfd. */
24 
25 #ifndef AMDGPU_AMDKFD_H_INCLUDED
26 #define AMDGPU_AMDKFD_H_INCLUDED
27 
28 #include <linux/types.h>
29 #include <linux/mm.h>
30 #include <linux/workqueue.h>
31 #include <kgd_kfd_interface.h>
32 #include <drm/ttm/ttm_execbuf_util.h>
33 #include "amdgpu_sync.h"
34 #include "amdgpu_vm.h"
35 
36 extern uint64_t amdgpu_amdkfd_total_mem_size;
37 
38 struct amdgpu_device;
39 
40 struct kfd_bo_va_list {
41 	struct list_head bo_list;
42 	struct amdgpu_bo_va *bo_va;
43 	void *kgd_dev;
44 	bool is_mapped;
45 	uint64_t va;
46 	uint64_t pte_flags;
47 };
48 
49 struct kgd_mem {
50 	struct mutex lock;
51 	struct amdgpu_bo *bo;
52 	struct list_head bo_va_list;
53 	/* protected by amdkfd_process_info.lock */
54 	struct ttm_validate_buffer validate_list;
55 	struct ttm_validate_buffer resv_list;
56 	uint32_t domain;
57 	unsigned int mapped_to_gpu_memory;
58 	uint64_t va;
59 
60 	uint32_t alloc_flags;
61 
62 	atomic_t invalid;
63 	struct amdkfd_process_info *process_info;
64 
65 	struct amdgpu_sync sync;
66 
67 	bool aql_queue;
68 };
69 
70 /* KFD Memory Eviction */
71 struct amdgpu_amdkfd_fence {
72 	struct dma_fence base;
73 	struct mm_struct *mm;
74 	spinlock_t lock;
75 	char timeline_name[TASK_COMM_LEN];
76 };
77 
78 struct amdgpu_kfd_dev {
79 	struct kfd_dev *dev;
80 	uint64_t vram_used;
81 };
82 
83 enum kgd_engine_type {
84 	KGD_ENGINE_PFP = 1,
85 	KGD_ENGINE_ME,
86 	KGD_ENGINE_CE,
87 	KGD_ENGINE_MEC1,
88 	KGD_ENGINE_MEC2,
89 	KGD_ENGINE_RLC,
90 	KGD_ENGINE_SDMA1,
91 	KGD_ENGINE_SDMA2,
92 	KGD_ENGINE_MAX
93 };
94 
95 struct amdgpu_amdkfd_fence *amdgpu_amdkfd_fence_create(u64 context,
96 						       struct mm_struct *mm);
97 bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm);
98 struct amdgpu_amdkfd_fence *to_amdgpu_amdkfd_fence(struct dma_fence *f);
99 int amdgpu_amdkfd_remove_fence_on_pt_pd_bos(struct amdgpu_bo *bo);
100 
101 struct amdkfd_process_info {
102 	/* List head of all VMs that belong to a KFD process */
103 	struct list_head vm_list_head;
104 	/* List head for all KFD BOs that belong to a KFD process. */
105 	struct list_head kfd_bo_list;
106 	/* List of userptr BOs that are valid or invalid */
107 	struct list_head userptr_valid_list;
108 	struct list_head userptr_inval_list;
109 	/* Lock to protect kfd_bo_list */
110 	struct mutex lock;
111 
112 	/* Number of VMs */
113 	unsigned int n_vms;
114 	/* Eviction Fence */
115 	struct amdgpu_amdkfd_fence *eviction_fence;
116 
117 	/* MMU-notifier related fields */
118 	atomic_t evicted_bos;
119 	struct delayed_work restore_userptr_work;
120 	struct pid *pid;
121 };
122 
123 int amdgpu_amdkfd_init(void);
124 void amdgpu_amdkfd_fini(void);
125 
126 void amdgpu_amdkfd_suspend(struct amdgpu_device *adev, bool run_pm);
127 int amdgpu_amdkfd_resume(struct amdgpu_device *adev, bool run_pm);
128 void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev,
129 			const void *ih_ring_entry);
130 void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev);
131 void amdgpu_amdkfd_device_init(struct amdgpu_device *adev);
132 void amdgpu_amdkfd_device_fini(struct amdgpu_device *adev);
133 
134 int amdgpu_amdkfd_evict_userptr(struct kgd_mem *mem, struct mm_struct *mm);
135 int amdgpu_amdkfd_submit_ib(struct kgd_dev *kgd, enum kgd_engine_type engine,
136 				uint32_t vmid, uint64_t gpu_addr,
137 				uint32_t *ib_cmd, uint32_t ib_len);
138 void amdgpu_amdkfd_set_compute_idle(struct kgd_dev *kgd, bool idle);
139 bool amdgpu_amdkfd_have_atomics_support(struct kgd_dev *kgd);
140 int amdgpu_amdkfd_flush_gpu_tlb_vmid(struct kgd_dev *kgd, uint16_t vmid);
141 int amdgpu_amdkfd_flush_gpu_tlb_pasid(struct kgd_dev *kgd, uint16_t pasid);
142 
143 bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid);
144 
145 int amdgpu_amdkfd_pre_reset(struct amdgpu_device *adev);
146 
147 int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev);
148 
149 void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd);
150 
151 /* Shared API */
152 int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
153 				void **mem_obj, uint64_t *gpu_addr,
154 				void **cpu_ptr, bool mqd_gfx9);
155 void amdgpu_amdkfd_free_gtt_mem(struct kgd_dev *kgd, void *mem_obj);
156 int amdgpu_amdkfd_alloc_gws(struct kgd_dev *kgd, size_t size, void **mem_obj);
157 void amdgpu_amdkfd_free_gws(struct kgd_dev *kgd, void *mem_obj);
158 int amdgpu_amdkfd_add_gws_to_process(void *info, void *gws, struct kgd_mem **mem);
159 int amdgpu_amdkfd_remove_gws_from_process(void *info, void *mem);
160 uint32_t amdgpu_amdkfd_get_fw_version(struct kgd_dev *kgd,
161 				      enum kgd_engine_type type);
162 void amdgpu_amdkfd_get_local_mem_info(struct kgd_dev *kgd,
163 				      struct kfd_local_mem_info *mem_info);
164 uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct kgd_dev *kgd);
165 
166 uint32_t amdgpu_amdkfd_get_max_engine_clock_in_mhz(struct kgd_dev *kgd);
167 void amdgpu_amdkfd_get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info *cu_info);
168 int amdgpu_amdkfd_get_dmabuf_info(struct kgd_dev *kgd, int dma_buf_fd,
169 				  struct kgd_dev **dmabuf_kgd,
170 				  uint64_t *bo_size, void *metadata_buffer,
171 				  size_t buffer_size, uint32_t *metadata_size,
172 				  uint32_t *flags);
173 uint64_t amdgpu_amdkfd_get_vram_usage(struct kgd_dev *kgd);
174 uint64_t amdgpu_amdkfd_get_hive_id(struct kgd_dev *kgd);
175 uint64_t amdgpu_amdkfd_get_unique_id(struct kgd_dev *kgd);
176 uint64_t amdgpu_amdkfd_get_mmio_remap_phys_addr(struct kgd_dev *kgd);
177 uint32_t amdgpu_amdkfd_get_num_gws(struct kgd_dev *kgd);
178 uint8_t amdgpu_amdkfd_get_xgmi_hops_count(struct kgd_dev *dst, struct kgd_dev *src);
179 
180 /* Read user wptr from a specified user address space with page fault
181  * disabled. The memory must be pinned and mapped to the hardware when
182  * this is called in hqd_load functions, so it should never fault in
183  * the first place. This resolves a circular lock dependency involving
184  * four locks, including the DQM lock and mmap_sem.
185  */
186 #define read_user_wptr(mmptr, wptr, dst)				\
187 	({								\
188 		bool valid = false;					\
189 		if ((mmptr) && (wptr)) {				\
190 			pagefault_disable();				\
191 			if ((mmptr) == current->mm) {			\
192 				valid = !get_user((dst), (wptr));	\
193 			} else if (current->mm == NULL) {		\
194 				use_mm(mmptr);				\
195 				valid = !get_user((dst), (wptr));	\
196 				unuse_mm(mmptr);			\
197 			}						\
198 			pagefault_enable();				\
199 		}							\
200 		valid;							\
201 	})
202 
203 /* GPUVM API */
204 int amdgpu_amdkfd_gpuvm_create_process_vm(struct kgd_dev *kgd, unsigned int pasid,
205 					void **vm, void **process_info,
206 					struct dma_fence **ef);
207 int amdgpu_amdkfd_gpuvm_acquire_process_vm(struct kgd_dev *kgd,
208 					struct file *filp, unsigned int pasid,
209 					void **vm, void **process_info,
210 					struct dma_fence **ef);
211 void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev,
212 				struct amdgpu_vm *vm);
213 void amdgpu_amdkfd_gpuvm_destroy_process_vm(struct kgd_dev *kgd, void *vm);
214 void amdgpu_amdkfd_gpuvm_release_process_vm(struct kgd_dev *kgd, void *vm);
215 uint64_t amdgpu_amdkfd_gpuvm_get_process_page_dir(void *vm);
216 int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
217 		struct kgd_dev *kgd, uint64_t va, uint64_t size,
218 		void *vm, struct kgd_mem **mem,
219 		uint64_t *offset, uint32_t flags);
220 int amdgpu_amdkfd_gpuvm_free_memory_of_gpu(
221 		struct kgd_dev *kgd, struct kgd_mem *mem);
222 int amdgpu_amdkfd_gpuvm_map_memory_to_gpu(
223 		struct kgd_dev *kgd, struct kgd_mem *mem, void *vm);
224 int amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu(
225 		struct kgd_dev *kgd, struct kgd_mem *mem, void *vm);
226 int amdgpu_amdkfd_gpuvm_sync_memory(
227 		struct kgd_dev *kgd, struct kgd_mem *mem, bool intr);
228 int amdgpu_amdkfd_gpuvm_map_gtt_bo_to_kernel(struct kgd_dev *kgd,
229 		struct kgd_mem *mem, void **kptr, uint64_t *size);
230 int amdgpu_amdkfd_gpuvm_restore_process_bos(void *process_info,
231 					    struct dma_fence **ef);
232 
233 int amdgpu_amdkfd_gpuvm_get_vm_fault_info(struct kgd_dev *kgd,
234 					      struct kfd_vm_fault_info *info);
235 
236 int amdgpu_amdkfd_gpuvm_import_dmabuf(struct kgd_dev *kgd,
237 				      struct dma_buf *dmabuf,
238 				      uint64_t va, void *vm,
239 				      struct kgd_mem **mem, uint64_t *size,
240 				      uint64_t *mmap_offset);
241 
242 void amdgpu_amdkfd_gpuvm_init_mem_limits(void);
243 void amdgpu_amdkfd_unreserve_memory_limit(struct amdgpu_bo *bo);
244 
245 int amdgpu_amdkfd_get_tile_config(struct kgd_dev *kgd,
246 				struct tile_config *config);
247 
248 /* KGD2KFD callbacks */
249 int kgd2kfd_init(void);
250 void kgd2kfd_exit(void);
251 struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd, struct pci_dev *pdev,
252 			      unsigned int asic_type, bool vf);
253 bool kgd2kfd_device_init(struct kfd_dev *kfd,
254 			 struct drm_device *ddev,
255 			 const struct kgd2kfd_shared_resources *gpu_resources);
256 void kgd2kfd_device_exit(struct kfd_dev *kfd);
257 void kgd2kfd_suspend(struct kfd_dev *kfd, bool run_pm);
258 int kgd2kfd_resume(struct kfd_dev *kfd, bool run_pm);
259 int kgd2kfd_pre_reset(struct kfd_dev *kfd);
260 int kgd2kfd_post_reset(struct kfd_dev *kfd);
261 void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry);
262 int kgd2kfd_quiesce_mm(struct mm_struct *mm);
263 int kgd2kfd_resume_mm(struct mm_struct *mm);
264 int kgd2kfd_schedule_evict_and_restore_process(struct mm_struct *mm,
265 					       struct dma_fence *fence);
266 void kgd2kfd_set_sram_ecc_flag(struct kfd_dev *kfd);
267 
268 #endif /* AMDGPU_AMDKFD_H_INCLUDED */
269