1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 23 /* amdgpu_amdkfd.h defines the private interface between amdgpu and amdkfd. */ 24 25 #ifndef AMDGPU_AMDKFD_H_INCLUDED 26 #define AMDGPU_AMDKFD_H_INCLUDED 27 28 #include <linux/types.h> 29 #include <linux/mm.h> 30 #include <linux/workqueue.h> 31 #include <kgd_kfd_interface.h> 32 #include <drm/ttm/ttm_execbuf_util.h> 33 #include "amdgpu_sync.h" 34 #include "amdgpu_vm.h" 35 36 extern uint64_t amdgpu_amdkfd_total_mem_size; 37 38 struct amdgpu_device; 39 40 struct kfd_bo_va_list { 41 struct list_head bo_list; 42 struct amdgpu_bo_va *bo_va; 43 void *kgd_dev; 44 bool is_mapped; 45 uint64_t va; 46 uint64_t pte_flags; 47 }; 48 49 struct kgd_mem { 50 struct mutex lock; 51 struct amdgpu_bo *bo; 52 struct list_head bo_va_list; 53 /* protected by amdkfd_process_info.lock */ 54 struct ttm_validate_buffer validate_list; 55 struct ttm_validate_buffer resv_list; 56 uint32_t domain; 57 unsigned int mapped_to_gpu_memory; 58 uint64_t va; 59 60 uint32_t alloc_flags; 61 62 atomic_t invalid; 63 struct amdkfd_process_info *process_info; 64 65 struct amdgpu_sync sync; 66 67 bool aql_queue; 68 bool is_imported; 69 }; 70 71 /* KFD Memory Eviction */ 72 struct amdgpu_amdkfd_fence { 73 struct dma_fence base; 74 struct mm_struct *mm; 75 spinlock_t lock; 76 char timeline_name[TASK_COMM_LEN]; 77 }; 78 79 struct amdgpu_kfd_dev { 80 struct kfd_dev *dev; 81 uint64_t vram_used; 82 }; 83 84 enum kgd_engine_type { 85 KGD_ENGINE_PFP = 1, 86 KGD_ENGINE_ME, 87 KGD_ENGINE_CE, 88 KGD_ENGINE_MEC1, 89 KGD_ENGINE_MEC2, 90 KGD_ENGINE_RLC, 91 KGD_ENGINE_SDMA1, 92 KGD_ENGINE_SDMA2, 93 KGD_ENGINE_MAX 94 }; 95 96 struct amdgpu_amdkfd_fence *amdgpu_amdkfd_fence_create(u64 context, 97 struct mm_struct *mm); 98 bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm); 99 struct amdgpu_amdkfd_fence *to_amdgpu_amdkfd_fence(struct dma_fence *f); 100 int amdgpu_amdkfd_remove_fence_on_pt_pd_bos(struct amdgpu_bo *bo); 101 102 struct amdkfd_process_info { 103 /* List head of all VMs that belong to a KFD process */ 104 struct list_head vm_list_head; 105 /* List head for all KFD BOs that belong to a KFD process. */ 106 struct list_head kfd_bo_list; 107 /* List of userptr BOs that are valid or invalid */ 108 struct list_head userptr_valid_list; 109 struct list_head userptr_inval_list; 110 /* Lock to protect kfd_bo_list */ 111 struct mutex lock; 112 113 /* Number of VMs */ 114 unsigned int n_vms; 115 /* Eviction Fence */ 116 struct amdgpu_amdkfd_fence *eviction_fence; 117 118 /* MMU-notifier related fields */ 119 atomic_t evicted_bos; 120 struct delayed_work restore_userptr_work; 121 struct pid *pid; 122 }; 123 124 int amdgpu_amdkfd_init(void); 125 void amdgpu_amdkfd_fini(void); 126 127 void amdgpu_amdkfd_suspend(struct amdgpu_device *adev, bool run_pm); 128 int amdgpu_amdkfd_resume(struct amdgpu_device *adev, bool run_pm); 129 void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev, 130 const void *ih_ring_entry); 131 void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev); 132 void amdgpu_amdkfd_device_init(struct amdgpu_device *adev); 133 void amdgpu_amdkfd_device_fini(struct amdgpu_device *adev); 134 135 int amdgpu_amdkfd_evict_userptr(struct kgd_mem *mem, struct mm_struct *mm); 136 int amdgpu_amdkfd_submit_ib(struct kgd_dev *kgd, enum kgd_engine_type engine, 137 uint32_t vmid, uint64_t gpu_addr, 138 uint32_t *ib_cmd, uint32_t ib_len); 139 void amdgpu_amdkfd_set_compute_idle(struct kgd_dev *kgd, bool idle); 140 bool amdgpu_amdkfd_have_atomics_support(struct kgd_dev *kgd); 141 int amdgpu_amdkfd_flush_gpu_tlb_vmid(struct kgd_dev *kgd, uint16_t vmid); 142 int amdgpu_amdkfd_flush_gpu_tlb_pasid(struct kgd_dev *kgd, uint16_t pasid); 143 144 bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid); 145 146 int amdgpu_amdkfd_pre_reset(struct amdgpu_device *adev); 147 148 int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev); 149 150 void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd); 151 152 int amdgpu_queue_mask_bit_to_set_resource_bit(struct amdgpu_device *adev, 153 int queue_bit); 154 155 /* Shared API */ 156 int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size, 157 void **mem_obj, uint64_t *gpu_addr, 158 void **cpu_ptr, bool mqd_gfx9); 159 void amdgpu_amdkfd_free_gtt_mem(struct kgd_dev *kgd, void *mem_obj); 160 int amdgpu_amdkfd_alloc_gws(struct kgd_dev *kgd, size_t size, void **mem_obj); 161 void amdgpu_amdkfd_free_gws(struct kgd_dev *kgd, void *mem_obj); 162 int amdgpu_amdkfd_add_gws_to_process(void *info, void *gws, struct kgd_mem **mem); 163 int amdgpu_amdkfd_remove_gws_from_process(void *info, void *mem); 164 uint32_t amdgpu_amdkfd_get_fw_version(struct kgd_dev *kgd, 165 enum kgd_engine_type type); 166 void amdgpu_amdkfd_get_local_mem_info(struct kgd_dev *kgd, 167 struct kfd_local_mem_info *mem_info); 168 uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct kgd_dev *kgd); 169 170 uint32_t amdgpu_amdkfd_get_max_engine_clock_in_mhz(struct kgd_dev *kgd); 171 void amdgpu_amdkfd_get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info *cu_info); 172 int amdgpu_amdkfd_get_dmabuf_info(struct kgd_dev *kgd, int dma_buf_fd, 173 struct kgd_dev **dmabuf_kgd, 174 uint64_t *bo_size, void *metadata_buffer, 175 size_t buffer_size, uint32_t *metadata_size, 176 uint32_t *flags); 177 uint64_t amdgpu_amdkfd_get_vram_usage(struct kgd_dev *kgd); 178 uint64_t amdgpu_amdkfd_get_hive_id(struct kgd_dev *kgd); 179 uint64_t amdgpu_amdkfd_get_unique_id(struct kgd_dev *kgd); 180 uint64_t amdgpu_amdkfd_get_mmio_remap_phys_addr(struct kgd_dev *kgd); 181 uint32_t amdgpu_amdkfd_get_num_gws(struct kgd_dev *kgd); 182 uint32_t amdgpu_amdkfd_get_asic_rev_id(struct kgd_dev *kgd); 183 uint8_t amdgpu_amdkfd_get_xgmi_hops_count(struct kgd_dev *dst, struct kgd_dev *src); 184 185 /* Read user wptr from a specified user address space with page fault 186 * disabled. The memory must be pinned and mapped to the hardware when 187 * this is called in hqd_load functions, so it should never fault in 188 * the first place. This resolves a circular lock dependency involving 189 * four locks, including the DQM lock and mmap_lock. 190 */ 191 #define read_user_wptr(mmptr, wptr, dst) \ 192 ({ \ 193 bool valid = false; \ 194 if ((mmptr) && (wptr)) { \ 195 pagefault_disable(); \ 196 if ((mmptr) == current->mm) { \ 197 valid = !get_user((dst), (wptr)); \ 198 } else if (current->mm == NULL) { \ 199 use_mm(mmptr); \ 200 valid = !get_user((dst), (wptr)); \ 201 unuse_mm(mmptr); \ 202 } \ 203 pagefault_enable(); \ 204 } \ 205 valid; \ 206 }) 207 208 /* GPUVM API */ 209 int amdgpu_amdkfd_gpuvm_create_process_vm(struct kgd_dev *kgd, unsigned int pasid, 210 void **vm, void **process_info, 211 struct dma_fence **ef); 212 int amdgpu_amdkfd_gpuvm_acquire_process_vm(struct kgd_dev *kgd, 213 struct file *filp, unsigned int pasid, 214 void **vm, void **process_info, 215 struct dma_fence **ef); 216 void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev, 217 struct amdgpu_vm *vm); 218 void amdgpu_amdkfd_gpuvm_destroy_process_vm(struct kgd_dev *kgd, void *vm); 219 void amdgpu_amdkfd_gpuvm_release_process_vm(struct kgd_dev *kgd, void *vm); 220 uint64_t amdgpu_amdkfd_gpuvm_get_process_page_dir(void *vm); 221 int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu( 222 struct kgd_dev *kgd, uint64_t va, uint64_t size, 223 void *vm, struct kgd_mem **mem, 224 uint64_t *offset, uint32_t flags); 225 int amdgpu_amdkfd_gpuvm_free_memory_of_gpu( 226 struct kgd_dev *kgd, struct kgd_mem *mem, uint64_t *size); 227 int amdgpu_amdkfd_gpuvm_map_memory_to_gpu( 228 struct kgd_dev *kgd, struct kgd_mem *mem, void *vm); 229 int amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu( 230 struct kgd_dev *kgd, struct kgd_mem *mem, void *vm); 231 int amdgpu_amdkfd_gpuvm_sync_memory( 232 struct kgd_dev *kgd, struct kgd_mem *mem, bool intr); 233 int amdgpu_amdkfd_gpuvm_map_gtt_bo_to_kernel(struct kgd_dev *kgd, 234 struct kgd_mem *mem, void **kptr, uint64_t *size); 235 int amdgpu_amdkfd_gpuvm_restore_process_bos(void *process_info, 236 struct dma_fence **ef); 237 238 int amdgpu_amdkfd_gpuvm_get_vm_fault_info(struct kgd_dev *kgd, 239 struct kfd_vm_fault_info *info); 240 241 int amdgpu_amdkfd_gpuvm_import_dmabuf(struct kgd_dev *kgd, 242 struct dma_buf *dmabuf, 243 uint64_t va, void *vm, 244 struct kgd_mem **mem, uint64_t *size, 245 uint64_t *mmap_offset); 246 247 void amdgpu_amdkfd_gpuvm_init_mem_limits(void); 248 void amdgpu_amdkfd_unreserve_memory_limit(struct amdgpu_bo *bo); 249 250 int amdgpu_amdkfd_get_tile_config(struct kgd_dev *kgd, 251 struct tile_config *config); 252 253 /* KGD2KFD callbacks */ 254 int kgd2kfd_init(void); 255 void kgd2kfd_exit(void); 256 struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd, struct pci_dev *pdev, 257 unsigned int asic_type, bool vf); 258 bool kgd2kfd_device_init(struct kfd_dev *kfd, 259 struct drm_device *ddev, 260 const struct kgd2kfd_shared_resources *gpu_resources); 261 void kgd2kfd_device_exit(struct kfd_dev *kfd); 262 void kgd2kfd_suspend(struct kfd_dev *kfd, bool run_pm); 263 int kgd2kfd_resume(struct kfd_dev *kfd, bool run_pm); 264 int kgd2kfd_pre_reset(struct kfd_dev *kfd); 265 int kgd2kfd_post_reset(struct kfd_dev *kfd); 266 void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry); 267 int kgd2kfd_quiesce_mm(struct mm_struct *mm); 268 int kgd2kfd_resume_mm(struct mm_struct *mm); 269 int kgd2kfd_schedule_evict_and_restore_process(struct mm_struct *mm, 270 struct dma_fence *fence); 271 void kgd2kfd_set_sram_ecc_flag(struct kfd_dev *kfd); 272 273 #endif /* AMDGPU_AMDKFD_H_INCLUDED */ 274