1a8fe58ceSMaruthi Bayyavarapu /* 2a8fe58ceSMaruthi Bayyavarapu * Copyright 2015 Advanced Micro Devices, Inc. 3a8fe58ceSMaruthi Bayyavarapu * 4a8fe58ceSMaruthi Bayyavarapu * Permission is hereby granted, free of charge, to any person obtaining a 5a8fe58ceSMaruthi Bayyavarapu * copy of this software and associated documentation files (the "Software"), 6a8fe58ceSMaruthi Bayyavarapu * to deal in the Software without restriction, including without limitation 7a8fe58ceSMaruthi Bayyavarapu * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8a8fe58ceSMaruthi Bayyavarapu * and/or sell copies of the Software, and to permit persons to whom the 9a8fe58ceSMaruthi Bayyavarapu * Software is furnished to do so, subject to the following conditions: 10a8fe58ceSMaruthi Bayyavarapu * 11a8fe58ceSMaruthi Bayyavarapu * The above copyright notice and this permission notice shall be included in 12a8fe58ceSMaruthi Bayyavarapu * all copies or substantial portions of the Software. 13a8fe58ceSMaruthi Bayyavarapu * 14a8fe58ceSMaruthi Bayyavarapu * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15a8fe58ceSMaruthi Bayyavarapu * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16a8fe58ceSMaruthi Bayyavarapu * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17a8fe58ceSMaruthi Bayyavarapu * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18a8fe58ceSMaruthi Bayyavarapu * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19a8fe58ceSMaruthi Bayyavarapu * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20a8fe58ceSMaruthi Bayyavarapu * OTHER DEALINGS IN THE SOFTWARE. 21a8fe58ceSMaruthi Bayyavarapu * 22a8fe58ceSMaruthi Bayyavarapu * Authors: AMD 23a8fe58ceSMaruthi Bayyavarapu * 24a8fe58ceSMaruthi Bayyavarapu */ 25a8fe58ceSMaruthi Bayyavarapu 26a8fe58ceSMaruthi Bayyavarapu #include <linux/irqdomain.h> 2725030321SMaruthi Srinivas Bayyavarapu #include <linux/pm_domain.h> 28a8fe58ceSMaruthi Bayyavarapu #include <linux/platform_device.h> 29a8fe58ceSMaruthi Bayyavarapu #include <sound/designware_i2s.h> 30a8fe58ceSMaruthi Bayyavarapu #include <sound/pcm.h> 31a8fe58ceSMaruthi Bayyavarapu 32a8fe58ceSMaruthi Bayyavarapu #include "amdgpu.h" 33a8fe58ceSMaruthi Bayyavarapu #include "atom.h" 34a8fe58ceSMaruthi Bayyavarapu #include "amdgpu_acp.h" 35a8fe58ceSMaruthi Bayyavarapu 36a8fe58ceSMaruthi Bayyavarapu #include "acp_gfx_if.h" 37a8fe58ceSMaruthi Bayyavarapu 38a8fe58ceSMaruthi Bayyavarapu #define ACP_TILE_ON_MASK 0x03 39a8fe58ceSMaruthi Bayyavarapu #define ACP_TILE_OFF_MASK 0x02 40a8fe58ceSMaruthi Bayyavarapu #define ACP_TILE_ON_RETAIN_REG_MASK 0x1f 41a8fe58ceSMaruthi Bayyavarapu #define ACP_TILE_OFF_RETAIN_REG_MASK 0x20 42a8fe58ceSMaruthi Bayyavarapu 43a8fe58ceSMaruthi Bayyavarapu #define ACP_TILE_P1_MASK 0x3e 44a8fe58ceSMaruthi Bayyavarapu #define ACP_TILE_P2_MASK 0x3d 45a8fe58ceSMaruthi Bayyavarapu #define ACP_TILE_DSP0_MASK 0x3b 46a8fe58ceSMaruthi Bayyavarapu #define ACP_TILE_DSP1_MASK 0x37 47a8fe58ceSMaruthi Bayyavarapu 48a8fe58ceSMaruthi Bayyavarapu #define ACP_TILE_DSP2_MASK 0x2f 49a8fe58ceSMaruthi Bayyavarapu 50a8fe58ceSMaruthi Bayyavarapu #define ACP_DMA_REGS_END 0x146c0 51a8fe58ceSMaruthi Bayyavarapu #define ACP_I2S_PLAY_REGS_START 0x14840 52a8fe58ceSMaruthi Bayyavarapu #define ACP_I2S_PLAY_REGS_END 0x148b4 53a8fe58ceSMaruthi Bayyavarapu #define ACP_I2S_CAP_REGS_START 0x148b8 54a8fe58ceSMaruthi Bayyavarapu #define ACP_I2S_CAP_REGS_END 0x1496c 55a8fe58ceSMaruthi Bayyavarapu 56a8fe58ceSMaruthi Bayyavarapu #define ACP_I2S_COMP1_CAP_REG_OFFSET 0xac 57a8fe58ceSMaruthi Bayyavarapu #define ACP_I2S_COMP2_CAP_REG_OFFSET 0xa8 58a8fe58ceSMaruthi Bayyavarapu #define ACP_I2S_COMP1_PLAY_REG_OFFSET 0x6c 59a8fe58ceSMaruthi Bayyavarapu #define ACP_I2S_COMP2_PLAY_REG_OFFSET 0x68 60a8fe58ceSMaruthi Bayyavarapu 61a8fe58ceSMaruthi Bayyavarapu #define mmACP_PGFSM_RETAIN_REG 0x51c9 62a8fe58ceSMaruthi Bayyavarapu #define mmACP_PGFSM_CONFIG_REG 0x51ca 63a8fe58ceSMaruthi Bayyavarapu #define mmACP_PGFSM_READ_REG_0 0x51cc 64a8fe58ceSMaruthi Bayyavarapu 65a8fe58ceSMaruthi Bayyavarapu #define mmACP_MEM_SHUT_DOWN_REQ_LO 0x51f8 66a8fe58ceSMaruthi Bayyavarapu #define mmACP_MEM_SHUT_DOWN_REQ_HI 0x51f9 67a8fe58ceSMaruthi Bayyavarapu #define mmACP_MEM_SHUT_DOWN_STS_LO 0x51fa 68a8fe58ceSMaruthi Bayyavarapu #define mmACP_MEM_SHUT_DOWN_STS_HI 0x51fb 69a8fe58ceSMaruthi Bayyavarapu 7037c5f2c9SAkshu Agrawal #define mmACP_CONTROL 0x5131 7137c5f2c9SAkshu Agrawal #define mmACP_STATUS 0x5133 7237c5f2c9SAkshu Agrawal #define mmACP_SOFT_RESET 0x5134 7337c5f2c9SAkshu Agrawal #define ACP_CONTROL__ClkEn_MASK 0x1 7437c5f2c9SAkshu Agrawal #define ACP_SOFT_RESET__SoftResetAud_MASK 0x100 7537c5f2c9SAkshu Agrawal #define ACP_SOFT_RESET__SoftResetAudDone_MASK 0x1000000 7637c5f2c9SAkshu Agrawal #define ACP_CLOCK_EN_TIME_OUT_VALUE 0x000000FF 7737c5f2c9SAkshu Agrawal #define ACP_SOFT_RESET_DONE_TIME_OUT_VALUE 0x000000FF 7837c5f2c9SAkshu Agrawal 79a8fe58ceSMaruthi Bayyavarapu #define ACP_TIMEOUT_LOOP 0x000000FF 80a8fe58ceSMaruthi Bayyavarapu #define ACP_DEVS 3 81a8fe58ceSMaruthi Bayyavarapu #define ACP_SRC_ID 162 82a8fe58ceSMaruthi Bayyavarapu 83a8fe58ceSMaruthi Bayyavarapu enum { 84a8fe58ceSMaruthi Bayyavarapu ACP_TILE_P1 = 0, 85a8fe58ceSMaruthi Bayyavarapu ACP_TILE_P2, 86a8fe58ceSMaruthi Bayyavarapu ACP_TILE_DSP0, 87a8fe58ceSMaruthi Bayyavarapu ACP_TILE_DSP1, 88a8fe58ceSMaruthi Bayyavarapu ACP_TILE_DSP2, 89a8fe58ceSMaruthi Bayyavarapu }; 90a8fe58ceSMaruthi Bayyavarapu 91a8fe58ceSMaruthi Bayyavarapu static int acp_sw_init(void *handle) 92a8fe58ceSMaruthi Bayyavarapu { 93a8fe58ceSMaruthi Bayyavarapu struct amdgpu_device *adev = (struct amdgpu_device *)handle; 94a8fe58ceSMaruthi Bayyavarapu 95a8fe58ceSMaruthi Bayyavarapu adev->acp.parent = adev->dev; 96a8fe58ceSMaruthi Bayyavarapu 97a8fe58ceSMaruthi Bayyavarapu adev->acp.cgs_device = 98a8fe58ceSMaruthi Bayyavarapu amdgpu_cgs_create_device(adev); 99a8fe58ceSMaruthi Bayyavarapu if (!adev->acp.cgs_device) 100a8fe58ceSMaruthi Bayyavarapu return -EINVAL; 101a8fe58ceSMaruthi Bayyavarapu 102a8fe58ceSMaruthi Bayyavarapu return 0; 103a8fe58ceSMaruthi Bayyavarapu } 104a8fe58ceSMaruthi Bayyavarapu 105a8fe58ceSMaruthi Bayyavarapu static int acp_sw_fini(void *handle) 106a8fe58ceSMaruthi Bayyavarapu { 107a8fe58ceSMaruthi Bayyavarapu struct amdgpu_device *adev = (struct amdgpu_device *)handle; 108a8fe58ceSMaruthi Bayyavarapu 109a8fe58ceSMaruthi Bayyavarapu if (adev->acp.cgs_device) 110a8fe58ceSMaruthi Bayyavarapu amdgpu_cgs_destroy_device(adev->acp.cgs_device); 111a8fe58ceSMaruthi Bayyavarapu 112a8fe58ceSMaruthi Bayyavarapu return 0; 113a8fe58ceSMaruthi Bayyavarapu } 114a8fe58ceSMaruthi Bayyavarapu 11525030321SMaruthi Srinivas Bayyavarapu /* power off a tile/block within ACP */ 11625030321SMaruthi Srinivas Bayyavarapu static int acp_suspend_tile(void *cgs_dev, int tile) 11725030321SMaruthi Srinivas Bayyavarapu { 11825030321SMaruthi Srinivas Bayyavarapu u32 val = 0; 11925030321SMaruthi Srinivas Bayyavarapu u32 count = 0; 12025030321SMaruthi Srinivas Bayyavarapu 12125030321SMaruthi Srinivas Bayyavarapu if ((tile < ACP_TILE_P1) || (tile > ACP_TILE_DSP2)) { 12225030321SMaruthi Srinivas Bayyavarapu pr_err("Invalid ACP tile : %d to suspend\n", tile); 12325030321SMaruthi Srinivas Bayyavarapu return -1; 12425030321SMaruthi Srinivas Bayyavarapu } 12525030321SMaruthi Srinivas Bayyavarapu 12625030321SMaruthi Srinivas Bayyavarapu val = cgs_read_register(cgs_dev, mmACP_PGFSM_READ_REG_0 + tile); 12725030321SMaruthi Srinivas Bayyavarapu val &= ACP_TILE_ON_MASK; 12825030321SMaruthi Srinivas Bayyavarapu 12925030321SMaruthi Srinivas Bayyavarapu if (val == 0x0) { 13025030321SMaruthi Srinivas Bayyavarapu val = cgs_read_register(cgs_dev, mmACP_PGFSM_RETAIN_REG); 13125030321SMaruthi Srinivas Bayyavarapu val = val | (1 << tile); 13225030321SMaruthi Srinivas Bayyavarapu cgs_write_register(cgs_dev, mmACP_PGFSM_RETAIN_REG, val); 13325030321SMaruthi Srinivas Bayyavarapu cgs_write_register(cgs_dev, mmACP_PGFSM_CONFIG_REG, 13425030321SMaruthi Srinivas Bayyavarapu 0x500 + tile); 13525030321SMaruthi Srinivas Bayyavarapu 13625030321SMaruthi Srinivas Bayyavarapu count = ACP_TIMEOUT_LOOP; 13725030321SMaruthi Srinivas Bayyavarapu while (true) { 13825030321SMaruthi Srinivas Bayyavarapu val = cgs_read_register(cgs_dev, mmACP_PGFSM_READ_REG_0 13925030321SMaruthi Srinivas Bayyavarapu + tile); 14025030321SMaruthi Srinivas Bayyavarapu val = val & ACP_TILE_ON_MASK; 14125030321SMaruthi Srinivas Bayyavarapu if (val == ACP_TILE_OFF_MASK) 14225030321SMaruthi Srinivas Bayyavarapu break; 14325030321SMaruthi Srinivas Bayyavarapu if (--count == 0) { 14425030321SMaruthi Srinivas Bayyavarapu pr_err("Timeout reading ACP PGFSM status\n"); 14525030321SMaruthi Srinivas Bayyavarapu return -ETIMEDOUT; 14625030321SMaruthi Srinivas Bayyavarapu } 14725030321SMaruthi Srinivas Bayyavarapu udelay(100); 14825030321SMaruthi Srinivas Bayyavarapu } 14925030321SMaruthi Srinivas Bayyavarapu 15025030321SMaruthi Srinivas Bayyavarapu val = cgs_read_register(cgs_dev, mmACP_PGFSM_RETAIN_REG); 15125030321SMaruthi Srinivas Bayyavarapu 15225030321SMaruthi Srinivas Bayyavarapu val |= ACP_TILE_OFF_RETAIN_REG_MASK; 15325030321SMaruthi Srinivas Bayyavarapu cgs_write_register(cgs_dev, mmACP_PGFSM_RETAIN_REG, val); 15425030321SMaruthi Srinivas Bayyavarapu } 15525030321SMaruthi Srinivas Bayyavarapu return 0; 15625030321SMaruthi Srinivas Bayyavarapu } 15725030321SMaruthi Srinivas Bayyavarapu 15825030321SMaruthi Srinivas Bayyavarapu /* power on a tile/block within ACP */ 15925030321SMaruthi Srinivas Bayyavarapu static int acp_resume_tile(void *cgs_dev, int tile) 16025030321SMaruthi Srinivas Bayyavarapu { 16125030321SMaruthi Srinivas Bayyavarapu u32 val = 0; 16225030321SMaruthi Srinivas Bayyavarapu u32 count = 0; 16325030321SMaruthi Srinivas Bayyavarapu 16425030321SMaruthi Srinivas Bayyavarapu if ((tile < ACP_TILE_P1) || (tile > ACP_TILE_DSP2)) { 16525030321SMaruthi Srinivas Bayyavarapu pr_err("Invalid ACP tile to resume\n"); 16625030321SMaruthi Srinivas Bayyavarapu return -1; 16725030321SMaruthi Srinivas Bayyavarapu } 16825030321SMaruthi Srinivas Bayyavarapu 16925030321SMaruthi Srinivas Bayyavarapu val = cgs_read_register(cgs_dev, mmACP_PGFSM_READ_REG_0 + tile); 17025030321SMaruthi Srinivas Bayyavarapu val = val & ACP_TILE_ON_MASK; 17125030321SMaruthi Srinivas Bayyavarapu 17225030321SMaruthi Srinivas Bayyavarapu if (val != 0x0) { 17325030321SMaruthi Srinivas Bayyavarapu cgs_write_register(cgs_dev, mmACP_PGFSM_CONFIG_REG, 17425030321SMaruthi Srinivas Bayyavarapu 0x600 + tile); 17525030321SMaruthi Srinivas Bayyavarapu count = ACP_TIMEOUT_LOOP; 17625030321SMaruthi Srinivas Bayyavarapu while (true) { 17725030321SMaruthi Srinivas Bayyavarapu val = cgs_read_register(cgs_dev, mmACP_PGFSM_READ_REG_0 17825030321SMaruthi Srinivas Bayyavarapu + tile); 17925030321SMaruthi Srinivas Bayyavarapu val = val & ACP_TILE_ON_MASK; 18025030321SMaruthi Srinivas Bayyavarapu if (val == 0x0) 18125030321SMaruthi Srinivas Bayyavarapu break; 18225030321SMaruthi Srinivas Bayyavarapu if (--count == 0) { 18325030321SMaruthi Srinivas Bayyavarapu pr_err("Timeout reading ACP PGFSM status\n"); 18425030321SMaruthi Srinivas Bayyavarapu return -ETIMEDOUT; 18525030321SMaruthi Srinivas Bayyavarapu } 18625030321SMaruthi Srinivas Bayyavarapu udelay(100); 18725030321SMaruthi Srinivas Bayyavarapu } 18825030321SMaruthi Srinivas Bayyavarapu val = cgs_read_register(cgs_dev, mmACP_PGFSM_RETAIN_REG); 18925030321SMaruthi Srinivas Bayyavarapu if (tile == ACP_TILE_P1) 19025030321SMaruthi Srinivas Bayyavarapu val = val & (ACP_TILE_P1_MASK); 19125030321SMaruthi Srinivas Bayyavarapu else if (tile == ACP_TILE_P2) 19225030321SMaruthi Srinivas Bayyavarapu val = val & (ACP_TILE_P2_MASK); 19325030321SMaruthi Srinivas Bayyavarapu 19425030321SMaruthi Srinivas Bayyavarapu cgs_write_register(cgs_dev, mmACP_PGFSM_RETAIN_REG, val); 19525030321SMaruthi Srinivas Bayyavarapu } 19625030321SMaruthi Srinivas Bayyavarapu return 0; 19725030321SMaruthi Srinivas Bayyavarapu } 19825030321SMaruthi Srinivas Bayyavarapu 19925030321SMaruthi Srinivas Bayyavarapu struct acp_pm_domain { 20025030321SMaruthi Srinivas Bayyavarapu void *cgs_dev; 20125030321SMaruthi Srinivas Bayyavarapu struct generic_pm_domain gpd; 20225030321SMaruthi Srinivas Bayyavarapu }; 20325030321SMaruthi Srinivas Bayyavarapu 20425030321SMaruthi Srinivas Bayyavarapu static int acp_poweroff(struct generic_pm_domain *genpd) 20525030321SMaruthi Srinivas Bayyavarapu { 20625030321SMaruthi Srinivas Bayyavarapu int i, ret; 20725030321SMaruthi Srinivas Bayyavarapu struct acp_pm_domain *apd; 20825030321SMaruthi Srinivas Bayyavarapu 20925030321SMaruthi Srinivas Bayyavarapu apd = container_of(genpd, struct acp_pm_domain, gpd); 21025030321SMaruthi Srinivas Bayyavarapu if (apd != NULL) { 21125030321SMaruthi Srinivas Bayyavarapu /* Donot return abruptly if any of power tile fails to suspend. 21225030321SMaruthi Srinivas Bayyavarapu * Log it and continue powering off other tile 21325030321SMaruthi Srinivas Bayyavarapu */ 21425030321SMaruthi Srinivas Bayyavarapu for (i = 4; i >= 0 ; i--) { 21525030321SMaruthi Srinivas Bayyavarapu ret = acp_suspend_tile(apd->cgs_dev, ACP_TILE_P1 + i); 21625030321SMaruthi Srinivas Bayyavarapu if (ret) 21725030321SMaruthi Srinivas Bayyavarapu pr_err("ACP tile %d tile suspend failed\n", i); 21825030321SMaruthi Srinivas Bayyavarapu } 21925030321SMaruthi Srinivas Bayyavarapu } 22025030321SMaruthi Srinivas Bayyavarapu return 0; 22125030321SMaruthi Srinivas Bayyavarapu } 22225030321SMaruthi Srinivas Bayyavarapu 22325030321SMaruthi Srinivas Bayyavarapu static int acp_poweron(struct generic_pm_domain *genpd) 22425030321SMaruthi Srinivas Bayyavarapu { 22525030321SMaruthi Srinivas Bayyavarapu int i, ret; 22625030321SMaruthi Srinivas Bayyavarapu struct acp_pm_domain *apd; 22725030321SMaruthi Srinivas Bayyavarapu 22825030321SMaruthi Srinivas Bayyavarapu apd = container_of(genpd, struct acp_pm_domain, gpd); 22925030321SMaruthi Srinivas Bayyavarapu if (apd != NULL) { 23025030321SMaruthi Srinivas Bayyavarapu for (i = 0; i < 2; i++) { 23125030321SMaruthi Srinivas Bayyavarapu ret = acp_resume_tile(apd->cgs_dev, ACP_TILE_P1 + i); 23225030321SMaruthi Srinivas Bayyavarapu if (ret) { 23325030321SMaruthi Srinivas Bayyavarapu pr_err("ACP tile %d resume failed\n", i); 23425030321SMaruthi Srinivas Bayyavarapu break; 23525030321SMaruthi Srinivas Bayyavarapu } 23625030321SMaruthi Srinivas Bayyavarapu } 23725030321SMaruthi Srinivas Bayyavarapu 23825030321SMaruthi Srinivas Bayyavarapu /* Disable DSPs which are not going to be used */ 23925030321SMaruthi Srinivas Bayyavarapu for (i = 0; i < 3; i++) { 24025030321SMaruthi Srinivas Bayyavarapu ret = acp_suspend_tile(apd->cgs_dev, ACP_TILE_DSP0 + i); 24125030321SMaruthi Srinivas Bayyavarapu /* Continue suspending other DSP, even if one fails */ 24225030321SMaruthi Srinivas Bayyavarapu if (ret) 24325030321SMaruthi Srinivas Bayyavarapu pr_err("ACP DSP %d suspend failed\n", i); 24425030321SMaruthi Srinivas Bayyavarapu } 24525030321SMaruthi Srinivas Bayyavarapu } 24625030321SMaruthi Srinivas Bayyavarapu return 0; 24725030321SMaruthi Srinivas Bayyavarapu } 24825030321SMaruthi Srinivas Bayyavarapu 24925030321SMaruthi Srinivas Bayyavarapu static struct device *get_mfd_cell_dev(const char *device_name, int r) 25025030321SMaruthi Srinivas Bayyavarapu { 25125030321SMaruthi Srinivas Bayyavarapu char auto_dev_name[25]; 25225030321SMaruthi Srinivas Bayyavarapu struct device *dev; 25325030321SMaruthi Srinivas Bayyavarapu 254a65ecc40SDan Carpenter snprintf(auto_dev_name, sizeof(auto_dev_name), 255a65ecc40SDan Carpenter "%s.%d.auto", device_name, r); 25625030321SMaruthi Srinivas Bayyavarapu dev = bus_find_device_by_name(&platform_bus_type, NULL, auto_dev_name); 25725030321SMaruthi Srinivas Bayyavarapu dev_info(dev, "device %s added to pm domain\n", auto_dev_name); 25825030321SMaruthi Srinivas Bayyavarapu 25925030321SMaruthi Srinivas Bayyavarapu return dev; 26025030321SMaruthi Srinivas Bayyavarapu } 26125030321SMaruthi Srinivas Bayyavarapu 262a8fe58ceSMaruthi Bayyavarapu /** 263a8fe58ceSMaruthi Bayyavarapu * acp_hw_init - start and test ACP block 264a8fe58ceSMaruthi Bayyavarapu * 265a8fe58ceSMaruthi Bayyavarapu * @adev: amdgpu_device pointer 266a8fe58ceSMaruthi Bayyavarapu * 267a8fe58ceSMaruthi Bayyavarapu */ 268a8fe58ceSMaruthi Bayyavarapu static int acp_hw_init(void *handle) 269a8fe58ceSMaruthi Bayyavarapu { 27025030321SMaruthi Srinivas Bayyavarapu int r, i; 271a8fe58ceSMaruthi Bayyavarapu uint64_t acp_base; 27237c5f2c9SAkshu Agrawal u32 val = 0; 27337c5f2c9SAkshu Agrawal u32 count = 0; 27425030321SMaruthi Srinivas Bayyavarapu struct device *dev; 275a8fe58ceSMaruthi Bayyavarapu struct i2s_platform_data *i2s_pdata; 276a8fe58ceSMaruthi Bayyavarapu 277a8fe58ceSMaruthi Bayyavarapu struct amdgpu_device *adev = (struct amdgpu_device *)handle; 278a8fe58ceSMaruthi Bayyavarapu 279a1255107SAlex Deucher const struct amdgpu_ip_block *ip_block = 2802990a1fcSAlex Deucher amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_ACP); 281a8fe58ceSMaruthi Bayyavarapu 282a1255107SAlex Deucher if (!ip_block) 283a8fe58ceSMaruthi Bayyavarapu return -EINVAL; 284a8fe58ceSMaruthi Bayyavarapu 285a8fe58ceSMaruthi Bayyavarapu r = amd_acp_hw_init(adev->acp.cgs_device, 286a1255107SAlex Deucher ip_block->version->major, ip_block->version->minor); 287a8fe58ceSMaruthi Bayyavarapu /* -ENODEV means board uses AZ rather than ACP */ 288a8fe58ceSMaruthi Bayyavarapu if (r == -ENODEV) 289a8fe58ceSMaruthi Bayyavarapu return 0; 290a8fe58ceSMaruthi Bayyavarapu else if (r) 291a8fe58ceSMaruthi Bayyavarapu return r; 292a8fe58ceSMaruthi Bayyavarapu 293d32d6617SRex Zhu if (adev->rmmio_size == 0 || adev->rmmio_size < 0x5289) 294d32d6617SRex Zhu return -EINVAL; 295d32d6617SRex Zhu 296d32d6617SRex Zhu acp_base = adev->rmmio_base; 297d32d6617SRex Zhu 29843bb3a6dSVijendar Mukunda if (adev->asic_type != CHIP_STONEY) { 29925030321SMaruthi Srinivas Bayyavarapu adev->acp.acp_genpd = kzalloc(sizeof(struct acp_pm_domain), GFP_KERNEL); 30025030321SMaruthi Srinivas Bayyavarapu if (adev->acp.acp_genpd == NULL) 30125030321SMaruthi Srinivas Bayyavarapu return -ENOMEM; 30225030321SMaruthi Srinivas Bayyavarapu 30325030321SMaruthi Srinivas Bayyavarapu adev->acp.acp_genpd->gpd.name = "ACP_AUDIO"; 30425030321SMaruthi Srinivas Bayyavarapu adev->acp.acp_genpd->gpd.power_off = acp_poweroff; 30525030321SMaruthi Srinivas Bayyavarapu adev->acp.acp_genpd->gpd.power_on = acp_poweron; 30625030321SMaruthi Srinivas Bayyavarapu 30725030321SMaruthi Srinivas Bayyavarapu 30825030321SMaruthi Srinivas Bayyavarapu adev->acp.acp_genpd->cgs_dev = adev->acp.cgs_device; 30925030321SMaruthi Srinivas Bayyavarapu 31025030321SMaruthi Srinivas Bayyavarapu pm_genpd_init(&adev->acp.acp_genpd->gpd, NULL, false); 31143bb3a6dSVijendar Mukunda } 31225030321SMaruthi Srinivas Bayyavarapu 313a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell = kzalloc(sizeof(struct mfd_cell) * ACP_DEVS, 314a8fe58ceSMaruthi Bayyavarapu GFP_KERNEL); 315a8fe58ceSMaruthi Bayyavarapu 316a8fe58ceSMaruthi Bayyavarapu if (adev->acp.acp_cell == NULL) 317a8fe58ceSMaruthi Bayyavarapu return -ENOMEM; 318a8fe58ceSMaruthi Bayyavarapu 319a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res = kzalloc(sizeof(struct resource) * 4, GFP_KERNEL); 320a8fe58ceSMaruthi Bayyavarapu 321a8fe58ceSMaruthi Bayyavarapu if (adev->acp.acp_res == NULL) { 322a8fe58ceSMaruthi Bayyavarapu kfree(adev->acp.acp_cell); 323a8fe58ceSMaruthi Bayyavarapu return -ENOMEM; 324a8fe58ceSMaruthi Bayyavarapu } 325a8fe58ceSMaruthi Bayyavarapu 326a8fe58ceSMaruthi Bayyavarapu i2s_pdata = kzalloc(sizeof(struct i2s_platform_data) * 2, GFP_KERNEL); 327a8fe58ceSMaruthi Bayyavarapu if (i2s_pdata == NULL) { 328a8fe58ceSMaruthi Bayyavarapu kfree(adev->acp.acp_res); 329a8fe58ceSMaruthi Bayyavarapu kfree(adev->acp.acp_cell); 330a8fe58ceSMaruthi Bayyavarapu return -ENOMEM; 331a8fe58ceSMaruthi Bayyavarapu } 332a8fe58ceSMaruthi Bayyavarapu 33381454cadSVijendar Mukunda switch (adev->asic_type) { 33481454cadSVijendar Mukunda case CHIP_STONEY: 33581454cadSVijendar Mukunda i2s_pdata[0].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET | 33681454cadSVijendar Mukunda DW_I2S_QUIRK_16BIT_IDX_OVERRIDE; 33781454cadSVijendar Mukunda break; 33881454cadSVijendar Mukunda default: 339a8fe58ceSMaruthi Bayyavarapu i2s_pdata[0].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET; 34081454cadSVijendar Mukunda } 341a8fe58ceSMaruthi Bayyavarapu i2s_pdata[0].cap = DWC_I2S_PLAY; 342a8fe58ceSMaruthi Bayyavarapu i2s_pdata[0].snd_rates = SNDRV_PCM_RATE_8000_96000; 343a8fe58ceSMaruthi Bayyavarapu i2s_pdata[0].i2s_reg_comp1 = ACP_I2S_COMP1_PLAY_REG_OFFSET; 344a8fe58ceSMaruthi Bayyavarapu i2s_pdata[0].i2s_reg_comp2 = ACP_I2S_COMP2_PLAY_REG_OFFSET; 34581454cadSVijendar Mukunda switch (adev->asic_type) { 34681454cadSVijendar Mukunda case CHIP_STONEY: 34781454cadSVijendar Mukunda i2s_pdata[1].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET | 34881454cadSVijendar Mukunda DW_I2S_QUIRK_COMP_PARAM1 | 34981454cadSVijendar Mukunda DW_I2S_QUIRK_16BIT_IDX_OVERRIDE; 35081454cadSVijendar Mukunda break; 35181454cadSVijendar Mukunda default: 352a8fe58ceSMaruthi Bayyavarapu i2s_pdata[1].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET | 353a8fe58ceSMaruthi Bayyavarapu DW_I2S_QUIRK_COMP_PARAM1; 35481454cadSVijendar Mukunda } 35581454cadSVijendar Mukunda 356a8fe58ceSMaruthi Bayyavarapu i2s_pdata[1].cap = DWC_I2S_RECORD; 357a8fe58ceSMaruthi Bayyavarapu i2s_pdata[1].snd_rates = SNDRV_PCM_RATE_8000_96000; 358a8fe58ceSMaruthi Bayyavarapu i2s_pdata[1].i2s_reg_comp1 = ACP_I2S_COMP1_CAP_REG_OFFSET; 359a8fe58ceSMaruthi Bayyavarapu i2s_pdata[1].i2s_reg_comp2 = ACP_I2S_COMP2_CAP_REG_OFFSET; 360a8fe58ceSMaruthi Bayyavarapu 361a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[0].name = "acp2x_dma"; 362a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[0].flags = IORESOURCE_MEM; 363a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[0].start = acp_base; 364a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[0].end = acp_base + ACP_DMA_REGS_END; 365a8fe58ceSMaruthi Bayyavarapu 366a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[1].name = "acp2x_dw_i2s_play"; 367a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[1].flags = IORESOURCE_MEM; 368a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[1].start = acp_base + ACP_I2S_PLAY_REGS_START; 369a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[1].end = acp_base + ACP_I2S_PLAY_REGS_END; 370a8fe58ceSMaruthi Bayyavarapu 371a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[2].name = "acp2x_dw_i2s_cap"; 372a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[2].flags = IORESOURCE_MEM; 373a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[2].start = acp_base + ACP_I2S_CAP_REGS_START; 374a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[2].end = acp_base + ACP_I2S_CAP_REGS_END; 375a8fe58ceSMaruthi Bayyavarapu 376a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[3].name = "acp2x_dma_irq"; 377a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[3].flags = IORESOURCE_IRQ; 378a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[3].start = amdgpu_irq_create_mapping(adev, 162); 379a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[3].end = adev->acp.acp_res[3].start; 380a8fe58ceSMaruthi Bayyavarapu 381a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[0].name = "acp_audio_dma"; 382a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[0].num_resources = 4; 383a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[0].resources = &adev->acp.acp_res[0]; 3841fd16f36SVijendar Mukunda adev->acp.acp_cell[0].platform_data = &adev->asic_type; 3851fd16f36SVijendar Mukunda adev->acp.acp_cell[0].pdata_size = sizeof(adev->asic_type); 386a8fe58ceSMaruthi Bayyavarapu 387a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[1].name = "designware-i2s"; 388a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[1].num_resources = 1; 389a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[1].resources = &adev->acp.acp_res[1]; 390a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[1].platform_data = &i2s_pdata[0]; 391a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[1].pdata_size = sizeof(struct i2s_platform_data); 392a8fe58ceSMaruthi Bayyavarapu 393a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[2].name = "designware-i2s"; 394a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[2].num_resources = 1; 395a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[2].resources = &adev->acp.acp_res[2]; 396a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[2].platform_data = &i2s_pdata[1]; 397a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[2].pdata_size = sizeof(struct i2s_platform_data); 398a8fe58ceSMaruthi Bayyavarapu 399a8fe58ceSMaruthi Bayyavarapu r = mfd_add_hotplug_devices(adev->acp.parent, adev->acp.acp_cell, 400a8fe58ceSMaruthi Bayyavarapu ACP_DEVS); 401a8fe58ceSMaruthi Bayyavarapu if (r) 402a8fe58ceSMaruthi Bayyavarapu return r; 403a8fe58ceSMaruthi Bayyavarapu 40443bb3a6dSVijendar Mukunda if (adev->asic_type != CHIP_STONEY) { 40525030321SMaruthi Srinivas Bayyavarapu for (i = 0; i < ACP_DEVS ; i++) { 40625030321SMaruthi Srinivas Bayyavarapu dev = get_mfd_cell_dev(adev->acp.acp_cell[i].name, i); 40725030321SMaruthi Srinivas Bayyavarapu r = pm_genpd_add_device(&adev->acp.acp_genpd->gpd, dev); 40825030321SMaruthi Srinivas Bayyavarapu if (r) { 40925030321SMaruthi Srinivas Bayyavarapu dev_err(dev, "Failed to add dev to genpd\n"); 41025030321SMaruthi Srinivas Bayyavarapu return r; 41125030321SMaruthi Srinivas Bayyavarapu } 41225030321SMaruthi Srinivas Bayyavarapu } 41343bb3a6dSVijendar Mukunda } 41425030321SMaruthi Srinivas Bayyavarapu 41537c5f2c9SAkshu Agrawal /* Assert Soft reset of ACP */ 41637c5f2c9SAkshu Agrawal val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); 41737c5f2c9SAkshu Agrawal 41837c5f2c9SAkshu Agrawal val |= ACP_SOFT_RESET__SoftResetAud_MASK; 41937c5f2c9SAkshu Agrawal cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); 42037c5f2c9SAkshu Agrawal 42137c5f2c9SAkshu Agrawal count = ACP_SOFT_RESET_DONE_TIME_OUT_VALUE; 42237c5f2c9SAkshu Agrawal while (true) { 42337c5f2c9SAkshu Agrawal val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); 42437c5f2c9SAkshu Agrawal if (ACP_SOFT_RESET__SoftResetAudDone_MASK == 42537c5f2c9SAkshu Agrawal (val & ACP_SOFT_RESET__SoftResetAudDone_MASK)) 42637c5f2c9SAkshu Agrawal break; 42737c5f2c9SAkshu Agrawal if (--count == 0) { 42837c5f2c9SAkshu Agrawal dev_err(&adev->pdev->dev, "Failed to reset ACP\n"); 42937c5f2c9SAkshu Agrawal return -ETIMEDOUT; 43037c5f2c9SAkshu Agrawal } 43137c5f2c9SAkshu Agrawal udelay(100); 43237c5f2c9SAkshu Agrawal } 43337c5f2c9SAkshu Agrawal /* Enable clock to ACP and wait until the clock is enabled */ 43437c5f2c9SAkshu Agrawal val = cgs_read_register(adev->acp.cgs_device, mmACP_CONTROL); 43537c5f2c9SAkshu Agrawal val = val | ACP_CONTROL__ClkEn_MASK; 43637c5f2c9SAkshu Agrawal cgs_write_register(adev->acp.cgs_device, mmACP_CONTROL, val); 43737c5f2c9SAkshu Agrawal 43837c5f2c9SAkshu Agrawal count = ACP_CLOCK_EN_TIME_OUT_VALUE; 43937c5f2c9SAkshu Agrawal 44037c5f2c9SAkshu Agrawal while (true) { 44137c5f2c9SAkshu Agrawal val = cgs_read_register(adev->acp.cgs_device, mmACP_STATUS); 44237c5f2c9SAkshu Agrawal if (val & (u32) 0x1) 44337c5f2c9SAkshu Agrawal break; 44437c5f2c9SAkshu Agrawal if (--count == 0) { 44537c5f2c9SAkshu Agrawal dev_err(&adev->pdev->dev, "Failed to reset ACP\n"); 44637c5f2c9SAkshu Agrawal return -ETIMEDOUT; 44737c5f2c9SAkshu Agrawal } 44837c5f2c9SAkshu Agrawal udelay(100); 44937c5f2c9SAkshu Agrawal } 45037c5f2c9SAkshu Agrawal /* Deassert the SOFT RESET flags */ 45137c5f2c9SAkshu Agrawal val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); 45237c5f2c9SAkshu Agrawal val &= ~ACP_SOFT_RESET__SoftResetAud_MASK; 45337c5f2c9SAkshu Agrawal cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); 45437c5f2c9SAkshu Agrawal 455a8fe58ceSMaruthi Bayyavarapu return 0; 456a8fe58ceSMaruthi Bayyavarapu } 457a8fe58ceSMaruthi Bayyavarapu 458a8fe58ceSMaruthi Bayyavarapu /** 459a8fe58ceSMaruthi Bayyavarapu * acp_hw_fini - stop the hardware block 460a8fe58ceSMaruthi Bayyavarapu * 461a8fe58ceSMaruthi Bayyavarapu * @adev: amdgpu_device pointer 462a8fe58ceSMaruthi Bayyavarapu * 463a8fe58ceSMaruthi Bayyavarapu */ 464a8fe58ceSMaruthi Bayyavarapu static int acp_hw_fini(void *handle) 465a8fe58ceSMaruthi Bayyavarapu { 46625030321SMaruthi Srinivas Bayyavarapu int i, ret; 46737c5f2c9SAkshu Agrawal u32 val = 0; 46837c5f2c9SAkshu Agrawal u32 count = 0; 46925030321SMaruthi Srinivas Bayyavarapu struct device *dev; 470a8fe58ceSMaruthi Bayyavarapu struct amdgpu_device *adev = (struct amdgpu_device *)handle; 471a8fe58ceSMaruthi Bayyavarapu 472757124d9SAlex Deucher /* return early if no ACP */ 47343bb3a6dSVijendar Mukunda if (!adev->acp.acp_cell) 474757124d9SAlex Deucher return 0; 475757124d9SAlex Deucher 47637c5f2c9SAkshu Agrawal /* Assert Soft reset of ACP */ 47737c5f2c9SAkshu Agrawal val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); 47837c5f2c9SAkshu Agrawal 47937c5f2c9SAkshu Agrawal val |= ACP_SOFT_RESET__SoftResetAud_MASK; 48037c5f2c9SAkshu Agrawal cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); 48137c5f2c9SAkshu Agrawal 48237c5f2c9SAkshu Agrawal count = ACP_SOFT_RESET_DONE_TIME_OUT_VALUE; 48337c5f2c9SAkshu Agrawal while (true) { 48437c5f2c9SAkshu Agrawal val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); 48537c5f2c9SAkshu Agrawal if (ACP_SOFT_RESET__SoftResetAudDone_MASK == 48637c5f2c9SAkshu Agrawal (val & ACP_SOFT_RESET__SoftResetAudDone_MASK)) 48737c5f2c9SAkshu Agrawal break; 48837c5f2c9SAkshu Agrawal if (--count == 0) { 48937c5f2c9SAkshu Agrawal dev_err(&adev->pdev->dev, "Failed to reset ACP\n"); 49037c5f2c9SAkshu Agrawal return -ETIMEDOUT; 49137c5f2c9SAkshu Agrawal } 49237c5f2c9SAkshu Agrawal udelay(100); 49337c5f2c9SAkshu Agrawal } 49437c5f2c9SAkshu Agrawal /* Disable ACP clock */ 49537c5f2c9SAkshu Agrawal val = cgs_read_register(adev->acp.cgs_device, mmACP_CONTROL); 49637c5f2c9SAkshu Agrawal val &= ~ACP_CONTROL__ClkEn_MASK; 49737c5f2c9SAkshu Agrawal cgs_write_register(adev->acp.cgs_device, mmACP_CONTROL, val); 49837c5f2c9SAkshu Agrawal 49937c5f2c9SAkshu Agrawal count = ACP_CLOCK_EN_TIME_OUT_VALUE; 50037c5f2c9SAkshu Agrawal 50137c5f2c9SAkshu Agrawal while (true) { 50237c5f2c9SAkshu Agrawal val = cgs_read_register(adev->acp.cgs_device, mmACP_STATUS); 50337c5f2c9SAkshu Agrawal if (val & (u32) 0x1) 50437c5f2c9SAkshu Agrawal break; 50537c5f2c9SAkshu Agrawal if (--count == 0) { 50637c5f2c9SAkshu Agrawal dev_err(&adev->pdev->dev, "Failed to reset ACP\n"); 50737c5f2c9SAkshu Agrawal return -ETIMEDOUT; 50837c5f2c9SAkshu Agrawal } 50937c5f2c9SAkshu Agrawal udelay(100); 51037c5f2c9SAkshu Agrawal } 51137c5f2c9SAkshu Agrawal 51243bb3a6dSVijendar Mukunda if (adev->acp.acp_genpd) { 51325030321SMaruthi Srinivas Bayyavarapu for (i = 0; i < ACP_DEVS ; i++) { 51425030321SMaruthi Srinivas Bayyavarapu dev = get_mfd_cell_dev(adev->acp.acp_cell[i].name, i); 51525030321SMaruthi Srinivas Bayyavarapu ret = pm_genpd_remove_device(&adev->acp.acp_genpd->gpd, dev); 51625030321SMaruthi Srinivas Bayyavarapu /* If removal fails, dont giveup and try rest */ 51725030321SMaruthi Srinivas Bayyavarapu if (ret) 51825030321SMaruthi Srinivas Bayyavarapu dev_err(dev, "remove dev from genpd failed\n"); 51925030321SMaruthi Srinivas Bayyavarapu } 52043bb3a6dSVijendar Mukunda kfree(adev->acp.acp_genpd); 52143bb3a6dSVijendar Mukunda } 52225030321SMaruthi Srinivas Bayyavarapu 523a8fe58ceSMaruthi Bayyavarapu mfd_remove_devices(adev->acp.parent); 524a8fe58ceSMaruthi Bayyavarapu kfree(adev->acp.acp_res); 525a8fe58ceSMaruthi Bayyavarapu kfree(adev->acp.acp_cell); 526a8fe58ceSMaruthi Bayyavarapu 527a8fe58ceSMaruthi Bayyavarapu return 0; 528a8fe58ceSMaruthi Bayyavarapu } 529a8fe58ceSMaruthi Bayyavarapu 530a8fe58ceSMaruthi Bayyavarapu static int acp_suspend(void *handle) 531a8fe58ceSMaruthi Bayyavarapu { 532a8fe58ceSMaruthi Bayyavarapu return 0; 533a8fe58ceSMaruthi Bayyavarapu } 534a8fe58ceSMaruthi Bayyavarapu 535a8fe58ceSMaruthi Bayyavarapu static int acp_resume(void *handle) 536a8fe58ceSMaruthi Bayyavarapu { 537a8fe58ceSMaruthi Bayyavarapu return 0; 538a8fe58ceSMaruthi Bayyavarapu } 539a8fe58ceSMaruthi Bayyavarapu 540a8fe58ceSMaruthi Bayyavarapu static int acp_early_init(void *handle) 541a8fe58ceSMaruthi Bayyavarapu { 542a8fe58ceSMaruthi Bayyavarapu return 0; 543a8fe58ceSMaruthi Bayyavarapu } 544a8fe58ceSMaruthi Bayyavarapu 545a8fe58ceSMaruthi Bayyavarapu static bool acp_is_idle(void *handle) 546a8fe58ceSMaruthi Bayyavarapu { 547a8fe58ceSMaruthi Bayyavarapu return true; 548a8fe58ceSMaruthi Bayyavarapu } 549a8fe58ceSMaruthi Bayyavarapu 550a8fe58ceSMaruthi Bayyavarapu static int acp_wait_for_idle(void *handle) 551a8fe58ceSMaruthi Bayyavarapu { 552a8fe58ceSMaruthi Bayyavarapu return 0; 553a8fe58ceSMaruthi Bayyavarapu } 554a8fe58ceSMaruthi Bayyavarapu 555a8fe58ceSMaruthi Bayyavarapu static int acp_soft_reset(void *handle) 556a8fe58ceSMaruthi Bayyavarapu { 557a8fe58ceSMaruthi Bayyavarapu return 0; 558a8fe58ceSMaruthi Bayyavarapu } 559a8fe58ceSMaruthi Bayyavarapu 560a8fe58ceSMaruthi Bayyavarapu static int acp_set_clockgating_state(void *handle, 561a8fe58ceSMaruthi Bayyavarapu enum amd_clockgating_state state) 562a8fe58ceSMaruthi Bayyavarapu { 563a8fe58ceSMaruthi Bayyavarapu return 0; 564a8fe58ceSMaruthi Bayyavarapu } 565a8fe58ceSMaruthi Bayyavarapu 566a8fe58ceSMaruthi Bayyavarapu static int acp_set_powergating_state(void *handle, 567a8fe58ceSMaruthi Bayyavarapu enum amd_powergating_state state) 568a8fe58ceSMaruthi Bayyavarapu { 569a8fe58ceSMaruthi Bayyavarapu return 0; 570a8fe58ceSMaruthi Bayyavarapu } 571a8fe58ceSMaruthi Bayyavarapu 572a1255107SAlex Deucher static const struct amd_ip_funcs acp_ip_funcs = { 57388a907d6STom St Denis .name = "acp_ip", 574a8fe58ceSMaruthi Bayyavarapu .early_init = acp_early_init, 575a8fe58ceSMaruthi Bayyavarapu .late_init = NULL, 576a8fe58ceSMaruthi Bayyavarapu .sw_init = acp_sw_init, 577a8fe58ceSMaruthi Bayyavarapu .sw_fini = acp_sw_fini, 578a8fe58ceSMaruthi Bayyavarapu .hw_init = acp_hw_init, 579a8fe58ceSMaruthi Bayyavarapu .hw_fini = acp_hw_fini, 580a8fe58ceSMaruthi Bayyavarapu .suspend = acp_suspend, 581a8fe58ceSMaruthi Bayyavarapu .resume = acp_resume, 582a8fe58ceSMaruthi Bayyavarapu .is_idle = acp_is_idle, 583a8fe58ceSMaruthi Bayyavarapu .wait_for_idle = acp_wait_for_idle, 584a8fe58ceSMaruthi Bayyavarapu .soft_reset = acp_soft_reset, 585a8fe58ceSMaruthi Bayyavarapu .set_clockgating_state = acp_set_clockgating_state, 586a8fe58ceSMaruthi Bayyavarapu .set_powergating_state = acp_set_powergating_state, 587a8fe58ceSMaruthi Bayyavarapu }; 588a1255107SAlex Deucher 589a1255107SAlex Deucher const struct amdgpu_ip_block_version acp_ip_block = 590a1255107SAlex Deucher { 591a1255107SAlex Deucher .type = AMD_IP_BLOCK_TYPE_ACP, 592a1255107SAlex Deucher .major = 2, 593a1255107SAlex Deucher .minor = 2, 594a1255107SAlex Deucher .rev = 0, 595a1255107SAlex Deucher .funcs = &acp_ip_funcs, 596a1255107SAlex Deucher }; 597