1a8fe58ceSMaruthi Bayyavarapu /* 2a8fe58ceSMaruthi Bayyavarapu * Copyright 2015 Advanced Micro Devices, Inc. 3a8fe58ceSMaruthi Bayyavarapu * 4a8fe58ceSMaruthi Bayyavarapu * Permission is hereby granted, free of charge, to any person obtaining a 5a8fe58ceSMaruthi Bayyavarapu * copy of this software and associated documentation files (the "Software"), 6a8fe58ceSMaruthi Bayyavarapu * to deal in the Software without restriction, including without limitation 7a8fe58ceSMaruthi Bayyavarapu * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8a8fe58ceSMaruthi Bayyavarapu * and/or sell copies of the Software, and to permit persons to whom the 9a8fe58ceSMaruthi Bayyavarapu * Software is furnished to do so, subject to the following conditions: 10a8fe58ceSMaruthi Bayyavarapu * 11a8fe58ceSMaruthi Bayyavarapu * The above copyright notice and this permission notice shall be included in 12a8fe58ceSMaruthi Bayyavarapu * all copies or substantial portions of the Software. 13a8fe58ceSMaruthi Bayyavarapu * 14a8fe58ceSMaruthi Bayyavarapu * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15a8fe58ceSMaruthi Bayyavarapu * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16a8fe58ceSMaruthi Bayyavarapu * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17a8fe58ceSMaruthi Bayyavarapu * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18a8fe58ceSMaruthi Bayyavarapu * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19a8fe58ceSMaruthi Bayyavarapu * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20a8fe58ceSMaruthi Bayyavarapu * OTHER DEALINGS IN THE SOFTWARE. 21a8fe58ceSMaruthi Bayyavarapu * 22a8fe58ceSMaruthi Bayyavarapu * Authors: AMD 23a8fe58ceSMaruthi Bayyavarapu * 24a8fe58ceSMaruthi Bayyavarapu */ 25a8fe58ceSMaruthi Bayyavarapu 26a8fe58ceSMaruthi Bayyavarapu #include <linux/irqdomain.h> 2725030321SMaruthi Srinivas Bayyavarapu #include <linux/pm_domain.h> 28a8fe58ceSMaruthi Bayyavarapu #include <linux/platform_device.h> 29a8fe58ceSMaruthi Bayyavarapu #include <sound/designware_i2s.h> 30a8fe58ceSMaruthi Bayyavarapu #include <sound/pcm.h> 31a8fe58ceSMaruthi Bayyavarapu 32a8fe58ceSMaruthi Bayyavarapu #include "amdgpu.h" 33a8fe58ceSMaruthi Bayyavarapu #include "atom.h" 34a8fe58ceSMaruthi Bayyavarapu #include "amdgpu_acp.h" 35a8fe58ceSMaruthi Bayyavarapu 36a8fe58ceSMaruthi Bayyavarapu #include "acp_gfx_if.h" 37a8fe58ceSMaruthi Bayyavarapu 38a8fe58ceSMaruthi Bayyavarapu #define ACP_TILE_ON_MASK 0x03 39a8fe58ceSMaruthi Bayyavarapu #define ACP_TILE_OFF_MASK 0x02 40a8fe58ceSMaruthi Bayyavarapu #define ACP_TILE_ON_RETAIN_REG_MASK 0x1f 41a8fe58ceSMaruthi Bayyavarapu #define ACP_TILE_OFF_RETAIN_REG_MASK 0x20 42a8fe58ceSMaruthi Bayyavarapu 43a8fe58ceSMaruthi Bayyavarapu #define ACP_TILE_P1_MASK 0x3e 44a8fe58ceSMaruthi Bayyavarapu #define ACP_TILE_P2_MASK 0x3d 45a8fe58ceSMaruthi Bayyavarapu #define ACP_TILE_DSP0_MASK 0x3b 46a8fe58ceSMaruthi Bayyavarapu #define ACP_TILE_DSP1_MASK 0x37 47a8fe58ceSMaruthi Bayyavarapu 48a8fe58ceSMaruthi Bayyavarapu #define ACP_TILE_DSP2_MASK 0x2f 49a8fe58ceSMaruthi Bayyavarapu 50a8fe58ceSMaruthi Bayyavarapu #define ACP_DMA_REGS_END 0x146c0 51a8fe58ceSMaruthi Bayyavarapu #define ACP_I2S_PLAY_REGS_START 0x14840 52a8fe58ceSMaruthi Bayyavarapu #define ACP_I2S_PLAY_REGS_END 0x148b4 53a8fe58ceSMaruthi Bayyavarapu #define ACP_I2S_CAP_REGS_START 0x148b8 54a8fe58ceSMaruthi Bayyavarapu #define ACP_I2S_CAP_REGS_END 0x1496c 55a8fe58ceSMaruthi Bayyavarapu 56a8fe58ceSMaruthi Bayyavarapu #define ACP_I2S_COMP1_CAP_REG_OFFSET 0xac 57a8fe58ceSMaruthi Bayyavarapu #define ACP_I2S_COMP2_CAP_REG_OFFSET 0xa8 58a8fe58ceSMaruthi Bayyavarapu #define ACP_I2S_COMP1_PLAY_REG_OFFSET 0x6c 59a8fe58ceSMaruthi Bayyavarapu #define ACP_I2S_COMP2_PLAY_REG_OFFSET 0x68 602d95ceb4SVijendar Mukunda #define ACP_BT_PLAY_REGS_START 0x14970 612d95ceb4SVijendar Mukunda #define ACP_BT_PLAY_REGS_END 0x14a24 622d95ceb4SVijendar Mukunda #define ACP_BT_COMP1_REG_OFFSET 0xac 632d95ceb4SVijendar Mukunda #define ACP_BT_COMP2_REG_OFFSET 0xa8 64a8fe58ceSMaruthi Bayyavarapu 65a8fe58ceSMaruthi Bayyavarapu #define mmACP_PGFSM_RETAIN_REG 0x51c9 66a8fe58ceSMaruthi Bayyavarapu #define mmACP_PGFSM_CONFIG_REG 0x51ca 67a8fe58ceSMaruthi Bayyavarapu #define mmACP_PGFSM_READ_REG_0 0x51cc 68a8fe58ceSMaruthi Bayyavarapu 69a8fe58ceSMaruthi Bayyavarapu #define mmACP_MEM_SHUT_DOWN_REQ_LO 0x51f8 70a8fe58ceSMaruthi Bayyavarapu #define mmACP_MEM_SHUT_DOWN_REQ_HI 0x51f9 71a8fe58ceSMaruthi Bayyavarapu #define mmACP_MEM_SHUT_DOWN_STS_LO 0x51fa 72a8fe58ceSMaruthi Bayyavarapu #define mmACP_MEM_SHUT_DOWN_STS_HI 0x51fb 73a8fe58ceSMaruthi Bayyavarapu 7437c5f2c9SAkshu Agrawal #define mmACP_CONTROL 0x5131 7537c5f2c9SAkshu Agrawal #define mmACP_STATUS 0x5133 7637c5f2c9SAkshu Agrawal #define mmACP_SOFT_RESET 0x5134 7737c5f2c9SAkshu Agrawal #define ACP_CONTROL__ClkEn_MASK 0x1 7837c5f2c9SAkshu Agrawal #define ACP_SOFT_RESET__SoftResetAud_MASK 0x100 7937c5f2c9SAkshu Agrawal #define ACP_SOFT_RESET__SoftResetAudDone_MASK 0x1000000 8037c5f2c9SAkshu Agrawal #define ACP_CLOCK_EN_TIME_OUT_VALUE 0x000000FF 8137c5f2c9SAkshu Agrawal #define ACP_SOFT_RESET_DONE_TIME_OUT_VALUE 0x000000FF 8237c5f2c9SAkshu Agrawal 83a8fe58ceSMaruthi Bayyavarapu #define ACP_TIMEOUT_LOOP 0x000000FF 842d95ceb4SVijendar Mukunda #define ACP_DEVS 4 85a8fe58ceSMaruthi Bayyavarapu #define ACP_SRC_ID 162 86a8fe58ceSMaruthi Bayyavarapu 87a8fe58ceSMaruthi Bayyavarapu enum { 88a8fe58ceSMaruthi Bayyavarapu ACP_TILE_P1 = 0, 89a8fe58ceSMaruthi Bayyavarapu ACP_TILE_P2, 90a8fe58ceSMaruthi Bayyavarapu ACP_TILE_DSP0, 91a8fe58ceSMaruthi Bayyavarapu ACP_TILE_DSP1, 92a8fe58ceSMaruthi Bayyavarapu ACP_TILE_DSP2, 93a8fe58ceSMaruthi Bayyavarapu }; 94a8fe58ceSMaruthi Bayyavarapu 95a8fe58ceSMaruthi Bayyavarapu static int acp_sw_init(void *handle) 96a8fe58ceSMaruthi Bayyavarapu { 97a8fe58ceSMaruthi Bayyavarapu struct amdgpu_device *adev = (struct amdgpu_device *)handle; 98a8fe58ceSMaruthi Bayyavarapu 99a8fe58ceSMaruthi Bayyavarapu adev->acp.parent = adev->dev; 100a8fe58ceSMaruthi Bayyavarapu 101a8fe58ceSMaruthi Bayyavarapu adev->acp.cgs_device = 102a8fe58ceSMaruthi Bayyavarapu amdgpu_cgs_create_device(adev); 103a8fe58ceSMaruthi Bayyavarapu if (!adev->acp.cgs_device) 104a8fe58ceSMaruthi Bayyavarapu return -EINVAL; 105a8fe58ceSMaruthi Bayyavarapu 106a8fe58ceSMaruthi Bayyavarapu return 0; 107a8fe58ceSMaruthi Bayyavarapu } 108a8fe58ceSMaruthi Bayyavarapu 109a8fe58ceSMaruthi Bayyavarapu static int acp_sw_fini(void *handle) 110a8fe58ceSMaruthi Bayyavarapu { 111a8fe58ceSMaruthi Bayyavarapu struct amdgpu_device *adev = (struct amdgpu_device *)handle; 112a8fe58ceSMaruthi Bayyavarapu 113a8fe58ceSMaruthi Bayyavarapu if (adev->acp.cgs_device) 114a8fe58ceSMaruthi Bayyavarapu amdgpu_cgs_destroy_device(adev->acp.cgs_device); 115a8fe58ceSMaruthi Bayyavarapu 116a8fe58ceSMaruthi Bayyavarapu return 0; 117a8fe58ceSMaruthi Bayyavarapu } 118a8fe58ceSMaruthi Bayyavarapu 11925030321SMaruthi Srinivas Bayyavarapu /* power off a tile/block within ACP */ 12025030321SMaruthi Srinivas Bayyavarapu static int acp_suspend_tile(void *cgs_dev, int tile) 12125030321SMaruthi Srinivas Bayyavarapu { 12225030321SMaruthi Srinivas Bayyavarapu u32 val = 0; 12325030321SMaruthi Srinivas Bayyavarapu u32 count = 0; 12425030321SMaruthi Srinivas Bayyavarapu 12525030321SMaruthi Srinivas Bayyavarapu if ((tile < ACP_TILE_P1) || (tile > ACP_TILE_DSP2)) { 12625030321SMaruthi Srinivas Bayyavarapu pr_err("Invalid ACP tile : %d to suspend\n", tile); 12725030321SMaruthi Srinivas Bayyavarapu return -1; 12825030321SMaruthi Srinivas Bayyavarapu } 12925030321SMaruthi Srinivas Bayyavarapu 13025030321SMaruthi Srinivas Bayyavarapu val = cgs_read_register(cgs_dev, mmACP_PGFSM_READ_REG_0 + tile); 13125030321SMaruthi Srinivas Bayyavarapu val &= ACP_TILE_ON_MASK; 13225030321SMaruthi Srinivas Bayyavarapu 13325030321SMaruthi Srinivas Bayyavarapu if (val == 0x0) { 13425030321SMaruthi Srinivas Bayyavarapu val = cgs_read_register(cgs_dev, mmACP_PGFSM_RETAIN_REG); 13525030321SMaruthi Srinivas Bayyavarapu val = val | (1 << tile); 13625030321SMaruthi Srinivas Bayyavarapu cgs_write_register(cgs_dev, mmACP_PGFSM_RETAIN_REG, val); 13725030321SMaruthi Srinivas Bayyavarapu cgs_write_register(cgs_dev, mmACP_PGFSM_CONFIG_REG, 13825030321SMaruthi Srinivas Bayyavarapu 0x500 + tile); 13925030321SMaruthi Srinivas Bayyavarapu 14025030321SMaruthi Srinivas Bayyavarapu count = ACP_TIMEOUT_LOOP; 14125030321SMaruthi Srinivas Bayyavarapu while (true) { 14225030321SMaruthi Srinivas Bayyavarapu val = cgs_read_register(cgs_dev, mmACP_PGFSM_READ_REG_0 14325030321SMaruthi Srinivas Bayyavarapu + tile); 14425030321SMaruthi Srinivas Bayyavarapu val = val & ACP_TILE_ON_MASK; 14525030321SMaruthi Srinivas Bayyavarapu if (val == ACP_TILE_OFF_MASK) 14625030321SMaruthi Srinivas Bayyavarapu break; 14725030321SMaruthi Srinivas Bayyavarapu if (--count == 0) { 14825030321SMaruthi Srinivas Bayyavarapu pr_err("Timeout reading ACP PGFSM status\n"); 14925030321SMaruthi Srinivas Bayyavarapu return -ETIMEDOUT; 15025030321SMaruthi Srinivas Bayyavarapu } 15125030321SMaruthi Srinivas Bayyavarapu udelay(100); 15225030321SMaruthi Srinivas Bayyavarapu } 15325030321SMaruthi Srinivas Bayyavarapu 15425030321SMaruthi Srinivas Bayyavarapu val = cgs_read_register(cgs_dev, mmACP_PGFSM_RETAIN_REG); 15525030321SMaruthi Srinivas Bayyavarapu 15625030321SMaruthi Srinivas Bayyavarapu val |= ACP_TILE_OFF_RETAIN_REG_MASK; 15725030321SMaruthi Srinivas Bayyavarapu cgs_write_register(cgs_dev, mmACP_PGFSM_RETAIN_REG, val); 15825030321SMaruthi Srinivas Bayyavarapu } 15925030321SMaruthi Srinivas Bayyavarapu return 0; 16025030321SMaruthi Srinivas Bayyavarapu } 16125030321SMaruthi Srinivas Bayyavarapu 16225030321SMaruthi Srinivas Bayyavarapu /* power on a tile/block within ACP */ 16325030321SMaruthi Srinivas Bayyavarapu static int acp_resume_tile(void *cgs_dev, int tile) 16425030321SMaruthi Srinivas Bayyavarapu { 16525030321SMaruthi Srinivas Bayyavarapu u32 val = 0; 16625030321SMaruthi Srinivas Bayyavarapu u32 count = 0; 16725030321SMaruthi Srinivas Bayyavarapu 16825030321SMaruthi Srinivas Bayyavarapu if ((tile < ACP_TILE_P1) || (tile > ACP_TILE_DSP2)) { 16925030321SMaruthi Srinivas Bayyavarapu pr_err("Invalid ACP tile to resume\n"); 17025030321SMaruthi Srinivas Bayyavarapu return -1; 17125030321SMaruthi Srinivas Bayyavarapu } 17225030321SMaruthi Srinivas Bayyavarapu 17325030321SMaruthi Srinivas Bayyavarapu val = cgs_read_register(cgs_dev, mmACP_PGFSM_READ_REG_0 + tile); 17425030321SMaruthi Srinivas Bayyavarapu val = val & ACP_TILE_ON_MASK; 17525030321SMaruthi Srinivas Bayyavarapu 17625030321SMaruthi Srinivas Bayyavarapu if (val != 0x0) { 17725030321SMaruthi Srinivas Bayyavarapu cgs_write_register(cgs_dev, mmACP_PGFSM_CONFIG_REG, 17825030321SMaruthi Srinivas Bayyavarapu 0x600 + tile); 17925030321SMaruthi Srinivas Bayyavarapu count = ACP_TIMEOUT_LOOP; 18025030321SMaruthi Srinivas Bayyavarapu while (true) { 18125030321SMaruthi Srinivas Bayyavarapu val = cgs_read_register(cgs_dev, mmACP_PGFSM_READ_REG_0 18225030321SMaruthi Srinivas Bayyavarapu + tile); 18325030321SMaruthi Srinivas Bayyavarapu val = val & ACP_TILE_ON_MASK; 18425030321SMaruthi Srinivas Bayyavarapu if (val == 0x0) 18525030321SMaruthi Srinivas Bayyavarapu break; 18625030321SMaruthi Srinivas Bayyavarapu if (--count == 0) { 18725030321SMaruthi Srinivas Bayyavarapu pr_err("Timeout reading ACP PGFSM status\n"); 18825030321SMaruthi Srinivas Bayyavarapu return -ETIMEDOUT; 18925030321SMaruthi Srinivas Bayyavarapu } 19025030321SMaruthi Srinivas Bayyavarapu udelay(100); 19125030321SMaruthi Srinivas Bayyavarapu } 19225030321SMaruthi Srinivas Bayyavarapu val = cgs_read_register(cgs_dev, mmACP_PGFSM_RETAIN_REG); 19325030321SMaruthi Srinivas Bayyavarapu if (tile == ACP_TILE_P1) 19425030321SMaruthi Srinivas Bayyavarapu val = val & (ACP_TILE_P1_MASK); 19525030321SMaruthi Srinivas Bayyavarapu else if (tile == ACP_TILE_P2) 19625030321SMaruthi Srinivas Bayyavarapu val = val & (ACP_TILE_P2_MASK); 19725030321SMaruthi Srinivas Bayyavarapu 19825030321SMaruthi Srinivas Bayyavarapu cgs_write_register(cgs_dev, mmACP_PGFSM_RETAIN_REG, val); 19925030321SMaruthi Srinivas Bayyavarapu } 20025030321SMaruthi Srinivas Bayyavarapu return 0; 20125030321SMaruthi Srinivas Bayyavarapu } 20225030321SMaruthi Srinivas Bayyavarapu 20325030321SMaruthi Srinivas Bayyavarapu struct acp_pm_domain { 20425030321SMaruthi Srinivas Bayyavarapu void *cgs_dev; 20525030321SMaruthi Srinivas Bayyavarapu struct generic_pm_domain gpd; 20625030321SMaruthi Srinivas Bayyavarapu }; 20725030321SMaruthi Srinivas Bayyavarapu 20825030321SMaruthi Srinivas Bayyavarapu static int acp_poweroff(struct generic_pm_domain *genpd) 20925030321SMaruthi Srinivas Bayyavarapu { 21025030321SMaruthi Srinivas Bayyavarapu int i, ret; 21125030321SMaruthi Srinivas Bayyavarapu struct acp_pm_domain *apd; 21225030321SMaruthi Srinivas Bayyavarapu 21325030321SMaruthi Srinivas Bayyavarapu apd = container_of(genpd, struct acp_pm_domain, gpd); 21425030321SMaruthi Srinivas Bayyavarapu if (apd != NULL) { 21525030321SMaruthi Srinivas Bayyavarapu /* Donot return abruptly if any of power tile fails to suspend. 21625030321SMaruthi Srinivas Bayyavarapu * Log it and continue powering off other tile 21725030321SMaruthi Srinivas Bayyavarapu */ 21825030321SMaruthi Srinivas Bayyavarapu for (i = 4; i >= 0 ; i--) { 21925030321SMaruthi Srinivas Bayyavarapu ret = acp_suspend_tile(apd->cgs_dev, ACP_TILE_P1 + i); 22025030321SMaruthi Srinivas Bayyavarapu if (ret) 22125030321SMaruthi Srinivas Bayyavarapu pr_err("ACP tile %d tile suspend failed\n", i); 22225030321SMaruthi Srinivas Bayyavarapu } 22325030321SMaruthi Srinivas Bayyavarapu } 22425030321SMaruthi Srinivas Bayyavarapu return 0; 22525030321SMaruthi Srinivas Bayyavarapu } 22625030321SMaruthi Srinivas Bayyavarapu 22725030321SMaruthi Srinivas Bayyavarapu static int acp_poweron(struct generic_pm_domain *genpd) 22825030321SMaruthi Srinivas Bayyavarapu { 22925030321SMaruthi Srinivas Bayyavarapu int i, ret; 23025030321SMaruthi Srinivas Bayyavarapu struct acp_pm_domain *apd; 23125030321SMaruthi Srinivas Bayyavarapu 23225030321SMaruthi Srinivas Bayyavarapu apd = container_of(genpd, struct acp_pm_domain, gpd); 23325030321SMaruthi Srinivas Bayyavarapu if (apd != NULL) { 23425030321SMaruthi Srinivas Bayyavarapu for (i = 0; i < 2; i++) { 23525030321SMaruthi Srinivas Bayyavarapu ret = acp_resume_tile(apd->cgs_dev, ACP_TILE_P1 + i); 23625030321SMaruthi Srinivas Bayyavarapu if (ret) { 23725030321SMaruthi Srinivas Bayyavarapu pr_err("ACP tile %d resume failed\n", i); 23825030321SMaruthi Srinivas Bayyavarapu break; 23925030321SMaruthi Srinivas Bayyavarapu } 24025030321SMaruthi Srinivas Bayyavarapu } 24125030321SMaruthi Srinivas Bayyavarapu 24225030321SMaruthi Srinivas Bayyavarapu /* Disable DSPs which are not going to be used */ 24325030321SMaruthi Srinivas Bayyavarapu for (i = 0; i < 3; i++) { 24425030321SMaruthi Srinivas Bayyavarapu ret = acp_suspend_tile(apd->cgs_dev, ACP_TILE_DSP0 + i); 24525030321SMaruthi Srinivas Bayyavarapu /* Continue suspending other DSP, even if one fails */ 24625030321SMaruthi Srinivas Bayyavarapu if (ret) 24725030321SMaruthi Srinivas Bayyavarapu pr_err("ACP DSP %d suspend failed\n", i); 24825030321SMaruthi Srinivas Bayyavarapu } 24925030321SMaruthi Srinivas Bayyavarapu } 25025030321SMaruthi Srinivas Bayyavarapu return 0; 25125030321SMaruthi Srinivas Bayyavarapu } 25225030321SMaruthi Srinivas Bayyavarapu 25325030321SMaruthi Srinivas Bayyavarapu static struct device *get_mfd_cell_dev(const char *device_name, int r) 25425030321SMaruthi Srinivas Bayyavarapu { 25525030321SMaruthi Srinivas Bayyavarapu char auto_dev_name[25]; 25625030321SMaruthi Srinivas Bayyavarapu struct device *dev; 25725030321SMaruthi Srinivas Bayyavarapu 258a65ecc40SDan Carpenter snprintf(auto_dev_name, sizeof(auto_dev_name), 259a65ecc40SDan Carpenter "%s.%d.auto", device_name, r); 26025030321SMaruthi Srinivas Bayyavarapu dev = bus_find_device_by_name(&platform_bus_type, NULL, auto_dev_name); 26125030321SMaruthi Srinivas Bayyavarapu dev_info(dev, "device %s added to pm domain\n", auto_dev_name); 26225030321SMaruthi Srinivas Bayyavarapu 26325030321SMaruthi Srinivas Bayyavarapu return dev; 26425030321SMaruthi Srinivas Bayyavarapu } 26525030321SMaruthi Srinivas Bayyavarapu 266a8fe58ceSMaruthi Bayyavarapu /** 267a8fe58ceSMaruthi Bayyavarapu * acp_hw_init - start and test ACP block 268a8fe58ceSMaruthi Bayyavarapu * 269a8fe58ceSMaruthi Bayyavarapu * @adev: amdgpu_device pointer 270a8fe58ceSMaruthi Bayyavarapu * 271a8fe58ceSMaruthi Bayyavarapu */ 272a8fe58ceSMaruthi Bayyavarapu static int acp_hw_init(void *handle) 273a8fe58ceSMaruthi Bayyavarapu { 27425030321SMaruthi Srinivas Bayyavarapu int r, i; 275a8fe58ceSMaruthi Bayyavarapu uint64_t acp_base; 27637c5f2c9SAkshu Agrawal u32 val = 0; 27737c5f2c9SAkshu Agrawal u32 count = 0; 27825030321SMaruthi Srinivas Bayyavarapu struct device *dev; 279a8fe58ceSMaruthi Bayyavarapu struct i2s_platform_data *i2s_pdata; 280a8fe58ceSMaruthi Bayyavarapu 281a8fe58ceSMaruthi Bayyavarapu struct amdgpu_device *adev = (struct amdgpu_device *)handle; 282a8fe58ceSMaruthi Bayyavarapu 283a1255107SAlex Deucher const struct amdgpu_ip_block *ip_block = 2842990a1fcSAlex Deucher amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_ACP); 285a8fe58ceSMaruthi Bayyavarapu 286a1255107SAlex Deucher if (!ip_block) 287a8fe58ceSMaruthi Bayyavarapu return -EINVAL; 288a8fe58ceSMaruthi Bayyavarapu 289a8fe58ceSMaruthi Bayyavarapu r = amd_acp_hw_init(adev->acp.cgs_device, 290a1255107SAlex Deucher ip_block->version->major, ip_block->version->minor); 291a8fe58ceSMaruthi Bayyavarapu /* -ENODEV means board uses AZ rather than ACP */ 292be2d6aa5SRex Zhu if (r == -ENODEV) { 293be2d6aa5SRex Zhu amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true); 294a8fe58ceSMaruthi Bayyavarapu return 0; 295be2d6aa5SRex Zhu } else if (r) { 296a8fe58ceSMaruthi Bayyavarapu return r; 297be2d6aa5SRex Zhu } 298a8fe58ceSMaruthi Bayyavarapu 299d32d6617SRex Zhu if (adev->rmmio_size == 0 || adev->rmmio_size < 0x5289) 300d32d6617SRex Zhu return -EINVAL; 301d32d6617SRex Zhu 302d32d6617SRex Zhu acp_base = adev->rmmio_base; 303d32d6617SRex Zhu 30443bb3a6dSVijendar Mukunda if (adev->asic_type != CHIP_STONEY) { 30525030321SMaruthi Srinivas Bayyavarapu adev->acp.acp_genpd = kzalloc(sizeof(struct acp_pm_domain), GFP_KERNEL); 30625030321SMaruthi Srinivas Bayyavarapu if (adev->acp.acp_genpd == NULL) 30725030321SMaruthi Srinivas Bayyavarapu return -ENOMEM; 30825030321SMaruthi Srinivas Bayyavarapu 30925030321SMaruthi Srinivas Bayyavarapu adev->acp.acp_genpd->gpd.name = "ACP_AUDIO"; 31025030321SMaruthi Srinivas Bayyavarapu adev->acp.acp_genpd->gpd.power_off = acp_poweroff; 31125030321SMaruthi Srinivas Bayyavarapu adev->acp.acp_genpd->gpd.power_on = acp_poweron; 31225030321SMaruthi Srinivas Bayyavarapu 31325030321SMaruthi Srinivas Bayyavarapu 31425030321SMaruthi Srinivas Bayyavarapu adev->acp.acp_genpd->cgs_dev = adev->acp.cgs_device; 31525030321SMaruthi Srinivas Bayyavarapu 31625030321SMaruthi Srinivas Bayyavarapu pm_genpd_init(&adev->acp.acp_genpd->gpd, NULL, false); 31743bb3a6dSVijendar Mukunda } 31825030321SMaruthi Srinivas Bayyavarapu 3196396bb22SKees Cook adev->acp.acp_cell = kcalloc(ACP_DEVS, sizeof(struct mfd_cell), 320a8fe58ceSMaruthi Bayyavarapu GFP_KERNEL); 321a8fe58ceSMaruthi Bayyavarapu 322a8fe58ceSMaruthi Bayyavarapu if (adev->acp.acp_cell == NULL) 323a8fe58ceSMaruthi Bayyavarapu return -ENOMEM; 324a8fe58ceSMaruthi Bayyavarapu 3252d95ceb4SVijendar Mukunda adev->acp.acp_res = kcalloc(5, sizeof(struct resource), GFP_KERNEL); 326a8fe58ceSMaruthi Bayyavarapu if (adev->acp.acp_res == NULL) { 327a8fe58ceSMaruthi Bayyavarapu kfree(adev->acp.acp_cell); 328a8fe58ceSMaruthi Bayyavarapu return -ENOMEM; 329a8fe58ceSMaruthi Bayyavarapu } 330a8fe58ceSMaruthi Bayyavarapu 3312d95ceb4SVijendar Mukunda i2s_pdata = kcalloc(3, sizeof(struct i2s_platform_data), GFP_KERNEL); 332a8fe58ceSMaruthi Bayyavarapu if (i2s_pdata == NULL) { 333a8fe58ceSMaruthi Bayyavarapu kfree(adev->acp.acp_res); 334a8fe58ceSMaruthi Bayyavarapu kfree(adev->acp.acp_cell); 335a8fe58ceSMaruthi Bayyavarapu return -ENOMEM; 336a8fe58ceSMaruthi Bayyavarapu } 337a8fe58ceSMaruthi Bayyavarapu 33881454cadSVijendar Mukunda switch (adev->asic_type) { 33981454cadSVijendar Mukunda case CHIP_STONEY: 34081454cadSVijendar Mukunda i2s_pdata[0].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET | 34181454cadSVijendar Mukunda DW_I2S_QUIRK_16BIT_IDX_OVERRIDE; 34281454cadSVijendar Mukunda break; 34381454cadSVijendar Mukunda default: 344a8fe58ceSMaruthi Bayyavarapu i2s_pdata[0].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET; 34581454cadSVijendar Mukunda } 346a8fe58ceSMaruthi Bayyavarapu i2s_pdata[0].cap = DWC_I2S_PLAY; 347a8fe58ceSMaruthi Bayyavarapu i2s_pdata[0].snd_rates = SNDRV_PCM_RATE_8000_96000; 348a8fe58ceSMaruthi Bayyavarapu i2s_pdata[0].i2s_reg_comp1 = ACP_I2S_COMP1_PLAY_REG_OFFSET; 349a8fe58ceSMaruthi Bayyavarapu i2s_pdata[0].i2s_reg_comp2 = ACP_I2S_COMP2_PLAY_REG_OFFSET; 35081454cadSVijendar Mukunda switch (adev->asic_type) { 35181454cadSVijendar Mukunda case CHIP_STONEY: 35281454cadSVijendar Mukunda i2s_pdata[1].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET | 35381454cadSVijendar Mukunda DW_I2S_QUIRK_COMP_PARAM1 | 35481454cadSVijendar Mukunda DW_I2S_QUIRK_16BIT_IDX_OVERRIDE; 35581454cadSVijendar Mukunda break; 35681454cadSVijendar Mukunda default: 357a8fe58ceSMaruthi Bayyavarapu i2s_pdata[1].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET | 358a8fe58ceSMaruthi Bayyavarapu DW_I2S_QUIRK_COMP_PARAM1; 35981454cadSVijendar Mukunda } 36081454cadSVijendar Mukunda 361a8fe58ceSMaruthi Bayyavarapu i2s_pdata[1].cap = DWC_I2S_RECORD; 362a8fe58ceSMaruthi Bayyavarapu i2s_pdata[1].snd_rates = SNDRV_PCM_RATE_8000_96000; 363a8fe58ceSMaruthi Bayyavarapu i2s_pdata[1].i2s_reg_comp1 = ACP_I2S_COMP1_CAP_REG_OFFSET; 364a8fe58ceSMaruthi Bayyavarapu i2s_pdata[1].i2s_reg_comp2 = ACP_I2S_COMP2_CAP_REG_OFFSET; 365a8fe58ceSMaruthi Bayyavarapu 3662d95ceb4SVijendar Mukunda i2s_pdata[2].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET; 3672d95ceb4SVijendar Mukunda switch (adev->asic_type) { 3682d95ceb4SVijendar Mukunda case CHIP_STONEY: 3692d95ceb4SVijendar Mukunda i2s_pdata[2].quirks |= DW_I2S_QUIRK_16BIT_IDX_OVERRIDE; 3702d95ceb4SVijendar Mukunda break; 3712d95ceb4SVijendar Mukunda default: 3722d95ceb4SVijendar Mukunda break; 3732d95ceb4SVijendar Mukunda } 3742d95ceb4SVijendar Mukunda 3752d95ceb4SVijendar Mukunda i2s_pdata[2].cap = DWC_I2S_PLAY | DWC_I2S_RECORD; 3762d95ceb4SVijendar Mukunda i2s_pdata[2].snd_rates = SNDRV_PCM_RATE_8000_96000; 3772d95ceb4SVijendar Mukunda i2s_pdata[2].i2s_reg_comp1 = ACP_BT_COMP1_REG_OFFSET; 3782d95ceb4SVijendar Mukunda i2s_pdata[2].i2s_reg_comp2 = ACP_BT_COMP2_REG_OFFSET; 3792d95ceb4SVijendar Mukunda 380a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[0].name = "acp2x_dma"; 381a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[0].flags = IORESOURCE_MEM; 382a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[0].start = acp_base; 383a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[0].end = acp_base + ACP_DMA_REGS_END; 384a8fe58ceSMaruthi Bayyavarapu 385a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[1].name = "acp2x_dw_i2s_play"; 386a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[1].flags = IORESOURCE_MEM; 387a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[1].start = acp_base + ACP_I2S_PLAY_REGS_START; 388a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[1].end = acp_base + ACP_I2S_PLAY_REGS_END; 389a8fe58ceSMaruthi Bayyavarapu 390a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[2].name = "acp2x_dw_i2s_cap"; 391a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[2].flags = IORESOURCE_MEM; 392a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[2].start = acp_base + ACP_I2S_CAP_REGS_START; 393a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_res[2].end = acp_base + ACP_I2S_CAP_REGS_END; 394a8fe58ceSMaruthi Bayyavarapu 3952d95ceb4SVijendar Mukunda adev->acp.acp_res[3].name = "acp2x_dw_bt_i2s_play_cap"; 3962d95ceb4SVijendar Mukunda adev->acp.acp_res[3].flags = IORESOURCE_MEM; 3972d95ceb4SVijendar Mukunda adev->acp.acp_res[3].start = acp_base + ACP_BT_PLAY_REGS_START; 3982d95ceb4SVijendar Mukunda adev->acp.acp_res[3].end = acp_base + ACP_BT_PLAY_REGS_END; 3992d95ceb4SVijendar Mukunda 4002d95ceb4SVijendar Mukunda adev->acp.acp_res[4].name = "acp2x_dma_irq"; 4012d95ceb4SVijendar Mukunda adev->acp.acp_res[4].flags = IORESOURCE_IRQ; 4022d95ceb4SVijendar Mukunda adev->acp.acp_res[4].start = amdgpu_irq_create_mapping(adev, 162); 4032d95ceb4SVijendar Mukunda adev->acp.acp_res[4].end = adev->acp.acp_res[4].start; 404a8fe58ceSMaruthi Bayyavarapu 405a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[0].name = "acp_audio_dma"; 4062d95ceb4SVijendar Mukunda adev->acp.acp_cell[0].num_resources = 5; 407a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[0].resources = &adev->acp.acp_res[0]; 4081fd16f36SVijendar Mukunda adev->acp.acp_cell[0].platform_data = &adev->asic_type; 4091fd16f36SVijendar Mukunda adev->acp.acp_cell[0].pdata_size = sizeof(adev->asic_type); 410a8fe58ceSMaruthi Bayyavarapu 411a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[1].name = "designware-i2s"; 412a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[1].num_resources = 1; 413a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[1].resources = &adev->acp.acp_res[1]; 414a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[1].platform_data = &i2s_pdata[0]; 415a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[1].pdata_size = sizeof(struct i2s_platform_data); 416a8fe58ceSMaruthi Bayyavarapu 417a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[2].name = "designware-i2s"; 418a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[2].num_resources = 1; 419a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[2].resources = &adev->acp.acp_res[2]; 420a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[2].platform_data = &i2s_pdata[1]; 421a8fe58ceSMaruthi Bayyavarapu adev->acp.acp_cell[2].pdata_size = sizeof(struct i2s_platform_data); 422a8fe58ceSMaruthi Bayyavarapu 4232d95ceb4SVijendar Mukunda adev->acp.acp_cell[3].name = "designware-i2s"; 4242d95ceb4SVijendar Mukunda adev->acp.acp_cell[3].num_resources = 1; 4252d95ceb4SVijendar Mukunda adev->acp.acp_cell[3].resources = &adev->acp.acp_res[3]; 4262d95ceb4SVijendar Mukunda adev->acp.acp_cell[3].platform_data = &i2s_pdata[2]; 4272d95ceb4SVijendar Mukunda adev->acp.acp_cell[3].pdata_size = sizeof(struct i2s_platform_data); 4282d95ceb4SVijendar Mukunda 429a8fe58ceSMaruthi Bayyavarapu r = mfd_add_hotplug_devices(adev->acp.parent, adev->acp.acp_cell, 430a8fe58ceSMaruthi Bayyavarapu ACP_DEVS); 431a8fe58ceSMaruthi Bayyavarapu if (r) 432a8fe58ceSMaruthi Bayyavarapu return r; 433a8fe58ceSMaruthi Bayyavarapu 43443bb3a6dSVijendar Mukunda if (adev->asic_type != CHIP_STONEY) { 43525030321SMaruthi Srinivas Bayyavarapu for (i = 0; i < ACP_DEVS ; i++) { 43625030321SMaruthi Srinivas Bayyavarapu dev = get_mfd_cell_dev(adev->acp.acp_cell[i].name, i); 43725030321SMaruthi Srinivas Bayyavarapu r = pm_genpd_add_device(&adev->acp.acp_genpd->gpd, dev); 43825030321SMaruthi Srinivas Bayyavarapu if (r) { 43925030321SMaruthi Srinivas Bayyavarapu dev_err(dev, "Failed to add dev to genpd\n"); 44025030321SMaruthi Srinivas Bayyavarapu return r; 44125030321SMaruthi Srinivas Bayyavarapu } 44225030321SMaruthi Srinivas Bayyavarapu } 44343bb3a6dSVijendar Mukunda } 44425030321SMaruthi Srinivas Bayyavarapu 44537c5f2c9SAkshu Agrawal /* Assert Soft reset of ACP */ 44637c5f2c9SAkshu Agrawal val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); 44737c5f2c9SAkshu Agrawal 44837c5f2c9SAkshu Agrawal val |= ACP_SOFT_RESET__SoftResetAud_MASK; 44937c5f2c9SAkshu Agrawal cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); 45037c5f2c9SAkshu Agrawal 45137c5f2c9SAkshu Agrawal count = ACP_SOFT_RESET_DONE_TIME_OUT_VALUE; 45237c5f2c9SAkshu Agrawal while (true) { 45337c5f2c9SAkshu Agrawal val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); 45437c5f2c9SAkshu Agrawal if (ACP_SOFT_RESET__SoftResetAudDone_MASK == 45537c5f2c9SAkshu Agrawal (val & ACP_SOFT_RESET__SoftResetAudDone_MASK)) 45637c5f2c9SAkshu Agrawal break; 45737c5f2c9SAkshu Agrawal if (--count == 0) { 45837c5f2c9SAkshu Agrawal dev_err(&adev->pdev->dev, "Failed to reset ACP\n"); 45937c5f2c9SAkshu Agrawal return -ETIMEDOUT; 46037c5f2c9SAkshu Agrawal } 46137c5f2c9SAkshu Agrawal udelay(100); 46237c5f2c9SAkshu Agrawal } 46337c5f2c9SAkshu Agrawal /* Enable clock to ACP and wait until the clock is enabled */ 46437c5f2c9SAkshu Agrawal val = cgs_read_register(adev->acp.cgs_device, mmACP_CONTROL); 46537c5f2c9SAkshu Agrawal val = val | ACP_CONTROL__ClkEn_MASK; 46637c5f2c9SAkshu Agrawal cgs_write_register(adev->acp.cgs_device, mmACP_CONTROL, val); 46737c5f2c9SAkshu Agrawal 46837c5f2c9SAkshu Agrawal count = ACP_CLOCK_EN_TIME_OUT_VALUE; 46937c5f2c9SAkshu Agrawal 47037c5f2c9SAkshu Agrawal while (true) { 47137c5f2c9SAkshu Agrawal val = cgs_read_register(adev->acp.cgs_device, mmACP_STATUS); 47237c5f2c9SAkshu Agrawal if (val & (u32) 0x1) 47337c5f2c9SAkshu Agrawal break; 47437c5f2c9SAkshu Agrawal if (--count == 0) { 47537c5f2c9SAkshu Agrawal dev_err(&adev->pdev->dev, "Failed to reset ACP\n"); 47637c5f2c9SAkshu Agrawal return -ETIMEDOUT; 47737c5f2c9SAkshu Agrawal } 47837c5f2c9SAkshu Agrawal udelay(100); 47937c5f2c9SAkshu Agrawal } 48037c5f2c9SAkshu Agrawal /* Deassert the SOFT RESET flags */ 48137c5f2c9SAkshu Agrawal val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); 48237c5f2c9SAkshu Agrawal val &= ~ACP_SOFT_RESET__SoftResetAud_MASK; 48337c5f2c9SAkshu Agrawal cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); 484a8fe58ceSMaruthi Bayyavarapu return 0; 485a8fe58ceSMaruthi Bayyavarapu } 486a8fe58ceSMaruthi Bayyavarapu 487a8fe58ceSMaruthi Bayyavarapu /** 488a8fe58ceSMaruthi Bayyavarapu * acp_hw_fini - stop the hardware block 489a8fe58ceSMaruthi Bayyavarapu * 490a8fe58ceSMaruthi Bayyavarapu * @adev: amdgpu_device pointer 491a8fe58ceSMaruthi Bayyavarapu * 492a8fe58ceSMaruthi Bayyavarapu */ 493a8fe58ceSMaruthi Bayyavarapu static int acp_hw_fini(void *handle) 494a8fe58ceSMaruthi Bayyavarapu { 49525030321SMaruthi Srinivas Bayyavarapu int i, ret; 49637c5f2c9SAkshu Agrawal u32 val = 0; 49737c5f2c9SAkshu Agrawal u32 count = 0; 49825030321SMaruthi Srinivas Bayyavarapu struct device *dev; 499a8fe58ceSMaruthi Bayyavarapu struct amdgpu_device *adev = (struct amdgpu_device *)handle; 500a8fe58ceSMaruthi Bayyavarapu 501757124d9SAlex Deucher /* return early if no ACP */ 502be2d6aa5SRex Zhu if (!adev->acp.acp_cell) { 503be2d6aa5SRex Zhu amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, false); 504757124d9SAlex Deucher return 0; 505be2d6aa5SRex Zhu } 506757124d9SAlex Deucher 50737c5f2c9SAkshu Agrawal /* Assert Soft reset of ACP */ 50837c5f2c9SAkshu Agrawal val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); 50937c5f2c9SAkshu Agrawal 51037c5f2c9SAkshu Agrawal val |= ACP_SOFT_RESET__SoftResetAud_MASK; 51137c5f2c9SAkshu Agrawal cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); 51237c5f2c9SAkshu Agrawal 51337c5f2c9SAkshu Agrawal count = ACP_SOFT_RESET_DONE_TIME_OUT_VALUE; 51437c5f2c9SAkshu Agrawal while (true) { 51537c5f2c9SAkshu Agrawal val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); 51637c5f2c9SAkshu Agrawal if (ACP_SOFT_RESET__SoftResetAudDone_MASK == 51737c5f2c9SAkshu Agrawal (val & ACP_SOFT_RESET__SoftResetAudDone_MASK)) 51837c5f2c9SAkshu Agrawal break; 51937c5f2c9SAkshu Agrawal if (--count == 0) { 52037c5f2c9SAkshu Agrawal dev_err(&adev->pdev->dev, "Failed to reset ACP\n"); 52137c5f2c9SAkshu Agrawal return -ETIMEDOUT; 52237c5f2c9SAkshu Agrawal } 52337c5f2c9SAkshu Agrawal udelay(100); 52437c5f2c9SAkshu Agrawal } 52537c5f2c9SAkshu Agrawal /* Disable ACP clock */ 52637c5f2c9SAkshu Agrawal val = cgs_read_register(adev->acp.cgs_device, mmACP_CONTROL); 52737c5f2c9SAkshu Agrawal val &= ~ACP_CONTROL__ClkEn_MASK; 52837c5f2c9SAkshu Agrawal cgs_write_register(adev->acp.cgs_device, mmACP_CONTROL, val); 52937c5f2c9SAkshu Agrawal 53037c5f2c9SAkshu Agrawal count = ACP_CLOCK_EN_TIME_OUT_VALUE; 53137c5f2c9SAkshu Agrawal 53237c5f2c9SAkshu Agrawal while (true) { 53337c5f2c9SAkshu Agrawal val = cgs_read_register(adev->acp.cgs_device, mmACP_STATUS); 53437c5f2c9SAkshu Agrawal if (val & (u32) 0x1) 53537c5f2c9SAkshu Agrawal break; 53637c5f2c9SAkshu Agrawal if (--count == 0) { 53737c5f2c9SAkshu Agrawal dev_err(&adev->pdev->dev, "Failed to reset ACP\n"); 53837c5f2c9SAkshu Agrawal return -ETIMEDOUT; 53937c5f2c9SAkshu Agrawal } 54037c5f2c9SAkshu Agrawal udelay(100); 54137c5f2c9SAkshu Agrawal } 54237c5f2c9SAkshu Agrawal 54343bb3a6dSVijendar Mukunda if (adev->acp.acp_genpd) { 54425030321SMaruthi Srinivas Bayyavarapu for (i = 0; i < ACP_DEVS ; i++) { 54525030321SMaruthi Srinivas Bayyavarapu dev = get_mfd_cell_dev(adev->acp.acp_cell[i].name, i); 546924f4486SUlf Hansson ret = pm_genpd_remove_device(dev); 54725030321SMaruthi Srinivas Bayyavarapu /* If removal fails, dont giveup and try rest */ 54825030321SMaruthi Srinivas Bayyavarapu if (ret) 54925030321SMaruthi Srinivas Bayyavarapu dev_err(dev, "remove dev from genpd failed\n"); 55025030321SMaruthi Srinivas Bayyavarapu } 55143bb3a6dSVijendar Mukunda kfree(adev->acp.acp_genpd); 55243bb3a6dSVijendar Mukunda } 55325030321SMaruthi Srinivas Bayyavarapu 554a8fe58ceSMaruthi Bayyavarapu mfd_remove_devices(adev->acp.parent); 555a8fe58ceSMaruthi Bayyavarapu kfree(adev->acp.acp_res); 556a8fe58ceSMaruthi Bayyavarapu kfree(adev->acp.acp_cell); 557a8fe58ceSMaruthi Bayyavarapu 558a8fe58ceSMaruthi Bayyavarapu return 0; 559a8fe58ceSMaruthi Bayyavarapu } 560a8fe58ceSMaruthi Bayyavarapu 561a8fe58ceSMaruthi Bayyavarapu static int acp_suspend(void *handle) 562a8fe58ceSMaruthi Bayyavarapu { 563be2d6aa5SRex Zhu struct amdgpu_device *adev = (struct amdgpu_device *)handle; 564be2d6aa5SRex Zhu 565be2d6aa5SRex Zhu /* power up on suspend */ 566be2d6aa5SRex Zhu if (!adev->acp.acp_cell) 567be2d6aa5SRex Zhu amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, false); 568a8fe58ceSMaruthi Bayyavarapu return 0; 569a8fe58ceSMaruthi Bayyavarapu } 570a8fe58ceSMaruthi Bayyavarapu 571a8fe58ceSMaruthi Bayyavarapu static int acp_resume(void *handle) 572a8fe58ceSMaruthi Bayyavarapu { 573be2d6aa5SRex Zhu struct amdgpu_device *adev = (struct amdgpu_device *)handle; 574be2d6aa5SRex Zhu 575be2d6aa5SRex Zhu /* power down again on resume */ 576be2d6aa5SRex Zhu if (!adev->acp.acp_cell) 577be2d6aa5SRex Zhu amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true); 578a8fe58ceSMaruthi Bayyavarapu return 0; 579a8fe58ceSMaruthi Bayyavarapu } 580a8fe58ceSMaruthi Bayyavarapu 581a8fe58ceSMaruthi Bayyavarapu static int acp_early_init(void *handle) 582a8fe58ceSMaruthi Bayyavarapu { 583a8fe58ceSMaruthi Bayyavarapu return 0; 584a8fe58ceSMaruthi Bayyavarapu } 585a8fe58ceSMaruthi Bayyavarapu 586a8fe58ceSMaruthi Bayyavarapu static bool acp_is_idle(void *handle) 587a8fe58ceSMaruthi Bayyavarapu { 588a8fe58ceSMaruthi Bayyavarapu return true; 589a8fe58ceSMaruthi Bayyavarapu } 590a8fe58ceSMaruthi Bayyavarapu 591a8fe58ceSMaruthi Bayyavarapu static int acp_wait_for_idle(void *handle) 592a8fe58ceSMaruthi Bayyavarapu { 593a8fe58ceSMaruthi Bayyavarapu return 0; 594a8fe58ceSMaruthi Bayyavarapu } 595a8fe58ceSMaruthi Bayyavarapu 596a8fe58ceSMaruthi Bayyavarapu static int acp_soft_reset(void *handle) 597a8fe58ceSMaruthi Bayyavarapu { 598a8fe58ceSMaruthi Bayyavarapu return 0; 599a8fe58ceSMaruthi Bayyavarapu } 600a8fe58ceSMaruthi Bayyavarapu 601a8fe58ceSMaruthi Bayyavarapu static int acp_set_clockgating_state(void *handle, 602a8fe58ceSMaruthi Bayyavarapu enum amd_clockgating_state state) 603a8fe58ceSMaruthi Bayyavarapu { 604a8fe58ceSMaruthi Bayyavarapu return 0; 605a8fe58ceSMaruthi Bayyavarapu } 606a8fe58ceSMaruthi Bayyavarapu 607a8fe58ceSMaruthi Bayyavarapu static int acp_set_powergating_state(void *handle, 608a8fe58ceSMaruthi Bayyavarapu enum amd_powergating_state state) 609a8fe58ceSMaruthi Bayyavarapu { 610a8fe58ceSMaruthi Bayyavarapu return 0; 611a8fe58ceSMaruthi Bayyavarapu } 612a8fe58ceSMaruthi Bayyavarapu 613a1255107SAlex Deucher static const struct amd_ip_funcs acp_ip_funcs = { 61488a907d6STom St Denis .name = "acp_ip", 615a8fe58ceSMaruthi Bayyavarapu .early_init = acp_early_init, 616a8fe58ceSMaruthi Bayyavarapu .late_init = NULL, 617a8fe58ceSMaruthi Bayyavarapu .sw_init = acp_sw_init, 618a8fe58ceSMaruthi Bayyavarapu .sw_fini = acp_sw_fini, 619a8fe58ceSMaruthi Bayyavarapu .hw_init = acp_hw_init, 620a8fe58ceSMaruthi Bayyavarapu .hw_fini = acp_hw_fini, 621a8fe58ceSMaruthi Bayyavarapu .suspend = acp_suspend, 622a8fe58ceSMaruthi Bayyavarapu .resume = acp_resume, 623a8fe58ceSMaruthi Bayyavarapu .is_idle = acp_is_idle, 624a8fe58ceSMaruthi Bayyavarapu .wait_for_idle = acp_wait_for_idle, 625a8fe58ceSMaruthi Bayyavarapu .soft_reset = acp_soft_reset, 626a8fe58ceSMaruthi Bayyavarapu .set_clockgating_state = acp_set_clockgating_state, 627a8fe58ceSMaruthi Bayyavarapu .set_powergating_state = acp_set_powergating_state, 628a8fe58ceSMaruthi Bayyavarapu }; 629a1255107SAlex Deucher 630a1255107SAlex Deucher const struct amdgpu_ip_block_version acp_ip_block = 631a1255107SAlex Deucher { 632a1255107SAlex Deucher .type = AMD_IP_BLOCK_TYPE_ACP, 633a1255107SAlex Deucher .major = 2, 634a1255107SAlex Deucher .minor = 2, 635a1255107SAlex Deucher .rev = 0, 636a1255107SAlex Deucher .funcs = &acp_ip_funcs, 637a1255107SAlex Deucher }; 638