1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2013 TangoTec Ltd. 4 * Author: Baruch Siach <baruch@tkos.co.il> 5 * 6 * Driver for the Xtensa LX4 GPIO32 Option 7 * 8 * Documentation: Xtensa LX4 Microprocessor Data Book, Section 2.22 9 * 10 * GPIO32 is a standard optional extension to the Xtensa architecture core that 11 * provides preconfigured output and input ports for intra SoC signaling. The 12 * GPIO32 option is implemented as 32bit Tensilica Instruction Extension (TIE) 13 * output state called EXPSTATE, and 32bit input wire called IMPWIRE. This 14 * driver treats input and output states as two distinct devices. 15 * 16 * Access to GPIO32 specific instructions is controlled by the CPENABLE 17 * (Coprocessor Enable Bits) register. By default Xtensa Linux startup code 18 * disables access to all coprocessors. This driver sets the CPENABLE bit 19 * corresponding to GPIO32 before any GPIO32 specific instruction, and restores 20 * CPENABLE state after that. 21 * 22 * This driver is currently incompatible with SMP. The GPIO32 extension is not 23 * guaranteed to be available in all cores. Moreover, each core controls a 24 * different set of IO wires. A theoretical SMP aware version of this driver 25 * would need to have a per core workqueue to do the actual GPIO manipulation. 26 */ 27 28 #include <linux/err.h> 29 #include <linux/module.h> 30 #include <linux/gpio/driver.h> 31 #include <linux/bitops.h> 32 #include <linux/platform_device.h> 33 34 #include <asm/coprocessor.h> /* CPENABLE read/write macros */ 35 36 #ifndef XCHAL_CP_ID_XTIOP 37 #error GPIO32 option is not enabled for your xtensa core variant 38 #endif 39 40 #if XCHAL_HAVE_CP 41 42 static inline unsigned long enable_cp(unsigned long *cpenable) 43 { 44 unsigned long flags; 45 46 local_irq_save(flags); 47 RSR_CPENABLE(*cpenable); 48 WSR_CPENABLE(*cpenable | BIT(XCHAL_CP_ID_XTIOP)); 49 50 return flags; 51 } 52 53 static inline void disable_cp(unsigned long flags, unsigned long cpenable) 54 { 55 WSR_CPENABLE(cpenable); 56 local_irq_restore(flags); 57 } 58 59 #else 60 61 static inline unsigned long enable_cp(unsigned long *cpenable) 62 { 63 *cpenable = 0; /* avoid uninitialized value warning */ 64 return 0; 65 } 66 67 static inline void disable_cp(unsigned long flags, unsigned long cpenable) 68 { 69 } 70 71 #endif /* XCHAL_HAVE_CP */ 72 73 static int xtensa_impwire_get_direction(struct gpio_chip *gc, unsigned offset) 74 { 75 return 1; /* input only */ 76 } 77 78 static int xtensa_impwire_get_value(struct gpio_chip *gc, unsigned offset) 79 { 80 unsigned long flags, saved_cpenable; 81 u32 impwire; 82 83 flags = enable_cp(&saved_cpenable); 84 __asm__ __volatile__("read_impwire %0" : "=a" (impwire)); 85 disable_cp(flags, saved_cpenable); 86 87 return !!(impwire & BIT(offset)); 88 } 89 90 static void xtensa_impwire_set_value(struct gpio_chip *gc, unsigned offset, 91 int value) 92 { 93 BUG(); /* output only; should never be called */ 94 } 95 96 static int xtensa_expstate_get_direction(struct gpio_chip *gc, unsigned offset) 97 { 98 return 0; /* output only */ 99 } 100 101 static int xtensa_expstate_get_value(struct gpio_chip *gc, unsigned offset) 102 { 103 unsigned long flags, saved_cpenable; 104 u32 expstate; 105 106 flags = enable_cp(&saved_cpenable); 107 __asm__ __volatile__("rur.expstate %0" : "=a" (expstate)); 108 disable_cp(flags, saved_cpenable); 109 110 return !!(expstate & BIT(offset)); 111 } 112 113 static void xtensa_expstate_set_value(struct gpio_chip *gc, unsigned offset, 114 int value) 115 { 116 unsigned long flags, saved_cpenable; 117 u32 mask = BIT(offset); 118 u32 val = value ? BIT(offset) : 0; 119 120 flags = enable_cp(&saved_cpenable); 121 __asm__ __volatile__("wrmsk_expstate %0, %1" 122 :: "a" (val), "a" (mask)); 123 disable_cp(flags, saved_cpenable); 124 } 125 126 static struct gpio_chip impwire_chip = { 127 .label = "impwire", 128 .base = -1, 129 .ngpio = 32, 130 .get_direction = xtensa_impwire_get_direction, 131 .get = xtensa_impwire_get_value, 132 .set = xtensa_impwire_set_value, 133 }; 134 135 static struct gpio_chip expstate_chip = { 136 .label = "expstate", 137 .base = -1, 138 .ngpio = 32, 139 .get_direction = xtensa_expstate_get_direction, 140 .get = xtensa_expstate_get_value, 141 .set = xtensa_expstate_set_value, 142 }; 143 144 static int xtensa_gpio_probe(struct platform_device *pdev) 145 { 146 int ret; 147 148 ret = gpiochip_add_data(&impwire_chip, NULL); 149 if (ret) 150 return ret; 151 return gpiochip_add_data(&expstate_chip, NULL); 152 } 153 154 static struct platform_driver xtensa_gpio_driver = { 155 .driver = { 156 .name = "xtensa-gpio", 157 }, 158 .probe = xtensa_gpio_probe, 159 }; 160 161 static int __init xtensa_gpio_init(void) 162 { 163 struct platform_device *pdev; 164 165 pdev = platform_device_register_simple("xtensa-gpio", 0, NULL, 0); 166 if (IS_ERR(pdev)) 167 return PTR_ERR(pdev); 168 169 return platform_driver_register(&xtensa_gpio_driver); 170 } 171 device_initcall(xtensa_gpio_init); 172 173 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>"); 174 MODULE_DESCRIPTION("Xtensa LX4 GPIO32 driver"); 175 MODULE_LICENSE("GPL"); 176