1 /* 2 * Copyright (C) 2013 TangoTec Ltd. 3 * Author: Baruch Siach <baruch@tkos.co.il> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 * 9 * Driver for the Xtensa LX4 GPIO32 Option 10 * 11 * Documentation: Xtensa LX4 Microprocessor Data Book, Section 2.22 12 * 13 * GPIO32 is a standard optional extension to the Xtensa architecture core that 14 * provides preconfigured output and input ports for intra SoC signaling. The 15 * GPIO32 option is implemented as 32bit Tensilica Instruction Extension (TIE) 16 * output state called EXPSTATE, and 32bit input wire called IMPWIRE. This 17 * driver treats input and output states as two distinct devices. 18 * 19 * Access to GPIO32 specific instructions is controlled by the CPENABLE 20 * (Coprocessor Enable Bits) register. By default Xtensa Linux startup code 21 * disables access to all coprocessors. This driver sets the CPENABLE bit 22 * corresponding to GPIO32 before any GPIO32 specific instruction, and restores 23 * CPENABLE state after that. 24 * 25 * This driver is currently incompatible with SMP. The GPIO32 extension is not 26 * guaranteed to be available in all cores. Moreover, each core controls a 27 * different set of IO wires. A theoretical SMP aware version of this driver 28 * would need to have a per core workqueue to do the actual GPIO manipulation. 29 */ 30 31 #include <linux/err.h> 32 #include <linux/module.h> 33 #include <linux/gpio.h> 34 #include <linux/bitops.h> 35 #include <linux/platform_device.h> 36 37 #include <asm/coprocessor.h> /* CPENABLE read/write macros */ 38 39 #ifndef XCHAL_CP_ID_XTIOP 40 #error GPIO32 option is not enabled for your xtensa core variant 41 #endif 42 43 static inline unsigned long enable_cp(unsigned long *cpenable) 44 { 45 unsigned long flags; 46 47 local_irq_save(flags); 48 RSR_CPENABLE(*cpenable); 49 WSR_CPENABLE(*cpenable | BIT(XCHAL_CP_ID_XTIOP)); 50 51 return flags; 52 } 53 54 static inline void disable_cp(unsigned long flags, unsigned long cpenable) 55 { 56 WSR_CPENABLE(cpenable); 57 local_irq_restore(flags); 58 } 59 60 static int xtensa_impwire_get_direction(struct gpio_chip *gc, unsigned offset) 61 { 62 return 1; /* input only */ 63 } 64 65 static int xtensa_impwire_get_value(struct gpio_chip *gc, unsigned offset) 66 { 67 unsigned long flags, saved_cpenable; 68 u32 impwire; 69 70 flags = enable_cp(&saved_cpenable); 71 __asm__ __volatile__("read_impwire %0" : "=a" (impwire)); 72 disable_cp(flags, saved_cpenable); 73 74 return !!(impwire & BIT(offset)); 75 } 76 77 static void xtensa_impwire_set_value(struct gpio_chip *gc, unsigned offset, 78 int value) 79 { 80 BUG(); /* output only; should never be called */ 81 } 82 83 static int xtensa_expstate_get_direction(struct gpio_chip *gc, unsigned offset) 84 { 85 return 0; /* output only */ 86 } 87 88 static int xtensa_expstate_get_value(struct gpio_chip *gc, unsigned offset) 89 { 90 unsigned long flags, saved_cpenable; 91 u32 expstate; 92 93 flags = enable_cp(&saved_cpenable); 94 __asm__ __volatile__("rur.expstate %0" : "=a" (expstate)); 95 disable_cp(flags, saved_cpenable); 96 97 return !!(expstate & BIT(offset)); 98 } 99 100 static void xtensa_expstate_set_value(struct gpio_chip *gc, unsigned offset, 101 int value) 102 { 103 unsigned long flags, saved_cpenable; 104 u32 mask = BIT(offset); 105 u32 val = value ? BIT(offset) : 0; 106 107 flags = enable_cp(&saved_cpenable); 108 __asm__ __volatile__("wrmsk_expstate %0, %1" 109 :: "a" (val), "a" (mask)); 110 disable_cp(flags, saved_cpenable); 111 } 112 113 static struct gpio_chip impwire_chip = { 114 .label = "impwire", 115 .base = -1, 116 .ngpio = 32, 117 .get_direction = xtensa_impwire_get_direction, 118 .get = xtensa_impwire_get_value, 119 .set = xtensa_impwire_set_value, 120 }; 121 122 static struct gpio_chip expstate_chip = { 123 .label = "expstate", 124 .base = -1, 125 .ngpio = 32, 126 .get_direction = xtensa_expstate_get_direction, 127 .get = xtensa_expstate_get_value, 128 .set = xtensa_expstate_set_value, 129 }; 130 131 static int xtensa_gpio_probe(struct platform_device *pdev) 132 { 133 int ret; 134 135 ret = gpiochip_add(&impwire_chip); 136 if (ret) 137 return ret; 138 return gpiochip_add(&expstate_chip); 139 } 140 141 static struct platform_driver xtensa_gpio_driver = { 142 .driver = { 143 .name = "xtensa-gpio", 144 .owner = THIS_MODULE, 145 }, 146 .probe = xtensa_gpio_probe, 147 }; 148 149 static int __init xtensa_gpio_init(void) 150 { 151 struct platform_device *pdev; 152 153 pdev = platform_device_register_simple("xtensa-gpio", 0, NULL, 0); 154 if (IS_ERR(pdev)) 155 return PTR_ERR(pdev); 156 157 return platform_driver_register(&xtensa_gpio_driver); 158 } 159 device_initcall(xtensa_gpio_init); 160 161 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>"); 162 MODULE_DESCRIPTION("Xtensa LX4 GPIO32 driver"); 163 MODULE_LICENSE("GPL"); 164