1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Xilinx gpio driver for xps/axi_gpio IP. 4 * 5 * Copyright 2008 - 2013 Xilinx, Inc. 6 */ 7 8 #include <linux/bitops.h> 9 #include <linux/clk.h> 10 #include <linux/errno.h> 11 #include <linux/gpio/driver.h> 12 #include <linux/init.h> 13 #include <linux/io.h> 14 #include <linux/module.h> 15 #include <linux/of_device.h> 16 #include <linux/of_platform.h> 17 #include <linux/slab.h> 18 19 /* Register Offset Definitions */ 20 #define XGPIO_DATA_OFFSET (0x0) /* Data register */ 21 #define XGPIO_TRI_OFFSET (0x4) /* I/O direction register */ 22 23 #define XGPIO_CHANNEL_OFFSET 0x8 24 25 /* Read/Write access to the GPIO registers */ 26 #if defined(CONFIG_ARCH_ZYNQ) || defined(CONFIG_X86) 27 # define xgpio_readreg(offset) readl(offset) 28 # define xgpio_writereg(offset, val) writel(val, offset) 29 #else 30 # define xgpio_readreg(offset) __raw_readl(offset) 31 # define xgpio_writereg(offset, val) __raw_writel(val, offset) 32 #endif 33 34 /** 35 * struct xgpio_instance - Stores information about GPIO device 36 * @gc: GPIO chip 37 * @regs: register block 38 * @gpio_width: GPIO width for every channel 39 * @gpio_state: GPIO state shadow register 40 * @gpio_dir: GPIO direction shadow register 41 * @gpio_lock: Lock used for synchronization 42 * @clk: clock resource for this driver 43 */ 44 struct xgpio_instance { 45 struct gpio_chip gc; 46 void __iomem *regs; 47 unsigned int gpio_width[2]; 48 u32 gpio_state[2]; 49 u32 gpio_dir[2]; 50 spinlock_t gpio_lock[2]; 51 struct clk *clk; 52 }; 53 54 static inline int xgpio_index(struct xgpio_instance *chip, int gpio) 55 { 56 if (gpio >= chip->gpio_width[0]) 57 return 1; 58 59 return 0; 60 } 61 62 static inline int xgpio_regoffset(struct xgpio_instance *chip, int gpio) 63 { 64 if (xgpio_index(chip, gpio)) 65 return XGPIO_CHANNEL_OFFSET; 66 67 return 0; 68 } 69 70 static inline int xgpio_offset(struct xgpio_instance *chip, int gpio) 71 { 72 if (xgpio_index(chip, gpio)) 73 return gpio - chip->gpio_width[0]; 74 75 return gpio; 76 } 77 78 /** 79 * xgpio_get - Read the specified signal of the GPIO device. 80 * @gc: Pointer to gpio_chip device structure. 81 * @gpio: GPIO signal number. 82 * 83 * This function reads the specified signal of the GPIO device. 84 * 85 * Return: 86 * 0 if direction of GPIO signals is set as input otherwise it 87 * returns negative error value. 88 */ 89 static int xgpio_get(struct gpio_chip *gc, unsigned int gpio) 90 { 91 struct xgpio_instance *chip = gpiochip_get_data(gc); 92 u32 val; 93 94 val = xgpio_readreg(chip->regs + XGPIO_DATA_OFFSET + 95 xgpio_regoffset(chip, gpio)); 96 97 return !!(val & BIT(xgpio_offset(chip, gpio))); 98 } 99 100 /** 101 * xgpio_set - Write the specified signal of the GPIO device. 102 * @gc: Pointer to gpio_chip device structure. 103 * @gpio: GPIO signal number. 104 * @val: Value to be written to specified signal. 105 * 106 * This function writes the specified value in to the specified signal of the 107 * GPIO device. 108 */ 109 static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val) 110 { 111 unsigned long flags; 112 struct xgpio_instance *chip = gpiochip_get_data(gc); 113 int index = xgpio_index(chip, gpio); 114 int offset = xgpio_offset(chip, gpio); 115 116 spin_lock_irqsave(&chip->gpio_lock[index], flags); 117 118 /* Write to GPIO signal and set its direction to output */ 119 if (val) 120 chip->gpio_state[index] |= BIT(offset); 121 else 122 chip->gpio_state[index] &= ~BIT(offset); 123 124 xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET + 125 xgpio_regoffset(chip, gpio), chip->gpio_state[index]); 126 127 spin_unlock_irqrestore(&chip->gpio_lock[index], flags); 128 } 129 130 /** 131 * xgpio_set_multiple - Write the specified signals of the GPIO device. 132 * @gc: Pointer to gpio_chip device structure. 133 * @mask: Mask of the GPIOS to modify. 134 * @bits: Value to be wrote on each GPIO 135 * 136 * This function writes the specified values into the specified signals of the 137 * GPIO devices. 138 */ 139 static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, 140 unsigned long *bits) 141 { 142 unsigned long flags; 143 struct xgpio_instance *chip = gpiochip_get_data(gc); 144 int index = xgpio_index(chip, 0); 145 int offset, i; 146 147 spin_lock_irqsave(&chip->gpio_lock[index], flags); 148 149 /* Write to GPIO signals */ 150 for (i = 0; i < gc->ngpio; i++) { 151 if (*mask == 0) 152 break; 153 /* Once finished with an index write it out to the register */ 154 if (index != xgpio_index(chip, i)) { 155 xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET + 156 index * XGPIO_CHANNEL_OFFSET, 157 chip->gpio_state[index]); 158 spin_unlock_irqrestore(&chip->gpio_lock[index], flags); 159 index = xgpio_index(chip, i); 160 spin_lock_irqsave(&chip->gpio_lock[index], flags); 161 } 162 if (__test_and_clear_bit(i, mask)) { 163 offset = xgpio_offset(chip, i); 164 if (test_bit(i, bits)) 165 chip->gpio_state[index] |= BIT(offset); 166 else 167 chip->gpio_state[index] &= ~BIT(offset); 168 } 169 } 170 171 xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET + 172 index * XGPIO_CHANNEL_OFFSET, chip->gpio_state[index]); 173 174 spin_unlock_irqrestore(&chip->gpio_lock[index], flags); 175 } 176 177 /** 178 * xgpio_dir_in - Set the direction of the specified GPIO signal as input. 179 * @gc: Pointer to gpio_chip device structure. 180 * @gpio: GPIO signal number. 181 * 182 * Return: 183 * 0 - if direction of GPIO signals is set as input 184 * otherwise it returns negative error value. 185 */ 186 static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio) 187 { 188 unsigned long flags; 189 struct xgpio_instance *chip = gpiochip_get_data(gc); 190 int index = xgpio_index(chip, gpio); 191 int offset = xgpio_offset(chip, gpio); 192 193 spin_lock_irqsave(&chip->gpio_lock[index], flags); 194 195 /* Set the GPIO bit in shadow register and set direction as input */ 196 chip->gpio_dir[index] |= BIT(offset); 197 xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET + 198 xgpio_regoffset(chip, gpio), chip->gpio_dir[index]); 199 200 spin_unlock_irqrestore(&chip->gpio_lock[index], flags); 201 202 return 0; 203 } 204 205 /** 206 * xgpio_dir_out - Set the direction of the specified GPIO signal as output. 207 * @gc: Pointer to gpio_chip device structure. 208 * @gpio: GPIO signal number. 209 * @val: Value to be written to specified signal. 210 * 211 * This function sets the direction of specified GPIO signal as output. 212 * 213 * Return: 214 * If all GPIO signals of GPIO chip is configured as input then it returns 215 * error otherwise it returns 0. 216 */ 217 static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) 218 { 219 unsigned long flags; 220 struct xgpio_instance *chip = gpiochip_get_data(gc); 221 int index = xgpio_index(chip, gpio); 222 int offset = xgpio_offset(chip, gpio); 223 224 spin_lock_irqsave(&chip->gpio_lock[index], flags); 225 226 /* Write state of GPIO signal */ 227 if (val) 228 chip->gpio_state[index] |= BIT(offset); 229 else 230 chip->gpio_state[index] &= ~BIT(offset); 231 xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET + 232 xgpio_regoffset(chip, gpio), chip->gpio_state[index]); 233 234 /* Clear the GPIO bit in shadow register and set direction as output */ 235 chip->gpio_dir[index] &= ~BIT(offset); 236 xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET + 237 xgpio_regoffset(chip, gpio), chip->gpio_dir[index]); 238 239 spin_unlock_irqrestore(&chip->gpio_lock[index], flags); 240 241 return 0; 242 } 243 244 /** 245 * xgpio_save_regs - Set initial values of GPIO pins 246 * @chip: Pointer to GPIO instance 247 */ 248 static void xgpio_save_regs(struct xgpio_instance *chip) 249 { 250 xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET, chip->gpio_state[0]); 251 xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET, chip->gpio_dir[0]); 252 253 if (!chip->gpio_width[1]) 254 return; 255 256 xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET + XGPIO_CHANNEL_OFFSET, 257 chip->gpio_state[1]); 258 xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET + XGPIO_CHANNEL_OFFSET, 259 chip->gpio_dir[1]); 260 } 261 262 /** 263 * xgpio_remove - Remove method for the GPIO device. 264 * @pdev: pointer to the platform device 265 * 266 * This function remove gpiochips and frees all the allocated resources. 267 * 268 * Return: 0 always 269 */ 270 static int xgpio_remove(struct platform_device *pdev) 271 { 272 struct xgpio_instance *gpio = platform_get_drvdata(pdev); 273 274 clk_disable_unprepare(gpio->clk); 275 276 return 0; 277 } 278 279 /** 280 * xgpio_of_probe - Probe method for the GPIO device. 281 * @pdev: pointer to the platform device 282 * 283 * Return: 284 * It returns 0, if the driver is bound to the GPIO device, or 285 * a negative value if there is an error. 286 */ 287 static int xgpio_probe(struct platform_device *pdev) 288 { 289 struct xgpio_instance *chip; 290 int status = 0; 291 struct device_node *np = pdev->dev.of_node; 292 u32 is_dual; 293 294 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); 295 if (!chip) 296 return -ENOMEM; 297 298 platform_set_drvdata(pdev, chip); 299 300 /* Update GPIO state shadow register with default value */ 301 if (of_property_read_u32(np, "xlnx,dout-default", &chip->gpio_state[0])) 302 chip->gpio_state[0] = 0x0; 303 304 /* Update GPIO direction shadow register with default value */ 305 if (of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir[0])) 306 chip->gpio_dir[0] = 0xFFFFFFFF; 307 308 /* 309 * Check device node and parent device node for device width 310 * and assume default width of 32 311 */ 312 if (of_property_read_u32(np, "xlnx,gpio-width", &chip->gpio_width[0])) 313 chip->gpio_width[0] = 32; 314 315 spin_lock_init(&chip->gpio_lock[0]); 316 317 if (of_property_read_u32(np, "xlnx,is-dual", &is_dual)) 318 is_dual = 0; 319 320 if (is_dual) { 321 /* Update GPIO state shadow register with default value */ 322 if (of_property_read_u32(np, "xlnx,dout-default-2", 323 &chip->gpio_state[1])) 324 chip->gpio_state[1] = 0x0; 325 326 /* Update GPIO direction shadow register with default value */ 327 if (of_property_read_u32(np, "xlnx,tri-default-2", 328 &chip->gpio_dir[1])) 329 chip->gpio_dir[1] = 0xFFFFFFFF; 330 331 /* 332 * Check device node and parent device node for device width 333 * and assume default width of 32 334 */ 335 if (of_property_read_u32(np, "xlnx,gpio2-width", 336 &chip->gpio_width[1])) 337 chip->gpio_width[1] = 32; 338 339 spin_lock_init(&chip->gpio_lock[1]); 340 } 341 342 chip->gc.base = -1; 343 chip->gc.ngpio = chip->gpio_width[0] + chip->gpio_width[1]; 344 chip->gc.parent = &pdev->dev; 345 chip->gc.direction_input = xgpio_dir_in; 346 chip->gc.direction_output = xgpio_dir_out; 347 chip->gc.get = xgpio_get; 348 chip->gc.set = xgpio_set; 349 chip->gc.set_multiple = xgpio_set_multiple; 350 351 chip->gc.label = dev_name(&pdev->dev); 352 353 chip->regs = devm_platform_ioremap_resource(pdev, 0); 354 if (IS_ERR(chip->regs)) { 355 dev_err(&pdev->dev, "failed to ioremap memory resource\n"); 356 return PTR_ERR(chip->regs); 357 } 358 359 chip->clk = devm_clk_get_optional(&pdev->dev, NULL); 360 if (IS_ERR(chip->clk)) { 361 if (PTR_ERR(chip->clk) != -EPROBE_DEFER) 362 dev_dbg(&pdev->dev, "Input clock not found\n"); 363 return PTR_ERR(chip->clk); 364 } 365 366 status = clk_prepare_enable(chip->clk); 367 if (status < 0) { 368 dev_err(&pdev->dev, "Failed to prepare clk\n"); 369 return status; 370 } 371 372 xgpio_save_regs(chip); 373 374 status = devm_gpiochip_add_data(&pdev->dev, &chip->gc, chip); 375 if (status) { 376 dev_err(&pdev->dev, "failed to add GPIO chip\n"); 377 clk_disable_unprepare(chip->clk); 378 return status; 379 } 380 381 return 0; 382 } 383 384 static const struct of_device_id xgpio_of_match[] = { 385 { .compatible = "xlnx,xps-gpio-1.00.a", }, 386 { /* end of list */ }, 387 }; 388 389 MODULE_DEVICE_TABLE(of, xgpio_of_match); 390 391 static struct platform_driver xgpio_plat_driver = { 392 .probe = xgpio_probe, 393 .remove = xgpio_remove, 394 .driver = { 395 .name = "gpio-xilinx", 396 .of_match_table = xgpio_of_match, 397 }, 398 }; 399 400 static int __init xgpio_init(void) 401 { 402 return platform_driver_register(&xgpio_plat_driver); 403 } 404 405 subsys_initcall(xgpio_init); 406 407 static void __exit xgpio_exit(void) 408 { 409 platform_driver_unregister(&xgpio_plat_driver); 410 } 411 module_exit(xgpio_exit); 412 413 MODULE_AUTHOR("Xilinx, Inc."); 414 MODULE_DESCRIPTION("Xilinx GPIO driver"); 415 MODULE_LICENSE("GPL"); 416