1 /* 2 * vf610 GPIO support through PORT and GPIO module 3 * 4 * Copyright (c) 2014 Toradex AG. 5 * 6 * Author: Stefan Agner <stefan@agner.ch>. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * as published by the Free Software Foundation; either version 2 11 * of the License, or (at your option) any later version. 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 */ 17 18 #include <linux/bitops.h> 19 #include <linux/err.h> 20 #include <linux/gpio.h> 21 #include <linux/init.h> 22 #include <linux/interrupt.h> 23 #include <linux/io.h> 24 #include <linux/ioport.h> 25 #include <linux/irq.h> 26 #include <linux/module.h> 27 #include <linux/platform_device.h> 28 #include <linux/of.h> 29 #include <linux/of_device.h> 30 #include <linux/of_irq.h> 31 32 #define VF610_GPIO_PER_PORT 32 33 34 struct vf610_gpio_port { 35 struct gpio_chip gc; 36 void __iomem *base; 37 void __iomem *gpio_base; 38 u8 irqc[VF610_GPIO_PER_PORT]; 39 int irq; 40 }; 41 42 #define GPIO_PDOR 0x00 43 #define GPIO_PSOR 0x04 44 #define GPIO_PCOR 0x08 45 #define GPIO_PTOR 0x0c 46 #define GPIO_PDIR 0x10 47 48 #define PORT_PCR(n) ((n) * 0x4) 49 #define PORT_PCR_IRQC_OFFSET 16 50 51 #define PORT_ISFR 0xa0 52 #define PORT_DFER 0xc0 53 #define PORT_DFCR 0xc4 54 #define PORT_DFWR 0xc8 55 56 #define PORT_INT_OFF 0x0 57 #define PORT_INT_LOGIC_ZERO 0x8 58 #define PORT_INT_RISING_EDGE 0x9 59 #define PORT_INT_FALLING_EDGE 0xa 60 #define PORT_INT_EITHER_EDGE 0xb 61 #define PORT_INT_LOGIC_ONE 0xc 62 63 static struct irq_chip vf610_gpio_irq_chip; 64 65 static const struct of_device_id vf610_gpio_dt_ids[] = { 66 { .compatible = "fsl,vf610-gpio" }, 67 { /* sentinel */ } 68 }; 69 70 static inline void vf610_gpio_writel(u32 val, void __iomem *reg) 71 { 72 writel_relaxed(val, reg); 73 } 74 75 static inline u32 vf610_gpio_readl(void __iomem *reg) 76 { 77 return readl_relaxed(reg); 78 } 79 80 static int vf610_gpio_request(struct gpio_chip *chip, unsigned offset) 81 { 82 return pinctrl_request_gpio(chip->base + offset); 83 } 84 85 static void vf610_gpio_free(struct gpio_chip *chip, unsigned offset) 86 { 87 pinctrl_free_gpio(chip->base + offset); 88 } 89 90 static int vf610_gpio_get(struct gpio_chip *gc, unsigned int gpio) 91 { 92 struct vf610_gpio_port *port = 93 container_of(gc, struct vf610_gpio_port, gc); 94 95 return !!(vf610_gpio_readl(port->gpio_base + GPIO_PDIR) & BIT(gpio)); 96 } 97 98 static void vf610_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) 99 { 100 struct vf610_gpio_port *port = 101 container_of(gc, struct vf610_gpio_port, gc); 102 unsigned long mask = BIT(gpio); 103 104 if (val) 105 vf610_gpio_writel(mask, port->gpio_base + GPIO_PSOR); 106 else 107 vf610_gpio_writel(mask, port->gpio_base + GPIO_PCOR); 108 } 109 110 static int vf610_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) 111 { 112 return pinctrl_gpio_direction_input(chip->base + gpio); 113 } 114 115 static int vf610_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, 116 int value) 117 { 118 vf610_gpio_set(chip, gpio, value); 119 120 return pinctrl_gpio_direction_output(chip->base + gpio); 121 } 122 123 static void vf610_gpio_irq_handler(struct irq_desc *desc) 124 { 125 struct vf610_gpio_port *port = irq_desc_get_handler_data(desc); 126 struct irq_chip *chip = irq_desc_get_chip(desc); 127 int pin; 128 unsigned long irq_isfr; 129 130 chained_irq_enter(chip, desc); 131 132 irq_isfr = vf610_gpio_readl(port->base + PORT_ISFR); 133 134 for_each_set_bit(pin, &irq_isfr, VF610_GPIO_PER_PORT) { 135 vf610_gpio_writel(BIT(pin), port->base + PORT_ISFR); 136 137 generic_handle_irq(irq_find_mapping(port->gc.irqdomain, pin)); 138 } 139 140 chained_irq_exit(chip, desc); 141 } 142 143 static void vf610_gpio_irq_ack(struct irq_data *d) 144 { 145 struct vf610_gpio_port *port = irq_data_get_irq_chip_data(d); 146 int gpio = d->hwirq; 147 148 vf610_gpio_writel(BIT(gpio), port->base + PORT_ISFR); 149 } 150 151 static int vf610_gpio_irq_set_type(struct irq_data *d, u32 type) 152 { 153 struct vf610_gpio_port *port = irq_data_get_irq_chip_data(d); 154 u8 irqc; 155 156 switch (type) { 157 case IRQ_TYPE_EDGE_RISING: 158 irqc = PORT_INT_RISING_EDGE; 159 break; 160 case IRQ_TYPE_EDGE_FALLING: 161 irqc = PORT_INT_FALLING_EDGE; 162 break; 163 case IRQ_TYPE_EDGE_BOTH: 164 irqc = PORT_INT_EITHER_EDGE; 165 break; 166 case IRQ_TYPE_LEVEL_LOW: 167 irqc = PORT_INT_LOGIC_ZERO; 168 break; 169 case IRQ_TYPE_LEVEL_HIGH: 170 irqc = PORT_INT_LOGIC_ONE; 171 break; 172 default: 173 return -EINVAL; 174 } 175 176 port->irqc[d->hwirq] = irqc; 177 178 if (type & IRQ_TYPE_LEVEL_MASK) 179 irq_set_handler_locked(d, handle_level_irq); 180 else 181 irq_set_handler_locked(d, handle_edge_irq); 182 183 return 0; 184 } 185 186 static void vf610_gpio_irq_mask(struct irq_data *d) 187 { 188 struct vf610_gpio_port *port = irq_data_get_irq_chip_data(d); 189 void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq); 190 191 vf610_gpio_writel(0, pcr_base); 192 } 193 194 static void vf610_gpio_irq_unmask(struct irq_data *d) 195 { 196 struct vf610_gpio_port *port = irq_data_get_irq_chip_data(d); 197 void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq); 198 199 vf610_gpio_writel(port->irqc[d->hwirq] << PORT_PCR_IRQC_OFFSET, 200 pcr_base); 201 } 202 203 static int vf610_gpio_irq_set_wake(struct irq_data *d, u32 enable) 204 { 205 struct vf610_gpio_port *port = irq_data_get_irq_chip_data(d); 206 207 if (enable) 208 enable_irq_wake(port->irq); 209 else 210 disable_irq_wake(port->irq); 211 212 return 0; 213 } 214 215 static struct irq_chip vf610_gpio_irq_chip = { 216 .name = "gpio-vf610", 217 .irq_ack = vf610_gpio_irq_ack, 218 .irq_mask = vf610_gpio_irq_mask, 219 .irq_unmask = vf610_gpio_irq_unmask, 220 .irq_set_type = vf610_gpio_irq_set_type, 221 .irq_set_wake = vf610_gpio_irq_set_wake, 222 }; 223 224 static int vf610_gpio_probe(struct platform_device *pdev) 225 { 226 struct device *dev = &pdev->dev; 227 struct device_node *np = dev->of_node; 228 struct vf610_gpio_port *port; 229 struct resource *iores; 230 struct gpio_chip *gc; 231 int ret; 232 233 port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL); 234 if (!port) 235 return -ENOMEM; 236 237 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); 238 port->base = devm_ioremap_resource(dev, iores); 239 if (IS_ERR(port->base)) 240 return PTR_ERR(port->base); 241 242 iores = platform_get_resource(pdev, IORESOURCE_MEM, 1); 243 port->gpio_base = devm_ioremap_resource(dev, iores); 244 if (IS_ERR(port->gpio_base)) 245 return PTR_ERR(port->gpio_base); 246 247 port->irq = platform_get_irq(pdev, 0); 248 if (port->irq < 0) 249 return port->irq; 250 251 gc = &port->gc; 252 gc->of_node = np; 253 gc->dev = dev; 254 gc->label = "vf610-gpio"; 255 gc->ngpio = VF610_GPIO_PER_PORT; 256 gc->base = of_alias_get_id(np, "gpio") * VF610_GPIO_PER_PORT; 257 258 gc->request = vf610_gpio_request; 259 gc->free = vf610_gpio_free; 260 gc->direction_input = vf610_gpio_direction_input; 261 gc->get = vf610_gpio_get; 262 gc->direction_output = vf610_gpio_direction_output; 263 gc->set = vf610_gpio_set; 264 265 ret = gpiochip_add(gc); 266 if (ret < 0) 267 return ret; 268 269 /* Clear the interrupt status register for all GPIO's */ 270 vf610_gpio_writel(~0, port->base + PORT_ISFR); 271 272 ret = gpiochip_irqchip_add(gc, &vf610_gpio_irq_chip, 0, 273 handle_edge_irq, IRQ_TYPE_NONE); 274 if (ret) { 275 dev_err(dev, "failed to add irqchip\n"); 276 gpiochip_remove(gc); 277 return ret; 278 } 279 gpiochip_set_chained_irqchip(gc, &vf610_gpio_irq_chip, port->irq, 280 vf610_gpio_irq_handler); 281 282 return 0; 283 } 284 285 static struct platform_driver vf610_gpio_driver = { 286 .driver = { 287 .name = "gpio-vf610", 288 .of_match_table = vf610_gpio_dt_ids, 289 }, 290 .probe = vf610_gpio_probe, 291 }; 292 293 static int __init gpio_vf610_init(void) 294 { 295 return platform_driver_register(&vf610_gpio_driver); 296 } 297 device_initcall(gpio_vf610_init); 298 299 MODULE_AUTHOR("Stefan Agner <stefan@agner.ch>"); 300 MODULE_DESCRIPTION("Freescale VF610 GPIO"); 301 MODULE_LICENSE("GPL v2"); 302