17f2691a1SStefan Agner /* 27f2691a1SStefan Agner * vf610 GPIO support through PORT and GPIO module 37f2691a1SStefan Agner * 47f2691a1SStefan Agner * Copyright (c) 2014 Toradex AG. 57f2691a1SStefan Agner * 67f2691a1SStefan Agner * Author: Stefan Agner <stefan@agner.ch>. 77f2691a1SStefan Agner * 87f2691a1SStefan Agner * This program is free software; you can redistribute it and/or 97f2691a1SStefan Agner * modify it under the terms of the GNU General Public License 107f2691a1SStefan Agner * as published by the Free Software Foundation; either version 2 117f2691a1SStefan Agner * of the License, or (at your option) any later version. 127f2691a1SStefan Agner * This program is distributed in the hope that it will be useful, 137f2691a1SStefan Agner * but WITHOUT ANY WARRANTY; without even the implied warranty of 147f2691a1SStefan Agner * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 157f2691a1SStefan Agner * GNU General Public License for more details. 167f2691a1SStefan Agner */ 177f2691a1SStefan Agner 187f2691a1SStefan Agner #include <linux/bitops.h> 197f2691a1SStefan Agner #include <linux/err.h> 207f2691a1SStefan Agner #include <linux/gpio.h> 217f2691a1SStefan Agner #include <linux/init.h> 227f2691a1SStefan Agner #include <linux/interrupt.h> 237f2691a1SStefan Agner #include <linux/io.h> 247f2691a1SStefan Agner #include <linux/ioport.h> 257f2691a1SStefan Agner #include <linux/irq.h> 267f2691a1SStefan Agner #include <linux/module.h> 277f2691a1SStefan Agner #include <linux/platform_device.h> 287f2691a1SStefan Agner #include <linux/of.h> 297f2691a1SStefan Agner #include <linux/of_device.h> 307f2691a1SStefan Agner #include <linux/of_irq.h> 317f2691a1SStefan Agner 327f2691a1SStefan Agner #define VF610_GPIO_PER_PORT 32 337f2691a1SStefan Agner 347f2691a1SStefan Agner struct vf610_gpio_port { 357f2691a1SStefan Agner struct gpio_chip gc; 367f2691a1SStefan Agner void __iomem *base; 377f2691a1SStefan Agner void __iomem *gpio_base; 387f2691a1SStefan Agner u8 irqc[VF610_GPIO_PER_PORT]; 397f2691a1SStefan Agner int irq; 407f2691a1SStefan Agner }; 417f2691a1SStefan Agner 427f2691a1SStefan Agner #define GPIO_PDOR 0x00 437f2691a1SStefan Agner #define GPIO_PSOR 0x04 447f2691a1SStefan Agner #define GPIO_PCOR 0x08 457f2691a1SStefan Agner #define GPIO_PTOR 0x0c 467f2691a1SStefan Agner #define GPIO_PDIR 0x10 477f2691a1SStefan Agner 487f2691a1SStefan Agner #define PORT_PCR(n) ((n) * 0x4) 497f2691a1SStefan Agner #define PORT_PCR_IRQC_OFFSET 16 507f2691a1SStefan Agner 517f2691a1SStefan Agner #define PORT_ISFR 0xa0 527f2691a1SStefan Agner #define PORT_DFER 0xc0 537f2691a1SStefan Agner #define PORT_DFCR 0xc4 547f2691a1SStefan Agner #define PORT_DFWR 0xc8 557f2691a1SStefan Agner 567f2691a1SStefan Agner #define PORT_INT_OFF 0x0 577f2691a1SStefan Agner #define PORT_INT_LOGIC_ZERO 0x8 587f2691a1SStefan Agner #define PORT_INT_RISING_EDGE 0x9 597f2691a1SStefan Agner #define PORT_INT_FALLING_EDGE 0xa 607f2691a1SStefan Agner #define PORT_INT_EITHER_EDGE 0xb 617f2691a1SStefan Agner #define PORT_INT_LOGIC_ONE 0xc 627f2691a1SStefan Agner 63fd968115SStefan Agner static struct irq_chip vf610_gpio_irq_chip; 64fd968115SStefan Agner 657f2691a1SStefan Agner static const struct of_device_id vf610_gpio_dt_ids[] = { 667f2691a1SStefan Agner { .compatible = "fsl,vf610-gpio" }, 677f2691a1SStefan Agner { /* sentinel */ } 687f2691a1SStefan Agner }; 697f2691a1SStefan Agner 707f2691a1SStefan Agner static inline void vf610_gpio_writel(u32 val, void __iomem *reg) 717f2691a1SStefan Agner { 727f2691a1SStefan Agner writel_relaxed(val, reg); 737f2691a1SStefan Agner } 747f2691a1SStefan Agner 757f2691a1SStefan Agner static inline u32 vf610_gpio_readl(void __iomem *reg) 767f2691a1SStefan Agner { 777f2691a1SStefan Agner return readl_relaxed(reg); 787f2691a1SStefan Agner } 797f2691a1SStefan Agner 807f2691a1SStefan Agner static int vf610_gpio_request(struct gpio_chip *chip, unsigned offset) 817f2691a1SStefan Agner { 827f2691a1SStefan Agner return pinctrl_request_gpio(chip->base + offset); 837f2691a1SStefan Agner } 847f2691a1SStefan Agner 857f2691a1SStefan Agner static void vf610_gpio_free(struct gpio_chip *chip, unsigned offset) 867f2691a1SStefan Agner { 877f2691a1SStefan Agner pinctrl_free_gpio(chip->base + offset); 887f2691a1SStefan Agner } 897f2691a1SStefan Agner 907f2691a1SStefan Agner static int vf610_gpio_get(struct gpio_chip *gc, unsigned int gpio) 917f2691a1SStefan Agner { 927f2691a1SStefan Agner struct vf610_gpio_port *port = 937f2691a1SStefan Agner container_of(gc, struct vf610_gpio_port, gc); 947f2691a1SStefan Agner 957f2691a1SStefan Agner return !!(vf610_gpio_readl(port->gpio_base + GPIO_PDIR) & BIT(gpio)); 967f2691a1SStefan Agner } 977f2691a1SStefan Agner 987f2691a1SStefan Agner static void vf610_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) 997f2691a1SStefan Agner { 1007f2691a1SStefan Agner struct vf610_gpio_port *port = 1017f2691a1SStefan Agner container_of(gc, struct vf610_gpio_port, gc); 1027f2691a1SStefan Agner unsigned long mask = BIT(gpio); 1037f2691a1SStefan Agner 1047f2691a1SStefan Agner if (val) 1057f2691a1SStefan Agner vf610_gpio_writel(mask, port->gpio_base + GPIO_PSOR); 1067f2691a1SStefan Agner else 1077f2691a1SStefan Agner vf610_gpio_writel(mask, port->gpio_base + GPIO_PCOR); 1087f2691a1SStefan Agner } 1097f2691a1SStefan Agner 1107f2691a1SStefan Agner static int vf610_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) 1117f2691a1SStefan Agner { 1127f2691a1SStefan Agner return pinctrl_gpio_direction_input(chip->base + gpio); 1137f2691a1SStefan Agner } 1147f2691a1SStefan Agner 1157f2691a1SStefan Agner static int vf610_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, 1167f2691a1SStefan Agner int value) 1177f2691a1SStefan Agner { 1187f2691a1SStefan Agner vf610_gpio_set(chip, gpio, value); 1197f2691a1SStefan Agner 1207f2691a1SStefan Agner return pinctrl_gpio_direction_output(chip->base + gpio); 1217f2691a1SStefan Agner } 1227f2691a1SStefan Agner 1237f2691a1SStefan Agner static void vf610_gpio_irq_handler(u32 irq, struct irq_desc *desc) 1247f2691a1SStefan Agner { 125476f8b4cSJiang Liu struct vf610_gpio_port *port = irq_desc_get_handler_data(desc); 1267f2691a1SStefan Agner struct irq_chip *chip = irq_desc_get_chip(desc); 1277f2691a1SStefan Agner int pin; 1287f2691a1SStefan Agner unsigned long irq_isfr; 1297f2691a1SStefan Agner 1307f2691a1SStefan Agner chained_irq_enter(chip, desc); 1317f2691a1SStefan Agner 1327f2691a1SStefan Agner irq_isfr = vf610_gpio_readl(port->base + PORT_ISFR); 1337f2691a1SStefan Agner 1347f2691a1SStefan Agner for_each_set_bit(pin, &irq_isfr, VF610_GPIO_PER_PORT) { 1357f2691a1SStefan Agner vf610_gpio_writel(BIT(pin), port->base + PORT_ISFR); 1367f2691a1SStefan Agner 1377f2691a1SStefan Agner generic_handle_irq(irq_find_mapping(port->gc.irqdomain, pin)); 1387f2691a1SStefan Agner } 1397f2691a1SStefan Agner 1407f2691a1SStefan Agner chained_irq_exit(chip, desc); 1417f2691a1SStefan Agner } 1427f2691a1SStefan Agner 1437f2691a1SStefan Agner static void vf610_gpio_irq_ack(struct irq_data *d) 1447f2691a1SStefan Agner { 1457f2691a1SStefan Agner struct vf610_gpio_port *port = irq_data_get_irq_chip_data(d); 1467f2691a1SStefan Agner int gpio = d->hwirq; 1477f2691a1SStefan Agner 1487f2691a1SStefan Agner vf610_gpio_writel(BIT(gpio), port->base + PORT_ISFR); 1497f2691a1SStefan Agner } 1507f2691a1SStefan Agner 1517f2691a1SStefan Agner static int vf610_gpio_irq_set_type(struct irq_data *d, u32 type) 1527f2691a1SStefan Agner { 1537f2691a1SStefan Agner struct vf610_gpio_port *port = irq_data_get_irq_chip_data(d); 1547f2691a1SStefan Agner u8 irqc; 1557f2691a1SStefan Agner 1567f2691a1SStefan Agner switch (type) { 1577f2691a1SStefan Agner case IRQ_TYPE_EDGE_RISING: 1587f2691a1SStefan Agner irqc = PORT_INT_RISING_EDGE; 1597f2691a1SStefan Agner break; 1607f2691a1SStefan Agner case IRQ_TYPE_EDGE_FALLING: 1617f2691a1SStefan Agner irqc = PORT_INT_FALLING_EDGE; 1627f2691a1SStefan Agner break; 1637f2691a1SStefan Agner case IRQ_TYPE_EDGE_BOTH: 1647f2691a1SStefan Agner irqc = PORT_INT_EITHER_EDGE; 1657f2691a1SStefan Agner break; 1667f2691a1SStefan Agner case IRQ_TYPE_LEVEL_LOW: 1677f2691a1SStefan Agner irqc = PORT_INT_LOGIC_ZERO; 1687f2691a1SStefan Agner break; 1697f2691a1SStefan Agner case IRQ_TYPE_LEVEL_HIGH: 1707f2691a1SStefan Agner irqc = PORT_INT_LOGIC_ONE; 1717f2691a1SStefan Agner break; 1727f2691a1SStefan Agner default: 1737f2691a1SStefan Agner return -EINVAL; 1747f2691a1SStefan Agner } 1757f2691a1SStefan Agner 1767f2691a1SStefan Agner port->irqc[d->hwirq] = irqc; 1777f2691a1SStefan Agner 178fd968115SStefan Agner if (type & IRQ_TYPE_LEVEL_MASK) 179fd968115SStefan Agner __irq_set_handler_locked(d->irq, handle_level_irq); 180fd968115SStefan Agner else 181fd968115SStefan Agner __irq_set_handler_locked(d->irq, handle_edge_irq); 182fd968115SStefan Agner 1837f2691a1SStefan Agner return 0; 1847f2691a1SStefan Agner } 1857f2691a1SStefan Agner 1867f2691a1SStefan Agner static void vf610_gpio_irq_mask(struct irq_data *d) 1877f2691a1SStefan Agner { 1887f2691a1SStefan Agner struct vf610_gpio_port *port = irq_data_get_irq_chip_data(d); 1897f2691a1SStefan Agner void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq); 1907f2691a1SStefan Agner 1917f2691a1SStefan Agner vf610_gpio_writel(0, pcr_base); 1927f2691a1SStefan Agner } 1937f2691a1SStefan Agner 1947f2691a1SStefan Agner static void vf610_gpio_irq_unmask(struct irq_data *d) 1957f2691a1SStefan Agner { 1967f2691a1SStefan Agner struct vf610_gpio_port *port = irq_data_get_irq_chip_data(d); 1977f2691a1SStefan Agner void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq); 1987f2691a1SStefan Agner 1997f2691a1SStefan Agner vf610_gpio_writel(port->irqc[d->hwirq] << PORT_PCR_IRQC_OFFSET, 2007f2691a1SStefan Agner pcr_base); 2017f2691a1SStefan Agner } 2027f2691a1SStefan Agner 2037f2691a1SStefan Agner static int vf610_gpio_irq_set_wake(struct irq_data *d, u32 enable) 2047f2691a1SStefan Agner { 2057f2691a1SStefan Agner struct vf610_gpio_port *port = irq_data_get_irq_chip_data(d); 2067f2691a1SStefan Agner 2077f2691a1SStefan Agner if (enable) 2087f2691a1SStefan Agner enable_irq_wake(port->irq); 2097f2691a1SStefan Agner else 2107f2691a1SStefan Agner disable_irq_wake(port->irq); 2117f2691a1SStefan Agner 2127f2691a1SStefan Agner return 0; 2137f2691a1SStefan Agner } 2147f2691a1SStefan Agner 2157f2691a1SStefan Agner static struct irq_chip vf610_gpio_irq_chip = { 2167f2691a1SStefan Agner .name = "gpio-vf610", 2177f2691a1SStefan Agner .irq_ack = vf610_gpio_irq_ack, 2187f2691a1SStefan Agner .irq_mask = vf610_gpio_irq_mask, 2197f2691a1SStefan Agner .irq_unmask = vf610_gpio_irq_unmask, 2207f2691a1SStefan Agner .irq_set_type = vf610_gpio_irq_set_type, 2217f2691a1SStefan Agner .irq_set_wake = vf610_gpio_irq_set_wake, 2227f2691a1SStefan Agner }; 2237f2691a1SStefan Agner 2247f2691a1SStefan Agner static int vf610_gpio_probe(struct platform_device *pdev) 2257f2691a1SStefan Agner { 2267f2691a1SStefan Agner struct device *dev = &pdev->dev; 2277f2691a1SStefan Agner struct device_node *np = dev->of_node; 2287f2691a1SStefan Agner struct vf610_gpio_port *port; 2297f2691a1SStefan Agner struct resource *iores; 2307f2691a1SStefan Agner struct gpio_chip *gc; 2317f2691a1SStefan Agner int ret; 2327f2691a1SStefan Agner 2337f2691a1SStefan Agner port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL); 2347f2691a1SStefan Agner if (!port) 2357f2691a1SStefan Agner return -ENOMEM; 2367f2691a1SStefan Agner 2377f2691a1SStefan Agner iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2387f2691a1SStefan Agner port->base = devm_ioremap_resource(dev, iores); 2397f2691a1SStefan Agner if (IS_ERR(port->base)) 2407f2691a1SStefan Agner return PTR_ERR(port->base); 2417f2691a1SStefan Agner 2427f2691a1SStefan Agner iores = platform_get_resource(pdev, IORESOURCE_MEM, 1); 2437f2691a1SStefan Agner port->gpio_base = devm_ioremap_resource(dev, iores); 2447f2691a1SStefan Agner if (IS_ERR(port->gpio_base)) 2457f2691a1SStefan Agner return PTR_ERR(port->gpio_base); 2467f2691a1SStefan Agner 2477f2691a1SStefan Agner port->irq = platform_get_irq(pdev, 0); 2487f2691a1SStefan Agner if (port->irq < 0) 2497f2691a1SStefan Agner return port->irq; 2507f2691a1SStefan Agner 2517f2691a1SStefan Agner gc = &port->gc; 2527f2691a1SStefan Agner gc->of_node = np; 2537f2691a1SStefan Agner gc->dev = dev; 254d32efe37SAxel Lin gc->label = "vf610-gpio"; 255d32efe37SAxel Lin gc->ngpio = VF610_GPIO_PER_PORT; 2567f2691a1SStefan Agner gc->base = of_alias_get_id(np, "gpio") * VF610_GPIO_PER_PORT; 2577f2691a1SStefan Agner 258d32efe37SAxel Lin gc->request = vf610_gpio_request; 259d32efe37SAxel Lin gc->free = vf610_gpio_free; 260d32efe37SAxel Lin gc->direction_input = vf610_gpio_direction_input; 261d32efe37SAxel Lin gc->get = vf610_gpio_get; 262d32efe37SAxel Lin gc->direction_output = vf610_gpio_direction_output; 263d32efe37SAxel Lin gc->set = vf610_gpio_set; 2647f2691a1SStefan Agner 2657f2691a1SStefan Agner ret = gpiochip_add(gc); 2667f2691a1SStefan Agner if (ret < 0) 2677f2691a1SStefan Agner return ret; 2687f2691a1SStefan Agner 2697f2691a1SStefan Agner /* Clear the interrupt status register for all GPIO's */ 2707f2691a1SStefan Agner vf610_gpio_writel(~0, port->base + PORT_ISFR); 2717f2691a1SStefan Agner 2727f2691a1SStefan Agner ret = gpiochip_irqchip_add(gc, &vf610_gpio_irq_chip, 0, 273fd968115SStefan Agner handle_edge_irq, IRQ_TYPE_NONE); 2747f2691a1SStefan Agner if (ret) { 2757f2691a1SStefan Agner dev_err(dev, "failed to add irqchip\n"); 2767f2691a1SStefan Agner gpiochip_remove(gc); 2777f2691a1SStefan Agner return ret; 2787f2691a1SStefan Agner } 2797f2691a1SStefan Agner gpiochip_set_chained_irqchip(gc, &vf610_gpio_irq_chip, port->irq, 2807f2691a1SStefan Agner vf610_gpio_irq_handler); 2817f2691a1SStefan Agner 2827f2691a1SStefan Agner return 0; 2837f2691a1SStefan Agner } 2847f2691a1SStefan Agner 2857f2691a1SStefan Agner static struct platform_driver vf610_gpio_driver = { 2867f2691a1SStefan Agner .driver = { 2877f2691a1SStefan Agner .name = "gpio-vf610", 2887f2691a1SStefan Agner .of_match_table = vf610_gpio_dt_ids, 2897f2691a1SStefan Agner }, 2907f2691a1SStefan Agner .probe = vf610_gpio_probe, 2917f2691a1SStefan Agner }; 2927f2691a1SStefan Agner 2937f2691a1SStefan Agner static int __init gpio_vf610_init(void) 2947f2691a1SStefan Agner { 2957f2691a1SStefan Agner return platform_driver_register(&vf610_gpio_driver); 2967f2691a1SStefan Agner } 2977f2691a1SStefan Agner device_initcall(gpio_vf610_init); 2987f2691a1SStefan Agner 2997f2691a1SStefan Agner MODULE_AUTHOR("Stefan Agner <stefan@agner.ch>"); 3007f2691a1SStefan Agner MODULE_DESCRIPTION("Freescale VF610 GPIO"); 3017f2691a1SStefan Agner MODULE_LICENSE("GPL v2"); 302