136e2add1SLinus Walleij // SPDX-License-Identifier: GPL-2.0+ 27f2691a1SStefan Agner /* 3adaaf63eSPaul Gortmaker * Freescale vf610 GPIO support through PORT and GPIO 47f2691a1SStefan Agner * 57f2691a1SStefan Agner * Copyright (c) 2014 Toradex AG. 67f2691a1SStefan Agner * 77f2691a1SStefan Agner * Author: Stefan Agner <stefan@agner.ch>. 87f2691a1SStefan Agner */ 97f2691a1SStefan Agner #include <linux/bitops.h> 1091393622SA.s. Dong #include <linux/clk.h> 117f2691a1SStefan Agner #include <linux/err.h> 1245e8296cSLinus Walleij #include <linux/gpio/driver.h> 137f2691a1SStefan Agner #include <linux/init.h> 147f2691a1SStefan Agner #include <linux/interrupt.h> 157f2691a1SStefan Agner #include <linux/io.h> 167f2691a1SStefan Agner #include <linux/ioport.h> 177f2691a1SStefan Agner #include <linux/irq.h> 187f2691a1SStefan Agner #include <linux/platform_device.h> 197f2691a1SStefan Agner #include <linux/of.h> 207f2691a1SStefan Agner #include <linux/of_device.h> 217f2691a1SStefan Agner #include <linux/of_irq.h> 22*8af3a0b2SLeon Romanovsky #include <linux/pinctrl/consumer.h> 237f2691a1SStefan Agner 247f2691a1SStefan Agner #define VF610_GPIO_PER_PORT 32 257f2691a1SStefan Agner 26659d8a62SDong Aisheng struct fsl_gpio_soc_data { 27659d8a62SDong Aisheng /* SoCs has a Port Data Direction Register (PDDR) */ 28659d8a62SDong Aisheng bool have_paddr; 29659d8a62SDong Aisheng }; 30659d8a62SDong Aisheng 317f2691a1SStefan Agner struct vf610_gpio_port { 327f2691a1SStefan Agner struct gpio_chip gc; 33338aa107SAndrey Smirnov struct irq_chip ic; 347f2691a1SStefan Agner void __iomem *base; 357f2691a1SStefan Agner void __iomem *gpio_base; 36659d8a62SDong Aisheng const struct fsl_gpio_soc_data *sdata; 377f2691a1SStefan Agner u8 irqc[VF610_GPIO_PER_PORT]; 3891393622SA.s. Dong struct clk *clk_port; 3991393622SA.s. Dong struct clk *clk_gpio; 407f2691a1SStefan Agner int irq; 417f2691a1SStefan Agner }; 427f2691a1SStefan Agner 437f2691a1SStefan Agner #define GPIO_PDOR 0x00 447f2691a1SStefan Agner #define GPIO_PSOR 0x04 457f2691a1SStefan Agner #define GPIO_PCOR 0x08 467f2691a1SStefan Agner #define GPIO_PTOR 0x0c 477f2691a1SStefan Agner #define GPIO_PDIR 0x10 48659d8a62SDong Aisheng #define GPIO_PDDR 0x14 497f2691a1SStefan Agner 507f2691a1SStefan Agner #define PORT_PCR(n) ((n) * 0x4) 517f2691a1SStefan Agner #define PORT_PCR_IRQC_OFFSET 16 527f2691a1SStefan Agner 537f2691a1SStefan Agner #define PORT_ISFR 0xa0 547f2691a1SStefan Agner #define PORT_DFER 0xc0 557f2691a1SStefan Agner #define PORT_DFCR 0xc4 567f2691a1SStefan Agner #define PORT_DFWR 0xc8 577f2691a1SStefan Agner 587f2691a1SStefan Agner #define PORT_INT_OFF 0x0 597f2691a1SStefan Agner #define PORT_INT_LOGIC_ZERO 0x8 607f2691a1SStefan Agner #define PORT_INT_RISING_EDGE 0x9 617f2691a1SStefan Agner #define PORT_INT_FALLING_EDGE 0xa 627f2691a1SStefan Agner #define PORT_INT_EITHER_EDGE 0xb 637f2691a1SStefan Agner #define PORT_INT_LOGIC_ONE 0xc 647f2691a1SStefan Agner 65659d8a62SDong Aisheng static const struct fsl_gpio_soc_data imx_data = { 66659d8a62SDong Aisheng .have_paddr = true, 67659d8a62SDong Aisheng }; 68659d8a62SDong Aisheng 697f2691a1SStefan Agner static const struct of_device_id vf610_gpio_dt_ids[] = { 70659d8a62SDong Aisheng { .compatible = "fsl,vf610-gpio", .data = NULL, }, 71659d8a62SDong Aisheng { .compatible = "fsl,imx7ulp-gpio", .data = &imx_data, }, 727f2691a1SStefan Agner { /* sentinel */ } 737f2691a1SStefan Agner }; 747f2691a1SStefan Agner 757f2691a1SStefan Agner static inline void vf610_gpio_writel(u32 val, void __iomem *reg) 767f2691a1SStefan Agner { 777f2691a1SStefan Agner writel_relaxed(val, reg); 787f2691a1SStefan Agner } 797f2691a1SStefan Agner 807f2691a1SStefan Agner static inline u32 vf610_gpio_readl(void __iomem *reg) 817f2691a1SStefan Agner { 827f2691a1SStefan Agner return readl_relaxed(reg); 837f2691a1SStefan Agner } 847f2691a1SStefan Agner 857f2691a1SStefan Agner static int vf610_gpio_get(struct gpio_chip *gc, unsigned int gpio) 867f2691a1SStefan Agner { 8765389b49SLinus Walleij struct vf610_gpio_port *port = gpiochip_get_data(gc); 88659d8a62SDong Aisheng unsigned long mask = BIT(gpio); 894a8909d0SAndrey Smirnov unsigned long offset = GPIO_PDIR; 907f2691a1SStefan Agner 91659d8a62SDong Aisheng if (port->sdata && port->sdata->have_paddr) { 92659d8a62SDong Aisheng mask &= vf610_gpio_readl(port->gpio_base + GPIO_PDDR); 934a8909d0SAndrey Smirnov if (mask) 944a8909d0SAndrey Smirnov offset = GPIO_PDOR; 95659d8a62SDong Aisheng } 964a8909d0SAndrey Smirnov 974a8909d0SAndrey Smirnov return !!(vf610_gpio_readl(port->gpio_base + offset) & BIT(gpio)); 987f2691a1SStefan Agner } 997f2691a1SStefan Agner 1007f2691a1SStefan Agner static void vf610_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) 1017f2691a1SStefan Agner { 10265389b49SLinus Walleij struct vf610_gpio_port *port = gpiochip_get_data(gc); 1037f2691a1SStefan Agner unsigned long mask = BIT(gpio); 104a262555bSAndrey Smirnov unsigned long offset = val ? GPIO_PSOR : GPIO_PCOR; 1057f2691a1SStefan Agner 106a262555bSAndrey Smirnov vf610_gpio_writel(mask, port->gpio_base + offset); 1077f2691a1SStefan Agner } 1087f2691a1SStefan Agner 1097f2691a1SStefan Agner static int vf610_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) 1107f2691a1SStefan Agner { 111659d8a62SDong Aisheng struct vf610_gpio_port *port = gpiochip_get_data(chip); 112659d8a62SDong Aisheng unsigned long mask = BIT(gpio); 113659d8a62SDong Aisheng u32 val; 114659d8a62SDong Aisheng 115659d8a62SDong Aisheng if (port->sdata && port->sdata->have_paddr) { 116659d8a62SDong Aisheng val = vf610_gpio_readl(port->gpio_base + GPIO_PDDR); 117659d8a62SDong Aisheng val &= ~mask; 118659d8a62SDong Aisheng vf610_gpio_writel(val, port->gpio_base + GPIO_PDDR); 119659d8a62SDong Aisheng } 120659d8a62SDong Aisheng 1217f2691a1SStefan Agner return pinctrl_gpio_direction_input(chip->base + gpio); 1227f2691a1SStefan Agner } 1237f2691a1SStefan Agner 1247f2691a1SStefan Agner static int vf610_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, 1257f2691a1SStefan Agner int value) 1267f2691a1SStefan Agner { 127659d8a62SDong Aisheng struct vf610_gpio_port *port = gpiochip_get_data(chip); 128659d8a62SDong Aisheng unsigned long mask = BIT(gpio); 1299bf3ac46SHaibo Chen u32 val; 130659d8a62SDong Aisheng 1319bf3ac46SHaibo Chen if (port->sdata && port->sdata->have_paddr) { 1329bf3ac46SHaibo Chen val = vf610_gpio_readl(port->gpio_base + GPIO_PDDR); 1339bf3ac46SHaibo Chen val |= mask; 1349bf3ac46SHaibo Chen vf610_gpio_writel(val, port->gpio_base + GPIO_PDDR); 1359bf3ac46SHaibo Chen } 136659d8a62SDong Aisheng 1377f2691a1SStefan Agner vf610_gpio_set(chip, gpio, value); 1387f2691a1SStefan Agner 1397f2691a1SStefan Agner return pinctrl_gpio_direction_output(chip->base + gpio); 1407f2691a1SStefan Agner } 1417f2691a1SStefan Agner 142bd0b9ac4SThomas Gleixner static void vf610_gpio_irq_handler(struct irq_desc *desc) 1437f2691a1SStefan Agner { 1442f930643SLinus Walleij struct vf610_gpio_port *port = 14565389b49SLinus Walleij gpiochip_get_data(irq_desc_get_handler_data(desc)); 1467f2691a1SStefan Agner struct irq_chip *chip = irq_desc_get_chip(desc); 1477f2691a1SStefan Agner int pin; 1487f2691a1SStefan Agner unsigned long irq_isfr; 1497f2691a1SStefan Agner 1507f2691a1SStefan Agner chained_irq_enter(chip, desc); 1517f2691a1SStefan Agner 1527f2691a1SStefan Agner irq_isfr = vf610_gpio_readl(port->base + PORT_ISFR); 1537f2691a1SStefan Agner 1547f2691a1SStefan Agner for_each_set_bit(pin, &irq_isfr, VF610_GPIO_PER_PORT) { 1557f2691a1SStefan Agner vf610_gpio_writel(BIT(pin), port->base + PORT_ISFR); 1567f2691a1SStefan Agner 157dbd1c54fSMarc Zyngier generic_handle_domain_irq(port->gc.irq.domain, pin); 1587f2691a1SStefan Agner } 1597f2691a1SStefan Agner 1607f2691a1SStefan Agner chained_irq_exit(chip, desc); 1617f2691a1SStefan Agner } 1627f2691a1SStefan Agner 1637f2691a1SStefan Agner static void vf610_gpio_irq_ack(struct irq_data *d) 1647f2691a1SStefan Agner { 1652f930643SLinus Walleij struct vf610_gpio_port *port = 16665389b49SLinus Walleij gpiochip_get_data(irq_data_get_irq_chip_data(d)); 1677f2691a1SStefan Agner int gpio = d->hwirq; 1687f2691a1SStefan Agner 1697f2691a1SStefan Agner vf610_gpio_writel(BIT(gpio), port->base + PORT_ISFR); 1707f2691a1SStefan Agner } 1717f2691a1SStefan Agner 1727f2691a1SStefan Agner static int vf610_gpio_irq_set_type(struct irq_data *d, u32 type) 1737f2691a1SStefan Agner { 1742f930643SLinus Walleij struct vf610_gpio_port *port = 17565389b49SLinus Walleij gpiochip_get_data(irq_data_get_irq_chip_data(d)); 1767f2691a1SStefan Agner u8 irqc; 1777f2691a1SStefan Agner 1787f2691a1SStefan Agner switch (type) { 1797f2691a1SStefan Agner case IRQ_TYPE_EDGE_RISING: 1807f2691a1SStefan Agner irqc = PORT_INT_RISING_EDGE; 1817f2691a1SStefan Agner break; 1827f2691a1SStefan Agner case IRQ_TYPE_EDGE_FALLING: 1837f2691a1SStefan Agner irqc = PORT_INT_FALLING_EDGE; 1847f2691a1SStefan Agner break; 1857f2691a1SStefan Agner case IRQ_TYPE_EDGE_BOTH: 1867f2691a1SStefan Agner irqc = PORT_INT_EITHER_EDGE; 1877f2691a1SStefan Agner break; 1887f2691a1SStefan Agner case IRQ_TYPE_LEVEL_LOW: 1897f2691a1SStefan Agner irqc = PORT_INT_LOGIC_ZERO; 1907f2691a1SStefan Agner break; 1917f2691a1SStefan Agner case IRQ_TYPE_LEVEL_HIGH: 1927f2691a1SStefan Agner irqc = PORT_INT_LOGIC_ONE; 1937f2691a1SStefan Agner break; 1947f2691a1SStefan Agner default: 1957f2691a1SStefan Agner return -EINVAL; 1967f2691a1SStefan Agner } 1977f2691a1SStefan Agner 1987f2691a1SStefan Agner port->irqc[d->hwirq] = irqc; 1997f2691a1SStefan Agner 200fd968115SStefan Agner if (type & IRQ_TYPE_LEVEL_MASK) 201a7147db0SThomas Gleixner irq_set_handler_locked(d, handle_level_irq); 202fd968115SStefan Agner else 203a7147db0SThomas Gleixner irq_set_handler_locked(d, handle_edge_irq); 204fd968115SStefan Agner 2057f2691a1SStefan Agner return 0; 2067f2691a1SStefan Agner } 2077f2691a1SStefan Agner 2087f2691a1SStefan Agner static void vf610_gpio_irq_mask(struct irq_data *d) 2097f2691a1SStefan Agner { 2102f930643SLinus Walleij struct vf610_gpio_port *port = 21165389b49SLinus Walleij gpiochip_get_data(irq_data_get_irq_chip_data(d)); 2127f2691a1SStefan Agner void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq); 2137f2691a1SStefan Agner 2147f2691a1SStefan Agner vf610_gpio_writel(0, pcr_base); 2157f2691a1SStefan Agner } 2167f2691a1SStefan Agner 2177f2691a1SStefan Agner static void vf610_gpio_irq_unmask(struct irq_data *d) 2187f2691a1SStefan Agner { 2192f930643SLinus Walleij struct vf610_gpio_port *port = 22065389b49SLinus Walleij gpiochip_get_data(irq_data_get_irq_chip_data(d)); 2217f2691a1SStefan Agner void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq); 2227f2691a1SStefan Agner 2237f2691a1SStefan Agner vf610_gpio_writel(port->irqc[d->hwirq] << PORT_PCR_IRQC_OFFSET, 2247f2691a1SStefan Agner pcr_base); 2257f2691a1SStefan Agner } 2267f2691a1SStefan Agner 2277f2691a1SStefan Agner static int vf610_gpio_irq_set_wake(struct irq_data *d, u32 enable) 2287f2691a1SStefan Agner { 2292f930643SLinus Walleij struct vf610_gpio_port *port = 23065389b49SLinus Walleij gpiochip_get_data(irq_data_get_irq_chip_data(d)); 2317f2691a1SStefan Agner 2327f2691a1SStefan Agner if (enable) 2337f2691a1SStefan Agner enable_irq_wake(port->irq); 2347f2691a1SStefan Agner else 2357f2691a1SStefan Agner disable_irq_wake(port->irq); 2367f2691a1SStefan Agner 2377f2691a1SStefan Agner return 0; 2387f2691a1SStefan Agner } 2397f2691a1SStefan Agner 240db9ed63cSAndrey Smirnov static void vf610_gpio_disable_clk(void *data) 241db9ed63cSAndrey Smirnov { 242db9ed63cSAndrey Smirnov clk_disable_unprepare(data); 243db9ed63cSAndrey Smirnov } 2447f2691a1SStefan Agner 2457f2691a1SStefan Agner static int vf610_gpio_probe(struct platform_device *pdev) 2467f2691a1SStefan Agner { 2477f2691a1SStefan Agner struct device *dev = &pdev->dev; 2487f2691a1SStefan Agner struct device_node *np = dev->of_node; 2497f2691a1SStefan Agner struct vf610_gpio_port *port; 2507f2691a1SStefan Agner struct gpio_chip *gc; 251e599256aSLinus Walleij struct gpio_irq_chip *girq; 252338aa107SAndrey Smirnov struct irq_chip *ic; 2537ae710f9SAndrew Lunn int i; 2547f2691a1SStefan Agner int ret; 2557f2691a1SStefan Agner 2562e35bb6cSAndrey Smirnov port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL); 2577f2691a1SStefan Agner if (!port) 2587f2691a1SStefan Agner return -ENOMEM; 2597f2691a1SStefan Agner 26023e577ebSThierry Reding port->sdata = of_device_get_match_data(dev); 261df53665bSEnrico Weigelt, metux IT consult port->base = devm_platform_ioremap_resource(pdev, 0); 2627f2691a1SStefan Agner if (IS_ERR(port->base)) 2637f2691a1SStefan Agner return PTR_ERR(port->base); 2647f2691a1SStefan Agner 265df53665bSEnrico Weigelt, metux IT consult port->gpio_base = devm_platform_ioremap_resource(pdev, 1); 2667f2691a1SStefan Agner if (IS_ERR(port->gpio_base)) 2677f2691a1SStefan Agner return PTR_ERR(port->gpio_base); 2687f2691a1SStefan Agner 2697f2691a1SStefan Agner port->irq = platform_get_irq(pdev, 0); 2707f2691a1SStefan Agner if (port->irq < 0) 2717f2691a1SStefan Agner return port->irq; 2727f2691a1SStefan Agner 2732e35bb6cSAndrey Smirnov port->clk_port = devm_clk_get(dev, "port"); 274663ba742SAndrey Smirnov ret = PTR_ERR_OR_ZERO(port->clk_port); 275663ba742SAndrey Smirnov if (!ret) { 27691393622SA.s. Dong ret = clk_prepare_enable(port->clk_port); 27791393622SA.s. Dong if (ret) 27891393622SA.s. Dong return ret; 279db9ed63cSAndrey Smirnov ret = devm_add_action_or_reset(dev, vf610_gpio_disable_clk, 280db9ed63cSAndrey Smirnov port->clk_port); 281db9ed63cSAndrey Smirnov if (ret) 282db9ed63cSAndrey Smirnov return ret; 283663ba742SAndrey Smirnov } else if (ret == -EPROBE_DEFER) { 28491393622SA.s. Dong /* 28591393622SA.s. Dong * Percolate deferrals, for anything else, 28691393622SA.s. Dong * just live without the clocking. 28791393622SA.s. Dong */ 288663ba742SAndrey Smirnov return ret; 28991393622SA.s. Dong } 29091393622SA.s. Dong 2912e35bb6cSAndrey Smirnov port->clk_gpio = devm_clk_get(dev, "gpio"); 292663ba742SAndrey Smirnov ret = PTR_ERR_OR_ZERO(port->clk_gpio); 293663ba742SAndrey Smirnov if (!ret) { 29491393622SA.s. Dong ret = clk_prepare_enable(port->clk_gpio); 295db9ed63cSAndrey Smirnov if (ret) 29691393622SA.s. Dong return ret; 297fc57949cSAndrey Smirnov ret = devm_add_action_or_reset(dev, vf610_gpio_disable_clk, 298fc57949cSAndrey Smirnov port->clk_gpio); 299fc57949cSAndrey Smirnov if (ret) 300fc57949cSAndrey Smirnov return ret; 301663ba742SAndrey Smirnov } else if (ret == -EPROBE_DEFER) { 302663ba742SAndrey Smirnov return ret; 30391393622SA.s. Dong } 30491393622SA.s. Dong 3057f2691a1SStefan Agner gc = &port->gc; 30658383c78SLinus Walleij gc->parent = dev; 307d32efe37SAxel Lin gc->label = "vf610-gpio"; 308d32efe37SAxel Lin gc->ngpio = VF610_GPIO_PER_PORT; 3097f2691a1SStefan Agner gc->base = of_alias_get_id(np, "gpio") * VF610_GPIO_PER_PORT; 3107f2691a1SStefan Agner 311203f0daaSJonas Gorski gc->request = gpiochip_generic_request; 312203f0daaSJonas Gorski gc->free = gpiochip_generic_free; 313d32efe37SAxel Lin gc->direction_input = vf610_gpio_direction_input; 314d32efe37SAxel Lin gc->get = vf610_gpio_get; 315d32efe37SAxel Lin gc->direction_output = vf610_gpio_direction_output; 316d32efe37SAxel Lin gc->set = vf610_gpio_set; 3177f2691a1SStefan Agner 318338aa107SAndrey Smirnov ic = &port->ic; 319338aa107SAndrey Smirnov ic->name = "gpio-vf610"; 320338aa107SAndrey Smirnov ic->irq_ack = vf610_gpio_irq_ack; 321338aa107SAndrey Smirnov ic->irq_mask = vf610_gpio_irq_mask; 322338aa107SAndrey Smirnov ic->irq_unmask = vf610_gpio_irq_unmask; 323338aa107SAndrey Smirnov ic->irq_set_type = vf610_gpio_irq_set_type; 324338aa107SAndrey Smirnov ic->irq_set_wake = vf610_gpio_irq_set_wake; 325338aa107SAndrey Smirnov 3267ae710f9SAndrew Lunn /* Mask all GPIO interrupts */ 3277ae710f9SAndrew Lunn for (i = 0; i < gc->ngpio; i++) 3287ae710f9SAndrew Lunn vf610_gpio_writel(0, port->base + PORT_PCR(i)); 3297ae710f9SAndrew Lunn 3307f2691a1SStefan Agner /* Clear the interrupt status register for all GPIO's */ 3317f2691a1SStefan Agner vf610_gpio_writel(~0, port->base + PORT_ISFR); 3327f2691a1SStefan Agner 333e599256aSLinus Walleij girq = &gc->irq; 334e599256aSLinus Walleij girq->chip = ic; 335e599256aSLinus Walleij girq->parent_handler = vf610_gpio_irq_handler; 336e599256aSLinus Walleij girq->num_parents = 1; 337e599256aSLinus Walleij girq->parents = devm_kcalloc(&pdev->dev, 1, 338e599256aSLinus Walleij sizeof(*girq->parents), 339e599256aSLinus Walleij GFP_KERNEL); 340e599256aSLinus Walleij if (!girq->parents) 341e599256aSLinus Walleij return -ENOMEM; 342e599256aSLinus Walleij girq->parents[0] = port->irq; 343e599256aSLinus Walleij girq->default_type = IRQ_TYPE_NONE; 344e599256aSLinus Walleij girq->handler = handle_edge_irq; 3457f2691a1SStefan Agner 346e599256aSLinus Walleij return devm_gpiochip_add_data(dev, gc, port); 3477f2691a1SStefan Agner } 3487f2691a1SStefan Agner 3497f2691a1SStefan Agner static struct platform_driver vf610_gpio_driver = { 3507f2691a1SStefan Agner .driver = { 3517f2691a1SStefan Agner .name = "gpio-vf610", 3527f2691a1SStefan Agner .of_match_table = vf610_gpio_dt_ids, 3537f2691a1SStefan Agner }, 3547f2691a1SStefan Agner .probe = vf610_gpio_probe, 3557f2691a1SStefan Agner }; 3567f2691a1SStefan Agner 357df950da1SGeliang Tang builtin_platform_driver(vf610_gpio_driver); 358