136e2add1SLinus Walleij // SPDX-License-Identifier: GPL-2.0+ 27f2691a1SStefan Agner /* 3adaaf63eSPaul Gortmaker * Freescale vf610 GPIO support through PORT and GPIO 47f2691a1SStefan Agner * 57f2691a1SStefan Agner * Copyright (c) 2014 Toradex AG. 67f2691a1SStefan Agner * 77f2691a1SStefan Agner * Author: Stefan Agner <stefan@agner.ch>. 87f2691a1SStefan Agner */ 97f2691a1SStefan Agner #include <linux/bitops.h> 1091393622SA.s. Dong #include <linux/clk.h> 117f2691a1SStefan Agner #include <linux/err.h> 1245e8296cSLinus Walleij #include <linux/gpio/driver.h> 137f2691a1SStefan Agner #include <linux/init.h> 147f2691a1SStefan Agner #include <linux/interrupt.h> 157f2691a1SStefan Agner #include <linux/io.h> 167f2691a1SStefan Agner #include <linux/ioport.h> 177f2691a1SStefan Agner #include <linux/irq.h> 187f2691a1SStefan Agner #include <linux/platform_device.h> 197f2691a1SStefan Agner #include <linux/of.h> 207f2691a1SStefan Agner #include <linux/of_device.h> 217f2691a1SStefan Agner #include <linux/of_irq.h> 227f2691a1SStefan Agner 237f2691a1SStefan Agner #define VF610_GPIO_PER_PORT 32 247f2691a1SStefan Agner 25659d8a62SDong Aisheng struct fsl_gpio_soc_data { 26659d8a62SDong Aisheng /* SoCs has a Port Data Direction Register (PDDR) */ 27659d8a62SDong Aisheng bool have_paddr; 28659d8a62SDong Aisheng }; 29659d8a62SDong Aisheng 307f2691a1SStefan Agner struct vf610_gpio_port { 317f2691a1SStefan Agner struct gpio_chip gc; 32338aa107SAndrey Smirnov struct irq_chip ic; 337f2691a1SStefan Agner void __iomem *base; 347f2691a1SStefan Agner void __iomem *gpio_base; 35659d8a62SDong Aisheng const struct fsl_gpio_soc_data *sdata; 367f2691a1SStefan Agner u8 irqc[VF610_GPIO_PER_PORT]; 3791393622SA.s. Dong struct clk *clk_port; 3891393622SA.s. Dong struct clk *clk_gpio; 397f2691a1SStefan Agner int irq; 407f2691a1SStefan Agner }; 417f2691a1SStefan Agner 427f2691a1SStefan Agner #define GPIO_PDOR 0x00 437f2691a1SStefan Agner #define GPIO_PSOR 0x04 447f2691a1SStefan Agner #define GPIO_PCOR 0x08 457f2691a1SStefan Agner #define GPIO_PTOR 0x0c 467f2691a1SStefan Agner #define GPIO_PDIR 0x10 47659d8a62SDong Aisheng #define GPIO_PDDR 0x14 487f2691a1SStefan Agner 497f2691a1SStefan Agner #define PORT_PCR(n) ((n) * 0x4) 507f2691a1SStefan Agner #define PORT_PCR_IRQC_OFFSET 16 517f2691a1SStefan Agner 527f2691a1SStefan Agner #define PORT_ISFR 0xa0 537f2691a1SStefan Agner #define PORT_DFER 0xc0 547f2691a1SStefan Agner #define PORT_DFCR 0xc4 557f2691a1SStefan Agner #define PORT_DFWR 0xc8 567f2691a1SStefan Agner 577f2691a1SStefan Agner #define PORT_INT_OFF 0x0 587f2691a1SStefan Agner #define PORT_INT_LOGIC_ZERO 0x8 597f2691a1SStefan Agner #define PORT_INT_RISING_EDGE 0x9 607f2691a1SStefan Agner #define PORT_INT_FALLING_EDGE 0xa 617f2691a1SStefan Agner #define PORT_INT_EITHER_EDGE 0xb 627f2691a1SStefan Agner #define PORT_INT_LOGIC_ONE 0xc 637f2691a1SStefan Agner 64659d8a62SDong Aisheng static const struct fsl_gpio_soc_data imx_data = { 65659d8a62SDong Aisheng .have_paddr = true, 66659d8a62SDong Aisheng }; 67659d8a62SDong Aisheng 687f2691a1SStefan Agner static const struct of_device_id vf610_gpio_dt_ids[] = { 69659d8a62SDong Aisheng { .compatible = "fsl,vf610-gpio", .data = NULL, }, 70659d8a62SDong Aisheng { .compatible = "fsl,imx7ulp-gpio", .data = &imx_data, }, 717f2691a1SStefan Agner { /* sentinel */ } 727f2691a1SStefan Agner }; 737f2691a1SStefan Agner 747f2691a1SStefan Agner static inline void vf610_gpio_writel(u32 val, void __iomem *reg) 757f2691a1SStefan Agner { 767f2691a1SStefan Agner writel_relaxed(val, reg); 777f2691a1SStefan Agner } 787f2691a1SStefan Agner 797f2691a1SStefan Agner static inline u32 vf610_gpio_readl(void __iomem *reg) 807f2691a1SStefan Agner { 817f2691a1SStefan Agner return readl_relaxed(reg); 827f2691a1SStefan Agner } 837f2691a1SStefan Agner 847f2691a1SStefan Agner static int vf610_gpio_get(struct gpio_chip *gc, unsigned int gpio) 857f2691a1SStefan Agner { 8665389b49SLinus Walleij struct vf610_gpio_port *port = gpiochip_get_data(gc); 87659d8a62SDong Aisheng unsigned long mask = BIT(gpio); 884a8909d0SAndrey Smirnov unsigned long offset = GPIO_PDIR; 897f2691a1SStefan Agner 90659d8a62SDong Aisheng if (port->sdata && port->sdata->have_paddr) { 91659d8a62SDong Aisheng mask &= vf610_gpio_readl(port->gpio_base + GPIO_PDDR); 924a8909d0SAndrey Smirnov if (mask) 934a8909d0SAndrey Smirnov offset = GPIO_PDOR; 94659d8a62SDong Aisheng } 954a8909d0SAndrey Smirnov 964a8909d0SAndrey Smirnov return !!(vf610_gpio_readl(port->gpio_base + offset) & BIT(gpio)); 977f2691a1SStefan Agner } 987f2691a1SStefan Agner 997f2691a1SStefan Agner static void vf610_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) 1007f2691a1SStefan Agner { 10165389b49SLinus Walleij struct vf610_gpio_port *port = gpiochip_get_data(gc); 1027f2691a1SStefan Agner unsigned long mask = BIT(gpio); 103a262555bSAndrey Smirnov unsigned long offset = val ? GPIO_PSOR : GPIO_PCOR; 1047f2691a1SStefan Agner 105a262555bSAndrey Smirnov vf610_gpio_writel(mask, port->gpio_base + offset); 1067f2691a1SStefan Agner } 1077f2691a1SStefan Agner 1087f2691a1SStefan Agner static int vf610_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) 1097f2691a1SStefan Agner { 110659d8a62SDong Aisheng struct vf610_gpio_port *port = gpiochip_get_data(chip); 111659d8a62SDong Aisheng unsigned long mask = BIT(gpio); 112659d8a62SDong Aisheng u32 val; 113659d8a62SDong Aisheng 114659d8a62SDong Aisheng if (port->sdata && port->sdata->have_paddr) { 115659d8a62SDong Aisheng val = vf610_gpio_readl(port->gpio_base + GPIO_PDDR); 116659d8a62SDong Aisheng val &= ~mask; 117659d8a62SDong Aisheng vf610_gpio_writel(val, port->gpio_base + GPIO_PDDR); 118659d8a62SDong Aisheng } 119659d8a62SDong Aisheng 1207f2691a1SStefan Agner return pinctrl_gpio_direction_input(chip->base + gpio); 1217f2691a1SStefan Agner } 1227f2691a1SStefan Agner 1237f2691a1SStefan Agner static int vf610_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, 1247f2691a1SStefan Agner int value) 1257f2691a1SStefan Agner { 126659d8a62SDong Aisheng struct vf610_gpio_port *port = gpiochip_get_data(chip); 127659d8a62SDong Aisheng unsigned long mask = BIT(gpio); 128659d8a62SDong Aisheng 129659d8a62SDong Aisheng if (port->sdata && port->sdata->have_paddr) 130659d8a62SDong Aisheng vf610_gpio_writel(mask, port->gpio_base + GPIO_PDDR); 131659d8a62SDong Aisheng 1327f2691a1SStefan Agner vf610_gpio_set(chip, gpio, value); 1337f2691a1SStefan Agner 1347f2691a1SStefan Agner return pinctrl_gpio_direction_output(chip->base + gpio); 1357f2691a1SStefan Agner } 1367f2691a1SStefan Agner 137bd0b9ac4SThomas Gleixner static void vf610_gpio_irq_handler(struct irq_desc *desc) 1387f2691a1SStefan Agner { 1392f930643SLinus Walleij struct vf610_gpio_port *port = 14065389b49SLinus Walleij gpiochip_get_data(irq_desc_get_handler_data(desc)); 1417f2691a1SStefan Agner struct irq_chip *chip = irq_desc_get_chip(desc); 1427f2691a1SStefan Agner int pin; 1437f2691a1SStefan Agner unsigned long irq_isfr; 1447f2691a1SStefan Agner 1457f2691a1SStefan Agner chained_irq_enter(chip, desc); 1467f2691a1SStefan Agner 1477f2691a1SStefan Agner irq_isfr = vf610_gpio_readl(port->base + PORT_ISFR); 1487f2691a1SStefan Agner 1497f2691a1SStefan Agner for_each_set_bit(pin, &irq_isfr, VF610_GPIO_PER_PORT) { 1507f2691a1SStefan Agner vf610_gpio_writel(BIT(pin), port->base + PORT_ISFR); 1517f2691a1SStefan Agner 152f0fbe7bcSThierry Reding generic_handle_irq(irq_find_mapping(port->gc.irq.domain, pin)); 1537f2691a1SStefan Agner } 1547f2691a1SStefan Agner 1557f2691a1SStefan Agner chained_irq_exit(chip, desc); 1567f2691a1SStefan Agner } 1577f2691a1SStefan Agner 1587f2691a1SStefan Agner static void vf610_gpio_irq_ack(struct irq_data *d) 1597f2691a1SStefan Agner { 1602f930643SLinus Walleij struct vf610_gpio_port *port = 16165389b49SLinus Walleij gpiochip_get_data(irq_data_get_irq_chip_data(d)); 1627f2691a1SStefan Agner int gpio = d->hwirq; 1637f2691a1SStefan Agner 1647f2691a1SStefan Agner vf610_gpio_writel(BIT(gpio), port->base + PORT_ISFR); 1657f2691a1SStefan Agner } 1667f2691a1SStefan Agner 1677f2691a1SStefan Agner static int vf610_gpio_irq_set_type(struct irq_data *d, u32 type) 1687f2691a1SStefan Agner { 1692f930643SLinus Walleij struct vf610_gpio_port *port = 17065389b49SLinus Walleij gpiochip_get_data(irq_data_get_irq_chip_data(d)); 1717f2691a1SStefan Agner u8 irqc; 1727f2691a1SStefan Agner 1737f2691a1SStefan Agner switch (type) { 1747f2691a1SStefan Agner case IRQ_TYPE_EDGE_RISING: 1757f2691a1SStefan Agner irqc = PORT_INT_RISING_EDGE; 1767f2691a1SStefan Agner break; 1777f2691a1SStefan Agner case IRQ_TYPE_EDGE_FALLING: 1787f2691a1SStefan Agner irqc = PORT_INT_FALLING_EDGE; 1797f2691a1SStefan Agner break; 1807f2691a1SStefan Agner case IRQ_TYPE_EDGE_BOTH: 1817f2691a1SStefan Agner irqc = PORT_INT_EITHER_EDGE; 1827f2691a1SStefan Agner break; 1837f2691a1SStefan Agner case IRQ_TYPE_LEVEL_LOW: 1847f2691a1SStefan Agner irqc = PORT_INT_LOGIC_ZERO; 1857f2691a1SStefan Agner break; 1867f2691a1SStefan Agner case IRQ_TYPE_LEVEL_HIGH: 1877f2691a1SStefan Agner irqc = PORT_INT_LOGIC_ONE; 1887f2691a1SStefan Agner break; 1897f2691a1SStefan Agner default: 1907f2691a1SStefan Agner return -EINVAL; 1917f2691a1SStefan Agner } 1927f2691a1SStefan Agner 1937f2691a1SStefan Agner port->irqc[d->hwirq] = irqc; 1947f2691a1SStefan Agner 195fd968115SStefan Agner if (type & IRQ_TYPE_LEVEL_MASK) 196a7147db0SThomas Gleixner irq_set_handler_locked(d, handle_level_irq); 197fd968115SStefan Agner else 198a7147db0SThomas Gleixner irq_set_handler_locked(d, handle_edge_irq); 199fd968115SStefan Agner 2007f2691a1SStefan Agner return 0; 2017f2691a1SStefan Agner } 2027f2691a1SStefan Agner 2037f2691a1SStefan Agner static void vf610_gpio_irq_mask(struct irq_data *d) 2047f2691a1SStefan Agner { 2052f930643SLinus Walleij struct vf610_gpio_port *port = 20665389b49SLinus Walleij gpiochip_get_data(irq_data_get_irq_chip_data(d)); 2077f2691a1SStefan Agner void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq); 2087f2691a1SStefan Agner 2097f2691a1SStefan Agner vf610_gpio_writel(0, pcr_base); 2107f2691a1SStefan Agner } 2117f2691a1SStefan Agner 2127f2691a1SStefan Agner static void vf610_gpio_irq_unmask(struct irq_data *d) 2137f2691a1SStefan Agner { 2142f930643SLinus Walleij struct vf610_gpio_port *port = 21565389b49SLinus Walleij gpiochip_get_data(irq_data_get_irq_chip_data(d)); 2167f2691a1SStefan Agner void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq); 2177f2691a1SStefan Agner 2187f2691a1SStefan Agner vf610_gpio_writel(port->irqc[d->hwirq] << PORT_PCR_IRQC_OFFSET, 2197f2691a1SStefan Agner pcr_base); 2207f2691a1SStefan Agner } 2217f2691a1SStefan Agner 2227f2691a1SStefan Agner static int vf610_gpio_irq_set_wake(struct irq_data *d, u32 enable) 2237f2691a1SStefan Agner { 2242f930643SLinus Walleij struct vf610_gpio_port *port = 22565389b49SLinus Walleij gpiochip_get_data(irq_data_get_irq_chip_data(d)); 2267f2691a1SStefan Agner 2277f2691a1SStefan Agner if (enable) 2287f2691a1SStefan Agner enable_irq_wake(port->irq); 2297f2691a1SStefan Agner else 2307f2691a1SStefan Agner disable_irq_wake(port->irq); 2317f2691a1SStefan Agner 2327f2691a1SStefan Agner return 0; 2337f2691a1SStefan Agner } 2347f2691a1SStefan Agner 2357f2691a1SStefan Agner static int vf610_gpio_probe(struct platform_device *pdev) 2367f2691a1SStefan Agner { 2377f2691a1SStefan Agner struct device *dev = &pdev->dev; 2387f2691a1SStefan Agner struct device_node *np = dev->of_node; 2397f2691a1SStefan Agner struct vf610_gpio_port *port; 2407f2691a1SStefan Agner struct resource *iores; 2417f2691a1SStefan Agner struct gpio_chip *gc; 242338aa107SAndrey Smirnov struct irq_chip *ic; 2437ae710f9SAndrew Lunn int i; 2447f2691a1SStefan Agner int ret; 2457f2691a1SStefan Agner 2467f2691a1SStefan Agner port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL); 2477f2691a1SStefan Agner if (!port) 2487f2691a1SStefan Agner return -ENOMEM; 2497f2691a1SStefan Agner 25023e577ebSThierry Reding port->sdata = of_device_get_match_data(dev); 2517f2691a1SStefan Agner iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2527f2691a1SStefan Agner port->base = devm_ioremap_resource(dev, iores); 2537f2691a1SStefan Agner if (IS_ERR(port->base)) 2547f2691a1SStefan Agner return PTR_ERR(port->base); 2557f2691a1SStefan Agner 2567f2691a1SStefan Agner iores = platform_get_resource(pdev, IORESOURCE_MEM, 1); 2577f2691a1SStefan Agner port->gpio_base = devm_ioremap_resource(dev, iores); 2587f2691a1SStefan Agner if (IS_ERR(port->gpio_base)) 2597f2691a1SStefan Agner return PTR_ERR(port->gpio_base); 2607f2691a1SStefan Agner 2617f2691a1SStefan Agner port->irq = platform_get_irq(pdev, 0); 2627f2691a1SStefan Agner if (port->irq < 0) 2637f2691a1SStefan Agner return port->irq; 2647f2691a1SStefan Agner 26591393622SA.s. Dong port->clk_port = devm_clk_get(&pdev->dev, "port"); 26691393622SA.s. Dong if (!IS_ERR(port->clk_port)) { 26791393622SA.s. Dong ret = clk_prepare_enable(port->clk_port); 26891393622SA.s. Dong if (ret) 26991393622SA.s. Dong return ret; 27091393622SA.s. Dong } else if (port->clk_port == ERR_PTR(-EPROBE_DEFER)) { 27191393622SA.s. Dong /* 27291393622SA.s. Dong * Percolate deferrals, for anything else, 27391393622SA.s. Dong * just live without the clocking. 27491393622SA.s. Dong */ 27591393622SA.s. Dong return PTR_ERR(port->clk_port); 27691393622SA.s. Dong } 27791393622SA.s. Dong 27891393622SA.s. Dong port->clk_gpio = devm_clk_get(&pdev->dev, "gpio"); 27991393622SA.s. Dong if (!IS_ERR(port->clk_gpio)) { 28091393622SA.s. Dong ret = clk_prepare_enable(port->clk_gpio); 28191393622SA.s. Dong if (ret) { 28291393622SA.s. Dong clk_disable_unprepare(port->clk_port); 28391393622SA.s. Dong return ret; 28491393622SA.s. Dong } 28591393622SA.s. Dong } else if (port->clk_gpio == ERR_PTR(-EPROBE_DEFER)) { 28691393622SA.s. Dong clk_disable_unprepare(port->clk_port); 28791393622SA.s. Dong return PTR_ERR(port->clk_gpio); 28891393622SA.s. Dong } 28991393622SA.s. Dong 29091393622SA.s. Dong platform_set_drvdata(pdev, port); 29191393622SA.s. Dong 2927f2691a1SStefan Agner gc = &port->gc; 2937f2691a1SStefan Agner gc->of_node = np; 29458383c78SLinus Walleij gc->parent = dev; 295d32efe37SAxel Lin gc->label = "vf610-gpio"; 296d32efe37SAxel Lin gc->ngpio = VF610_GPIO_PER_PORT; 2977f2691a1SStefan Agner gc->base = of_alias_get_id(np, "gpio") * VF610_GPIO_PER_PORT; 2987f2691a1SStefan Agner 299203f0daaSJonas Gorski gc->request = gpiochip_generic_request; 300203f0daaSJonas Gorski gc->free = gpiochip_generic_free; 301d32efe37SAxel Lin gc->direction_input = vf610_gpio_direction_input; 302d32efe37SAxel Lin gc->get = vf610_gpio_get; 303d32efe37SAxel Lin gc->direction_output = vf610_gpio_direction_output; 304d32efe37SAxel Lin gc->set = vf610_gpio_set; 3057f2691a1SStefan Agner 306338aa107SAndrey Smirnov ic = &port->ic; 307338aa107SAndrey Smirnov ic->name = "gpio-vf610"; 308338aa107SAndrey Smirnov ic->irq_ack = vf610_gpio_irq_ack; 309338aa107SAndrey Smirnov ic->irq_mask = vf610_gpio_irq_mask; 310338aa107SAndrey Smirnov ic->irq_unmask = vf610_gpio_irq_unmask; 311338aa107SAndrey Smirnov ic->irq_set_type = vf610_gpio_irq_set_type; 312338aa107SAndrey Smirnov ic->irq_set_wake = vf610_gpio_irq_set_wake; 313338aa107SAndrey Smirnov 31465389b49SLinus Walleij ret = gpiochip_add_data(gc, port); 3157f2691a1SStefan Agner if (ret < 0) 3167f2691a1SStefan Agner return ret; 3177f2691a1SStefan Agner 3187ae710f9SAndrew Lunn /* Mask all GPIO interrupts */ 3197ae710f9SAndrew Lunn for (i = 0; i < gc->ngpio; i++) 3207ae710f9SAndrew Lunn vf610_gpio_writel(0, port->base + PORT_PCR(i)); 3217ae710f9SAndrew Lunn 3227f2691a1SStefan Agner /* Clear the interrupt status register for all GPIO's */ 3237f2691a1SStefan Agner vf610_gpio_writel(~0, port->base + PORT_ISFR); 3247f2691a1SStefan Agner 325338aa107SAndrey Smirnov ret = gpiochip_irqchip_add(gc, ic, 0, handle_edge_irq, IRQ_TYPE_NONE); 3267f2691a1SStefan Agner if (ret) { 3277f2691a1SStefan Agner dev_err(dev, "failed to add irqchip\n"); 3287f2691a1SStefan Agner gpiochip_remove(gc); 3297f2691a1SStefan Agner return ret; 3307f2691a1SStefan Agner } 331338aa107SAndrey Smirnov gpiochip_set_chained_irqchip(gc, ic, port->irq, 3327f2691a1SStefan Agner vf610_gpio_irq_handler); 3337f2691a1SStefan Agner 3347f2691a1SStefan Agner return 0; 3357f2691a1SStefan Agner } 3367f2691a1SStefan Agner 33791393622SA.s. Dong static int vf610_gpio_remove(struct platform_device *pdev) 33891393622SA.s. Dong { 33991393622SA.s. Dong struct vf610_gpio_port *port = platform_get_drvdata(pdev); 34091393622SA.s. Dong 34191393622SA.s. Dong gpiochip_remove(&port->gc); 34291393622SA.s. Dong if (!IS_ERR(port->clk_port)) 34391393622SA.s. Dong clk_disable_unprepare(port->clk_port); 34491393622SA.s. Dong if (!IS_ERR(port->clk_gpio)) 34591393622SA.s. Dong clk_disable_unprepare(port->clk_gpio); 34691393622SA.s. Dong 34791393622SA.s. Dong return 0; 34891393622SA.s. Dong } 34991393622SA.s. Dong 3507f2691a1SStefan Agner static struct platform_driver vf610_gpio_driver = { 3517f2691a1SStefan Agner .driver = { 3527f2691a1SStefan Agner .name = "gpio-vf610", 3537f2691a1SStefan Agner .of_match_table = vf610_gpio_dt_ids, 3547f2691a1SStefan Agner }, 3557f2691a1SStefan Agner .probe = vf610_gpio_probe, 35691393622SA.s. Dong .remove = vf610_gpio_remove, 3577f2691a1SStefan Agner }; 3587f2691a1SStefan Agner 359df950da1SGeliang Tang builtin_platform_driver(vf610_gpio_driver); 360