xref: /openbmc/linux/drivers/gpio/gpio-syscon.c (revision 6a8a0c1d)
16a8a0c1dSAlexander Shiyan /*
26a8a0c1dSAlexander Shiyan  *  SYSCON GPIO driver
36a8a0c1dSAlexander Shiyan  *
46a8a0c1dSAlexander Shiyan  *  Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
56a8a0c1dSAlexander Shiyan  *
66a8a0c1dSAlexander Shiyan  * This program is free software; you can redistribute it and/or modify
76a8a0c1dSAlexander Shiyan  * it under the terms of the GNU General Public License as published by
86a8a0c1dSAlexander Shiyan  * the Free Software Foundation; either version 2 of the License, or
96a8a0c1dSAlexander Shiyan  * (at your option) any later version.
106a8a0c1dSAlexander Shiyan  */
116a8a0c1dSAlexander Shiyan 
126a8a0c1dSAlexander Shiyan #include <linux/err.h>
136a8a0c1dSAlexander Shiyan #include <linux/gpio.h>
146a8a0c1dSAlexander Shiyan #include <linux/module.h>
156a8a0c1dSAlexander Shiyan #include <linux/of.h>
166a8a0c1dSAlexander Shiyan #include <linux/of_device.h>
176a8a0c1dSAlexander Shiyan #include <linux/platform_device.h>
186a8a0c1dSAlexander Shiyan #include <linux/regmap.h>
196a8a0c1dSAlexander Shiyan #include <linux/mfd/syscon.h>
206a8a0c1dSAlexander Shiyan 
216a8a0c1dSAlexander Shiyan #define GPIO_SYSCON_FEAT_IN	BIT(0)
226a8a0c1dSAlexander Shiyan #define GPIO_SYSCON_FEAT_OUT	BIT(1)
236a8a0c1dSAlexander Shiyan #define GPIO_SYSCON_FEAT_DIR	BIT(2)
246a8a0c1dSAlexander Shiyan 
256a8a0c1dSAlexander Shiyan /* SYSCON driver is designed to use 32-bit wide registers */
266a8a0c1dSAlexander Shiyan #define SYSCON_REG_SIZE		(4)
276a8a0c1dSAlexander Shiyan #define SYSCON_REG_BITS		(SYSCON_REG_SIZE * 8)
286a8a0c1dSAlexander Shiyan 
296a8a0c1dSAlexander Shiyan /**
306a8a0c1dSAlexander Shiyan  * struct syscon_gpio_data - Configuration for the device.
316a8a0c1dSAlexander Shiyan  * compatible:		SYSCON driver compatible string.
326a8a0c1dSAlexander Shiyan  * flags:		Set of GPIO_SYSCON_FEAT_ flags:
336a8a0c1dSAlexander Shiyan  *			GPIO_SYSCON_FEAT_IN:	GPIOs supports input,
346a8a0c1dSAlexander Shiyan  *			GPIO_SYSCON_FEAT_OUT:	GPIOs supports output,
356a8a0c1dSAlexander Shiyan  *			GPIO_SYSCON_FEAT_DIR:	GPIOs supports switch direction.
366a8a0c1dSAlexander Shiyan  * bit_count:		Number of bits used as GPIOs.
376a8a0c1dSAlexander Shiyan  * dat_bit_offset:	Offset (in bits) to the first GPIO bit.
386a8a0c1dSAlexander Shiyan  * dir_bit_offset:	Optional offset (in bits) to the first bit to switch
396a8a0c1dSAlexander Shiyan  *			GPIO direction (Used with GPIO_SYSCON_FEAT_DIR flag).
406a8a0c1dSAlexander Shiyan  */
416a8a0c1dSAlexander Shiyan 
426a8a0c1dSAlexander Shiyan struct syscon_gpio_data {
436a8a0c1dSAlexander Shiyan 	const char	*compatible;
446a8a0c1dSAlexander Shiyan 	unsigned int	flags;
456a8a0c1dSAlexander Shiyan 	unsigned int	bit_count;
466a8a0c1dSAlexander Shiyan 	unsigned int	dat_bit_offset;
476a8a0c1dSAlexander Shiyan 	unsigned int	dir_bit_offset;
486a8a0c1dSAlexander Shiyan };
496a8a0c1dSAlexander Shiyan 
506a8a0c1dSAlexander Shiyan struct syscon_gpio_priv {
516a8a0c1dSAlexander Shiyan 	struct gpio_chip		chip;
526a8a0c1dSAlexander Shiyan 	struct regmap			*syscon;
536a8a0c1dSAlexander Shiyan 	const struct syscon_gpio_data	*data;
546a8a0c1dSAlexander Shiyan };
556a8a0c1dSAlexander Shiyan 
566a8a0c1dSAlexander Shiyan static inline struct syscon_gpio_priv *to_syscon_gpio(struct gpio_chip *chip)
576a8a0c1dSAlexander Shiyan {
586a8a0c1dSAlexander Shiyan 	return container_of(chip, struct syscon_gpio_priv, chip);
596a8a0c1dSAlexander Shiyan }
606a8a0c1dSAlexander Shiyan 
616a8a0c1dSAlexander Shiyan static int syscon_gpio_get(struct gpio_chip *chip, unsigned offset)
626a8a0c1dSAlexander Shiyan {
636a8a0c1dSAlexander Shiyan 	struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
646a8a0c1dSAlexander Shiyan 	unsigned int val, offs = priv->data->dat_bit_offset + offset;
656a8a0c1dSAlexander Shiyan 	int ret;
666a8a0c1dSAlexander Shiyan 
676a8a0c1dSAlexander Shiyan 	ret = regmap_read(priv->syscon,
686a8a0c1dSAlexander Shiyan 			  (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE, &val);
696a8a0c1dSAlexander Shiyan 	if (ret)
706a8a0c1dSAlexander Shiyan 		return ret;
716a8a0c1dSAlexander Shiyan 
726a8a0c1dSAlexander Shiyan 	return !!(val & BIT(offs % SYSCON_REG_BITS));
736a8a0c1dSAlexander Shiyan }
746a8a0c1dSAlexander Shiyan 
756a8a0c1dSAlexander Shiyan static void syscon_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
766a8a0c1dSAlexander Shiyan {
776a8a0c1dSAlexander Shiyan 	struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
786a8a0c1dSAlexander Shiyan 	unsigned int offs = priv->data->dat_bit_offset + offset;
796a8a0c1dSAlexander Shiyan 
806a8a0c1dSAlexander Shiyan 	regmap_update_bits(priv->syscon,
816a8a0c1dSAlexander Shiyan 			   (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE,
826a8a0c1dSAlexander Shiyan 			   BIT(offs % SYSCON_REG_BITS),
836a8a0c1dSAlexander Shiyan 			   val ? BIT(offs % SYSCON_REG_BITS) : 0);
846a8a0c1dSAlexander Shiyan }
856a8a0c1dSAlexander Shiyan 
866a8a0c1dSAlexander Shiyan static int syscon_gpio_dir_in(struct gpio_chip *chip, unsigned offset)
876a8a0c1dSAlexander Shiyan {
886a8a0c1dSAlexander Shiyan 	struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
896a8a0c1dSAlexander Shiyan 
906a8a0c1dSAlexander Shiyan 	if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) {
916a8a0c1dSAlexander Shiyan 		unsigned int offs = priv->data->dir_bit_offset + offset;
926a8a0c1dSAlexander Shiyan 
936a8a0c1dSAlexander Shiyan 		regmap_update_bits(priv->syscon,
946a8a0c1dSAlexander Shiyan 				   (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE,
956a8a0c1dSAlexander Shiyan 				   BIT(offs % SYSCON_REG_BITS), 0);
966a8a0c1dSAlexander Shiyan 	}
976a8a0c1dSAlexander Shiyan 
986a8a0c1dSAlexander Shiyan 	return 0;
996a8a0c1dSAlexander Shiyan }
1006a8a0c1dSAlexander Shiyan 
1016a8a0c1dSAlexander Shiyan static int syscon_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int val)
1026a8a0c1dSAlexander Shiyan {
1036a8a0c1dSAlexander Shiyan 	struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
1046a8a0c1dSAlexander Shiyan 
1056a8a0c1dSAlexander Shiyan 	if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) {
1066a8a0c1dSAlexander Shiyan 		unsigned int offs = priv->data->dir_bit_offset + offset;
1076a8a0c1dSAlexander Shiyan 
1086a8a0c1dSAlexander Shiyan 		regmap_update_bits(priv->syscon,
1096a8a0c1dSAlexander Shiyan 				   (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE,
1106a8a0c1dSAlexander Shiyan 				   BIT(offs % SYSCON_REG_BITS),
1116a8a0c1dSAlexander Shiyan 				   BIT(offs % SYSCON_REG_BITS));
1126a8a0c1dSAlexander Shiyan 	}
1136a8a0c1dSAlexander Shiyan 
1146a8a0c1dSAlexander Shiyan 	syscon_gpio_set(chip, offset, val);
1156a8a0c1dSAlexander Shiyan 
1166a8a0c1dSAlexander Shiyan 	return 0;
1176a8a0c1dSAlexander Shiyan }
1186a8a0c1dSAlexander Shiyan 
1196a8a0c1dSAlexander Shiyan static const struct syscon_gpio_data clps711x_mctrl_gpio = {
1206a8a0c1dSAlexander Shiyan 	/* ARM CLPS711X SYSFLG1 Bits 8-10 */
1216a8a0c1dSAlexander Shiyan 	.compatible	= "cirrus,clps711x-syscon1",
1226a8a0c1dSAlexander Shiyan 	.flags		= GPIO_SYSCON_FEAT_IN,
1236a8a0c1dSAlexander Shiyan 	.bit_count	= 3,
1246a8a0c1dSAlexander Shiyan 	.dat_bit_offset	= 0x40 * 8 + 8,
1256a8a0c1dSAlexander Shiyan };
1266a8a0c1dSAlexander Shiyan 
1276a8a0c1dSAlexander Shiyan static const struct of_device_id syscon_gpio_ids[] = {
1286a8a0c1dSAlexander Shiyan 	{
1296a8a0c1dSAlexander Shiyan 		.compatible	= "cirrus,clps711x-mctrl-gpio",
1306a8a0c1dSAlexander Shiyan 		.data		= &clps711x_mctrl_gpio,
1316a8a0c1dSAlexander Shiyan 	},
1326a8a0c1dSAlexander Shiyan 	{ }
1336a8a0c1dSAlexander Shiyan };
1346a8a0c1dSAlexander Shiyan MODULE_DEVICE_TABLE(of, syscon_gpio_ids);
1356a8a0c1dSAlexander Shiyan 
1366a8a0c1dSAlexander Shiyan static int syscon_gpio_probe(struct platform_device *pdev)
1376a8a0c1dSAlexander Shiyan {
1386a8a0c1dSAlexander Shiyan 	struct device *dev = &pdev->dev;
1396a8a0c1dSAlexander Shiyan 	const struct of_device_id *of_id = of_match_device(syscon_gpio_ids, dev);
1406a8a0c1dSAlexander Shiyan 	struct syscon_gpio_priv *priv;
1416a8a0c1dSAlexander Shiyan 
1426a8a0c1dSAlexander Shiyan 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
1436a8a0c1dSAlexander Shiyan 	if (!priv)
1446a8a0c1dSAlexander Shiyan 		return -ENOMEM;
1456a8a0c1dSAlexander Shiyan 
1466a8a0c1dSAlexander Shiyan 	priv->data = of_id->data;
1476a8a0c1dSAlexander Shiyan 
1486a8a0c1dSAlexander Shiyan 	priv->syscon =
1496a8a0c1dSAlexander Shiyan 		syscon_regmap_lookup_by_compatible(priv->data->compatible);
1506a8a0c1dSAlexander Shiyan 	if (IS_ERR(priv->syscon))
1516a8a0c1dSAlexander Shiyan 		return PTR_ERR(priv->syscon);
1526a8a0c1dSAlexander Shiyan 
1536a8a0c1dSAlexander Shiyan 	priv->chip.dev = dev;
1546a8a0c1dSAlexander Shiyan 	priv->chip.owner = THIS_MODULE;
1556a8a0c1dSAlexander Shiyan 	priv->chip.label = dev_name(dev);
1566a8a0c1dSAlexander Shiyan 	priv->chip.base = -1;
1576a8a0c1dSAlexander Shiyan 	priv->chip.ngpio = priv->data->bit_count;
1586a8a0c1dSAlexander Shiyan 	priv->chip.get = syscon_gpio_get;
1596a8a0c1dSAlexander Shiyan 	if (priv->data->flags & GPIO_SYSCON_FEAT_IN)
1606a8a0c1dSAlexander Shiyan 		priv->chip.direction_input = syscon_gpio_dir_in;
1616a8a0c1dSAlexander Shiyan 	if (priv->data->flags & GPIO_SYSCON_FEAT_OUT) {
1626a8a0c1dSAlexander Shiyan 		priv->chip.set = syscon_gpio_set;
1636a8a0c1dSAlexander Shiyan 		priv->chip.direction_output = syscon_gpio_dir_out;
1646a8a0c1dSAlexander Shiyan 	}
1656a8a0c1dSAlexander Shiyan 
1666a8a0c1dSAlexander Shiyan 	platform_set_drvdata(pdev, priv);
1676a8a0c1dSAlexander Shiyan 
1686a8a0c1dSAlexander Shiyan 	return gpiochip_add(&priv->chip);
1696a8a0c1dSAlexander Shiyan }
1706a8a0c1dSAlexander Shiyan 
1716a8a0c1dSAlexander Shiyan static int syscon_gpio_remove(struct platform_device *pdev)
1726a8a0c1dSAlexander Shiyan {
1736a8a0c1dSAlexander Shiyan 	struct syscon_gpio_priv *priv = platform_get_drvdata(pdev);
1746a8a0c1dSAlexander Shiyan 
1756a8a0c1dSAlexander Shiyan 	return gpiochip_remove(&priv->chip);
1766a8a0c1dSAlexander Shiyan }
1776a8a0c1dSAlexander Shiyan 
1786a8a0c1dSAlexander Shiyan static struct platform_driver syscon_gpio_driver = {
1796a8a0c1dSAlexander Shiyan 	.driver	= {
1806a8a0c1dSAlexander Shiyan 		.name		= "gpio-syscon",
1816a8a0c1dSAlexander Shiyan 		.owner		= THIS_MODULE,
1826a8a0c1dSAlexander Shiyan 		.of_match_table	= syscon_gpio_ids,
1836a8a0c1dSAlexander Shiyan 	},
1846a8a0c1dSAlexander Shiyan 	.probe	= syscon_gpio_probe,
1856a8a0c1dSAlexander Shiyan 	.remove	= syscon_gpio_remove,
1866a8a0c1dSAlexander Shiyan };
1876a8a0c1dSAlexander Shiyan module_platform_driver(syscon_gpio_driver);
1886a8a0c1dSAlexander Shiyan 
1896a8a0c1dSAlexander Shiyan MODULE_AUTHOR("Alexander Shiyan <shc_work@mail.ru>");
1906a8a0c1dSAlexander Shiyan MODULE_DESCRIPTION("SYSCON GPIO driver");
1916a8a0c1dSAlexander Shiyan MODULE_LICENSE("GPL");
192