1 /* 2 * GPIO interface for Intel Poulsbo SCH 3 * 4 * Copyright (c) 2010 CompuLab Ltd 5 * Author: Denis Turischev <denis@compulab.co.il> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License 2 as published 9 * by the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; see the file COPYING. If not, write to 18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 19 */ 20 21 #include <linux/init.h> 22 #include <linux/kernel.h> 23 #include <linux/module.h> 24 #include <linux/io.h> 25 #include <linux/errno.h> 26 #include <linux/acpi.h> 27 #include <linux/platform_device.h> 28 #include <linux/pci_ids.h> 29 #include <linux/gpio/driver.h> 30 31 #define GEN 0x00 32 #define GIO 0x04 33 #define GLV 0x08 34 35 struct sch_gpio { 36 struct gpio_chip chip; 37 spinlock_t lock; 38 unsigned short iobase; 39 unsigned short core_base; 40 unsigned short resume_base; 41 }; 42 43 static unsigned sch_gpio_offset(struct sch_gpio *sch, unsigned gpio, 44 unsigned reg) 45 { 46 unsigned base = 0; 47 48 if (gpio >= sch->resume_base) { 49 gpio -= sch->resume_base; 50 base += 0x20; 51 } 52 53 return base + reg + gpio / 8; 54 } 55 56 static unsigned sch_gpio_bit(struct sch_gpio *sch, unsigned gpio) 57 { 58 if (gpio >= sch->resume_base) 59 gpio -= sch->resume_base; 60 return gpio % 8; 61 } 62 63 static int sch_gpio_reg_get(struct sch_gpio *sch, unsigned gpio, unsigned reg) 64 { 65 unsigned short offset, bit; 66 u8 reg_val; 67 68 offset = sch_gpio_offset(sch, gpio, reg); 69 bit = sch_gpio_bit(sch, gpio); 70 71 reg_val = !!(inb(sch->iobase + offset) & BIT(bit)); 72 73 return reg_val; 74 } 75 76 static void sch_gpio_reg_set(struct sch_gpio *sch, unsigned gpio, unsigned reg, 77 int val) 78 { 79 unsigned short offset, bit; 80 u8 reg_val; 81 82 offset = sch_gpio_offset(sch, gpio, reg); 83 bit = sch_gpio_bit(sch, gpio); 84 85 reg_val = inb(sch->iobase + offset); 86 87 if (val) 88 outb(reg_val | BIT(bit), sch->iobase + offset); 89 else 90 outb((reg_val & ~BIT(bit)), sch->iobase + offset); 91 } 92 93 static int sch_gpio_direction_in(struct gpio_chip *gc, unsigned gpio_num) 94 { 95 struct sch_gpio *sch = gpiochip_get_data(gc); 96 97 spin_lock(&sch->lock); 98 sch_gpio_reg_set(sch, gpio_num, GIO, 1); 99 spin_unlock(&sch->lock); 100 return 0; 101 } 102 103 static int sch_gpio_get(struct gpio_chip *gc, unsigned gpio_num) 104 { 105 struct sch_gpio *sch = gpiochip_get_data(gc); 106 return sch_gpio_reg_get(sch, gpio_num, GLV); 107 } 108 109 static void sch_gpio_set(struct gpio_chip *gc, unsigned gpio_num, int val) 110 { 111 struct sch_gpio *sch = gpiochip_get_data(gc); 112 113 spin_lock(&sch->lock); 114 sch_gpio_reg_set(sch, gpio_num, GLV, val); 115 spin_unlock(&sch->lock); 116 } 117 118 static int sch_gpio_direction_out(struct gpio_chip *gc, unsigned gpio_num, 119 int val) 120 { 121 struct sch_gpio *sch = gpiochip_get_data(gc); 122 123 spin_lock(&sch->lock); 124 sch_gpio_reg_set(sch, gpio_num, GIO, 0); 125 spin_unlock(&sch->lock); 126 127 /* 128 * according to the datasheet, writing to the level register has no 129 * effect when GPIO is programmed as input. 130 * Actually the the level register is read-only when configured as input. 131 * Thus presetting the output level before switching to output is _NOT_ possible. 132 * Hence we set the level after configuring the GPIO as output. 133 * But we cannot prevent a short low pulse if direction is set to high 134 * and an external pull-up is connected. 135 */ 136 sch_gpio_set(gc, gpio_num, val); 137 return 0; 138 } 139 140 static int sch_gpio_get_direction(struct gpio_chip *gc, unsigned gpio_num) 141 { 142 struct sch_gpio *sch = gpiochip_get_data(gc); 143 144 return sch_gpio_reg_get(sch, gpio_num, GIO); 145 } 146 147 static const struct gpio_chip sch_gpio_chip = { 148 .label = "sch_gpio", 149 .owner = THIS_MODULE, 150 .direction_input = sch_gpio_direction_in, 151 .get = sch_gpio_get, 152 .direction_output = sch_gpio_direction_out, 153 .set = sch_gpio_set, 154 .get_direction = sch_gpio_get_direction, 155 }; 156 157 static int sch_gpio_probe(struct platform_device *pdev) 158 { 159 struct sch_gpio *sch; 160 struct resource *res; 161 162 sch = devm_kzalloc(&pdev->dev, sizeof(*sch), GFP_KERNEL); 163 if (!sch) 164 return -ENOMEM; 165 166 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 167 if (!res) 168 return -EBUSY; 169 170 if (!devm_request_region(&pdev->dev, res->start, resource_size(res), 171 pdev->name)) 172 return -EBUSY; 173 174 spin_lock_init(&sch->lock); 175 sch->iobase = res->start; 176 sch->chip = sch_gpio_chip; 177 sch->chip.label = dev_name(&pdev->dev); 178 sch->chip.parent = &pdev->dev; 179 180 switch (pdev->id) { 181 case PCI_DEVICE_ID_INTEL_SCH_LPC: 182 sch->core_base = 0; 183 sch->resume_base = 10; 184 sch->chip.ngpio = 14; 185 186 /* 187 * GPIO[6:0] enabled by default 188 * GPIO7 is configured by the CMC as SLPIOVR 189 * Enable GPIO[9:8] core powered gpios explicitly 190 */ 191 sch_gpio_reg_set(sch, 8, GEN, 1); 192 sch_gpio_reg_set(sch, 9, GEN, 1); 193 /* 194 * SUS_GPIO[2:0] enabled by default 195 * Enable SUS_GPIO3 resume powered gpio explicitly 196 */ 197 sch_gpio_reg_set(sch, 13, GEN, 1); 198 break; 199 200 case PCI_DEVICE_ID_INTEL_ITC_LPC: 201 sch->core_base = 0; 202 sch->resume_base = 5; 203 sch->chip.ngpio = 14; 204 break; 205 206 case PCI_DEVICE_ID_INTEL_CENTERTON_ILB: 207 sch->core_base = 0; 208 sch->resume_base = 21; 209 sch->chip.ngpio = 30; 210 break; 211 212 case PCI_DEVICE_ID_INTEL_QUARK_X1000_ILB: 213 sch->core_base = 0; 214 sch->resume_base = 2; 215 sch->chip.ngpio = 8; 216 break; 217 218 default: 219 return -ENODEV; 220 } 221 222 platform_set_drvdata(pdev, sch); 223 224 return devm_gpiochip_add_data(&pdev->dev, &sch->chip, sch); 225 } 226 227 static struct platform_driver sch_gpio_driver = { 228 .driver = { 229 .name = "sch_gpio", 230 }, 231 .probe = sch_gpio_probe, 232 }; 233 234 module_platform_driver(sch_gpio_driver); 235 236 MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>"); 237 MODULE_DESCRIPTION("GPIO interface for Intel Poulsbo SCH"); 238 MODULE_LICENSE("GPL"); 239 MODULE_ALIAS("platform:sch_gpio"); 240