1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * PCA953x 4/8/16/24/40 bit I/O ports 4 * 5 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com> 6 * Copyright (C) 2007 Marvell International Ltd. 7 * 8 * Derived from drivers/i2c/chips/pca9539.c 9 */ 10 11 #include <linux/acpi.h> 12 #include <linux/bitmap.h> 13 #include <linux/gpio/driver.h> 14 #include <linux/gpio/consumer.h> 15 #include <linux/i2c.h> 16 #include <linux/init.h> 17 #include <linux/interrupt.h> 18 #include <linux/module.h> 19 #include <linux/of_platform.h> 20 #include <linux/platform_data/pca953x.h> 21 #include <linux/regmap.h> 22 #include <linux/regulator/consumer.h> 23 #include <linux/slab.h> 24 25 #include <asm/unaligned.h> 26 27 #define PCA953X_INPUT 0x00 28 #define PCA953X_OUTPUT 0x01 29 #define PCA953X_INVERT 0x02 30 #define PCA953X_DIRECTION 0x03 31 32 #define REG_ADDR_MASK GENMASK(5, 0) 33 #define REG_ADDR_EXT BIT(6) 34 #define REG_ADDR_AI BIT(7) 35 36 #define PCA957X_IN 0x00 37 #define PCA957X_INVRT 0x01 38 #define PCA957X_BKEN 0x02 39 #define PCA957X_PUPD 0x03 40 #define PCA957X_CFG 0x04 41 #define PCA957X_OUT 0x05 42 #define PCA957X_MSK 0x06 43 #define PCA957X_INTS 0x07 44 45 #define PCAL953X_OUT_STRENGTH 0x20 46 #define PCAL953X_IN_LATCH 0x22 47 #define PCAL953X_PULL_EN 0x23 48 #define PCAL953X_PULL_SEL 0x24 49 #define PCAL953X_INT_MASK 0x25 50 #define PCAL953X_INT_STAT 0x26 51 #define PCAL953X_OUT_CONF 0x27 52 53 #define PCAL6524_INT_EDGE 0x28 54 #define PCAL6524_INT_CLR 0x2a 55 #define PCAL6524_IN_STATUS 0x2b 56 #define PCAL6524_OUT_INDCONF 0x2c 57 #define PCAL6524_DEBOUNCE 0x2d 58 59 #define PCA_GPIO_MASK GENMASK(7, 0) 60 61 #define PCAL_GPIO_MASK GENMASK(4, 0) 62 #define PCAL_PINCTRL_MASK GENMASK(6, 5) 63 64 #define PCA_INT BIT(8) 65 #define PCA_PCAL BIT(9) 66 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT) 67 #define PCA953X_TYPE BIT(12) 68 #define PCA957X_TYPE BIT(13) 69 #define PCA_TYPE_MASK GENMASK(15, 12) 70 71 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK) 72 73 static const struct i2c_device_id pca953x_id[] = { 74 { "pca6416", 16 | PCA953X_TYPE | PCA_INT, }, 75 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, }, 76 { "pca9506", 40 | PCA953X_TYPE | PCA_INT, }, 77 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, }, 78 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, }, 79 { "pca9536", 4 | PCA953X_TYPE, }, 80 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, }, 81 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, }, 82 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, }, 83 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, }, 84 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, }, 85 { "pca9556", 8 | PCA953X_TYPE, }, 86 { "pca9557", 8 | PCA953X_TYPE, }, 87 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, }, 88 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, }, 89 { "pca9698", 40 | PCA953X_TYPE, }, 90 91 { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, 92 { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, }, 93 { "pcal9535", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, 94 { "pcal9554b", 8 | PCA953X_TYPE | PCA_LATCH_INT, }, 95 { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, 96 97 { "max7310", 8 | PCA953X_TYPE, }, 98 { "max7312", 16 | PCA953X_TYPE | PCA_INT, }, 99 { "max7313", 16 | PCA953X_TYPE | PCA_INT, }, 100 { "max7315", 8 | PCA953X_TYPE | PCA_INT, }, 101 { "max7318", 16 | PCA953X_TYPE | PCA_INT, }, 102 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, }, 103 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, }, 104 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, }, 105 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, }, 106 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, }, 107 { "tca9554", 8 | PCA953X_TYPE | PCA_INT, }, 108 { "xra1202", 8 | PCA953X_TYPE }, 109 { } 110 }; 111 MODULE_DEVICE_TABLE(i2c, pca953x_id); 112 113 #ifdef CONFIG_GPIO_PCA953X_IRQ 114 115 #include <linux/dmi.h> 116 117 static const struct acpi_gpio_params pca953x_irq_gpios = { 0, 0, true }; 118 119 static const struct acpi_gpio_mapping pca953x_acpi_irq_gpios[] = { 120 { "irq-gpios", &pca953x_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER }, 121 { } 122 }; 123 124 static int pca953x_acpi_get_irq(struct device *dev) 125 { 126 int ret; 127 128 ret = devm_acpi_dev_add_driver_gpios(dev, pca953x_acpi_irq_gpios); 129 if (ret) 130 dev_warn(dev, "can't add GPIO ACPI mapping\n"); 131 132 ret = acpi_dev_gpio_irq_get_by(ACPI_COMPANION(dev), "irq-gpios", 0); 133 if (ret < 0) 134 return ret; 135 136 dev_info(dev, "ACPI interrupt quirk (IRQ %d)\n", ret); 137 return ret; 138 } 139 140 static const struct dmi_system_id pca953x_dmi_acpi_irq_info[] = { 141 { 142 /* 143 * On Intel Galileo Gen 2 board the IRQ pin of one of 144 * the I²C GPIO expanders, which has GpioInt() resource, 145 * is provided as an absolute number instead of being 146 * relative. Since first controller (gpio-sch.c) and 147 * second (gpio-dwapb.c) are at the fixed bases, we may 148 * safely refer to the number in the global space to get 149 * an IRQ out of it. 150 */ 151 .matches = { 152 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"), 153 }, 154 }, 155 {} 156 }; 157 #endif 158 159 static const struct acpi_device_id pca953x_acpi_ids[] = { 160 { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, 161 { } 162 }; 163 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids); 164 165 #define MAX_BANK 5 166 #define BANK_SZ 8 167 #define MAX_LINE (MAX_BANK * BANK_SZ) 168 169 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ) 170 171 struct pca953x_reg_config { 172 int direction; 173 int output; 174 int input; 175 int invert; 176 }; 177 178 static const struct pca953x_reg_config pca953x_regs = { 179 .direction = PCA953X_DIRECTION, 180 .output = PCA953X_OUTPUT, 181 .input = PCA953X_INPUT, 182 .invert = PCA953X_INVERT, 183 }; 184 185 static const struct pca953x_reg_config pca957x_regs = { 186 .direction = PCA957X_CFG, 187 .output = PCA957X_OUT, 188 .input = PCA957X_IN, 189 .invert = PCA957X_INVRT, 190 }; 191 192 struct pca953x_chip { 193 unsigned gpio_start; 194 struct mutex i2c_lock; 195 struct regmap *regmap; 196 197 #ifdef CONFIG_GPIO_PCA953X_IRQ 198 struct mutex irq_lock; 199 DECLARE_BITMAP(irq_mask, MAX_LINE); 200 DECLARE_BITMAP(irq_stat, MAX_LINE); 201 DECLARE_BITMAP(irq_trig_raise, MAX_LINE); 202 DECLARE_BITMAP(irq_trig_fall, MAX_LINE); 203 struct irq_chip irq_chip; 204 #endif 205 atomic_t wakeup_path; 206 207 struct i2c_client *client; 208 struct gpio_chip gpio_chip; 209 const char *const *names; 210 unsigned long driver_data; 211 struct regulator *regulator; 212 213 const struct pca953x_reg_config *regs; 214 }; 215 216 static int pca953x_bank_shift(struct pca953x_chip *chip) 217 { 218 return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 219 } 220 221 #define PCA953x_BANK_INPUT BIT(0) 222 #define PCA953x_BANK_OUTPUT BIT(1) 223 #define PCA953x_BANK_POLARITY BIT(2) 224 #define PCA953x_BANK_CONFIG BIT(3) 225 226 #define PCA957x_BANK_INPUT BIT(0) 227 #define PCA957x_BANK_POLARITY BIT(1) 228 #define PCA957x_BANK_BUSHOLD BIT(2) 229 #define PCA957x_BANK_CONFIG BIT(4) 230 #define PCA957x_BANK_OUTPUT BIT(5) 231 232 #define PCAL9xxx_BANK_IN_LATCH BIT(8 + 2) 233 #define PCAL9xxx_BANK_PULL_EN BIT(8 + 3) 234 #define PCAL9xxx_BANK_PULL_SEL BIT(8 + 4) 235 #define PCAL9xxx_BANK_IRQ_MASK BIT(8 + 5) 236 #define PCAL9xxx_BANK_IRQ_STAT BIT(8 + 6) 237 238 /* 239 * We care about the following registers: 240 * - Standard set, below 0x40, each port can be replicated up to 8 times 241 * - PCA953x standard 242 * Input port 0x00 + 0 * bank_size R 243 * Output port 0x00 + 1 * bank_size RW 244 * Polarity Inversion port 0x00 + 2 * bank_size RW 245 * Configuration port 0x00 + 3 * bank_size RW 246 * - PCA957x with mixed up registers 247 * Input port 0x00 + 0 * bank_size R 248 * Polarity Inversion port 0x00 + 1 * bank_size RW 249 * Bus hold port 0x00 + 2 * bank_size RW 250 * Configuration port 0x00 + 4 * bank_size RW 251 * Output port 0x00 + 5 * bank_size RW 252 * 253 * - Extended set, above 0x40, often chip specific. 254 * - PCAL6524/PCAL9555A with custom PCAL IRQ handling: 255 * Input latch register 0x40 + 2 * bank_size RW 256 * Pull-up/pull-down enable reg 0x40 + 3 * bank_size RW 257 * Pull-up/pull-down select reg 0x40 + 4 * bank_size RW 258 * Interrupt mask register 0x40 + 5 * bank_size RW 259 * Interrupt status register 0x40 + 6 * bank_size R 260 * 261 * - Registers with bit 0x80 set, the AI bit 262 * The bit is cleared and the registers fall into one of the 263 * categories above. 264 */ 265 266 static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg, 267 u32 checkbank) 268 { 269 int bank_shift = pca953x_bank_shift(chip); 270 int bank = (reg & REG_ADDR_MASK) >> bank_shift; 271 int offset = reg & (BIT(bank_shift) - 1); 272 273 /* Special PCAL extended register check. */ 274 if (reg & REG_ADDR_EXT) { 275 if (!(chip->driver_data & PCA_PCAL)) 276 return false; 277 bank += 8; 278 } 279 280 /* Register is not in the matching bank. */ 281 if (!(BIT(bank) & checkbank)) 282 return false; 283 284 /* Register is not within allowed range of bank. */ 285 if (offset >= NBANK(chip)) 286 return false; 287 288 return true; 289 } 290 291 static bool pca953x_readable_register(struct device *dev, unsigned int reg) 292 { 293 struct pca953x_chip *chip = dev_get_drvdata(dev); 294 u32 bank; 295 296 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { 297 bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT | 298 PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG; 299 } else { 300 bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT | 301 PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG | 302 PCA957x_BANK_BUSHOLD; 303 } 304 305 if (chip->driver_data & PCA_PCAL) { 306 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN | 307 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK | 308 PCAL9xxx_BANK_IRQ_STAT; 309 } 310 311 return pca953x_check_register(chip, reg, bank); 312 } 313 314 static bool pca953x_writeable_register(struct device *dev, unsigned int reg) 315 { 316 struct pca953x_chip *chip = dev_get_drvdata(dev); 317 u32 bank; 318 319 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { 320 bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY | 321 PCA953x_BANK_CONFIG; 322 } else { 323 bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY | 324 PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD; 325 } 326 327 if (chip->driver_data & PCA_PCAL) 328 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN | 329 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK; 330 331 return pca953x_check_register(chip, reg, bank); 332 } 333 334 static bool pca953x_volatile_register(struct device *dev, unsigned int reg) 335 { 336 struct pca953x_chip *chip = dev_get_drvdata(dev); 337 u32 bank; 338 339 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) 340 bank = PCA953x_BANK_INPUT; 341 else 342 bank = PCA957x_BANK_INPUT; 343 344 if (chip->driver_data & PCA_PCAL) 345 bank |= PCAL9xxx_BANK_IRQ_STAT; 346 347 return pca953x_check_register(chip, reg, bank); 348 } 349 350 static const struct regmap_config pca953x_i2c_regmap = { 351 .reg_bits = 8, 352 .val_bits = 8, 353 354 .readable_reg = pca953x_readable_register, 355 .writeable_reg = pca953x_writeable_register, 356 .volatile_reg = pca953x_volatile_register, 357 358 .disable_locking = true, 359 .cache_type = REGCACHE_RBTREE, 360 .max_register = 0x7f, 361 }; 362 363 static const struct regmap_config pca953x_ai_i2c_regmap = { 364 .reg_bits = 8, 365 .val_bits = 8, 366 367 .read_flag_mask = REG_ADDR_AI, 368 .write_flag_mask = REG_ADDR_AI, 369 370 .readable_reg = pca953x_readable_register, 371 .writeable_reg = pca953x_writeable_register, 372 .volatile_reg = pca953x_volatile_register, 373 374 .disable_locking = true, 375 .cache_type = REGCACHE_RBTREE, 376 .max_register = 0x7f, 377 }; 378 379 static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off) 380 { 381 int bank_shift = pca953x_bank_shift(chip); 382 int addr = (reg & PCAL_GPIO_MASK) << bank_shift; 383 int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; 384 u8 regaddr = pinctrl | addr | (off / BANK_SZ); 385 386 return regaddr; 387 } 388 389 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, unsigned long *val) 390 { 391 u8 regaddr = pca953x_recalc_addr(chip, reg, 0); 392 u8 value[MAX_BANK]; 393 int i, ret; 394 395 for (i = 0; i < NBANK(chip); i++) 396 value[i] = bitmap_get_value8(val, i * BANK_SZ); 397 398 ret = regmap_bulk_write(chip->regmap, regaddr, value, NBANK(chip)); 399 if (ret < 0) { 400 dev_err(&chip->client->dev, "failed writing register\n"); 401 return ret; 402 } 403 404 return 0; 405 } 406 407 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, unsigned long *val) 408 { 409 u8 regaddr = pca953x_recalc_addr(chip, reg, 0); 410 u8 value[MAX_BANK]; 411 int i, ret; 412 413 ret = regmap_bulk_read(chip->regmap, regaddr, value, NBANK(chip)); 414 if (ret < 0) { 415 dev_err(&chip->client->dev, "failed reading register\n"); 416 return ret; 417 } 418 419 for (i = 0; i < NBANK(chip); i++) 420 bitmap_set_value8(val, value[i], i * BANK_SZ); 421 422 return 0; 423 } 424 425 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) 426 { 427 struct pca953x_chip *chip = gpiochip_get_data(gc); 428 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off); 429 u8 bit = BIT(off % BANK_SZ); 430 int ret; 431 432 mutex_lock(&chip->i2c_lock); 433 ret = regmap_write_bits(chip->regmap, dirreg, bit, bit); 434 mutex_unlock(&chip->i2c_lock); 435 return ret; 436 } 437 438 static int pca953x_gpio_direction_output(struct gpio_chip *gc, 439 unsigned off, int val) 440 { 441 struct pca953x_chip *chip = gpiochip_get_data(gc); 442 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off); 443 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off); 444 u8 bit = BIT(off % BANK_SZ); 445 int ret; 446 447 mutex_lock(&chip->i2c_lock); 448 /* set output level */ 449 ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0); 450 if (ret) 451 goto exit; 452 453 /* then direction */ 454 ret = regmap_write_bits(chip->regmap, dirreg, bit, 0); 455 exit: 456 mutex_unlock(&chip->i2c_lock); 457 return ret; 458 } 459 460 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) 461 { 462 struct pca953x_chip *chip = gpiochip_get_data(gc); 463 u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off); 464 u8 bit = BIT(off % BANK_SZ); 465 u32 reg_val; 466 int ret; 467 468 mutex_lock(&chip->i2c_lock); 469 ret = regmap_read(chip->regmap, inreg, ®_val); 470 mutex_unlock(&chip->i2c_lock); 471 if (ret < 0) 472 return ret; 473 474 return !!(reg_val & bit); 475 } 476 477 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) 478 { 479 struct pca953x_chip *chip = gpiochip_get_data(gc); 480 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off); 481 u8 bit = BIT(off % BANK_SZ); 482 483 mutex_lock(&chip->i2c_lock); 484 regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0); 485 mutex_unlock(&chip->i2c_lock); 486 } 487 488 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off) 489 { 490 struct pca953x_chip *chip = gpiochip_get_data(gc); 491 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off); 492 u8 bit = BIT(off % BANK_SZ); 493 u32 reg_val; 494 int ret; 495 496 mutex_lock(&chip->i2c_lock); 497 ret = regmap_read(chip->regmap, dirreg, ®_val); 498 mutex_unlock(&chip->i2c_lock); 499 if (ret < 0) 500 return ret; 501 502 if (reg_val & bit) 503 return GPIO_LINE_DIRECTION_IN; 504 505 return GPIO_LINE_DIRECTION_OUT; 506 } 507 508 static int pca953x_gpio_get_multiple(struct gpio_chip *gc, 509 unsigned long *mask, unsigned long *bits) 510 { 511 struct pca953x_chip *chip = gpiochip_get_data(gc); 512 DECLARE_BITMAP(reg_val, MAX_LINE); 513 int ret; 514 515 mutex_lock(&chip->i2c_lock); 516 ret = pca953x_read_regs(chip, chip->regs->input, reg_val); 517 mutex_unlock(&chip->i2c_lock); 518 if (ret) 519 return ret; 520 521 bitmap_replace(bits, bits, reg_val, mask, gc->ngpio); 522 return 0; 523 } 524 525 static void pca953x_gpio_set_multiple(struct gpio_chip *gc, 526 unsigned long *mask, unsigned long *bits) 527 { 528 struct pca953x_chip *chip = gpiochip_get_data(gc); 529 DECLARE_BITMAP(reg_val, MAX_LINE); 530 int ret; 531 532 mutex_lock(&chip->i2c_lock); 533 ret = pca953x_read_regs(chip, chip->regs->output, reg_val); 534 if (ret) 535 goto exit; 536 537 bitmap_replace(reg_val, reg_val, bits, mask, gc->ngpio); 538 539 pca953x_write_regs(chip, chip->regs->output, reg_val); 540 exit: 541 mutex_unlock(&chip->i2c_lock); 542 } 543 544 static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip, 545 unsigned int offset, 546 unsigned long config) 547 { 548 u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset); 549 u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset); 550 u8 bit = BIT(offset % BANK_SZ); 551 int ret; 552 553 /* 554 * pull-up/pull-down configuration requires PCAL extended 555 * registers 556 */ 557 if (!(chip->driver_data & PCA_PCAL)) 558 return -ENOTSUPP; 559 560 mutex_lock(&chip->i2c_lock); 561 562 /* Disable pull-up/pull-down */ 563 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0); 564 if (ret) 565 goto exit; 566 567 /* Configure pull-up/pull-down */ 568 if (config == PIN_CONFIG_BIAS_PULL_UP) 569 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit); 570 else if (config == PIN_CONFIG_BIAS_PULL_DOWN) 571 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0); 572 if (ret) 573 goto exit; 574 575 /* Enable pull-up/pull-down */ 576 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit); 577 578 exit: 579 mutex_unlock(&chip->i2c_lock); 580 return ret; 581 } 582 583 static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset, 584 unsigned long config) 585 { 586 struct pca953x_chip *chip = gpiochip_get_data(gc); 587 588 switch (pinconf_to_config_param(config)) { 589 case PIN_CONFIG_BIAS_PULL_UP: 590 case PIN_CONFIG_BIAS_PULL_DOWN: 591 return pca953x_gpio_set_pull_up_down(chip, offset, config); 592 default: 593 return -ENOTSUPP; 594 } 595 } 596 597 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) 598 { 599 struct gpio_chip *gc; 600 601 gc = &chip->gpio_chip; 602 603 gc->direction_input = pca953x_gpio_direction_input; 604 gc->direction_output = pca953x_gpio_direction_output; 605 gc->get = pca953x_gpio_get_value; 606 gc->set = pca953x_gpio_set_value; 607 gc->get_direction = pca953x_gpio_get_direction; 608 gc->get_multiple = pca953x_gpio_get_multiple; 609 gc->set_multiple = pca953x_gpio_set_multiple; 610 gc->set_config = pca953x_gpio_set_config; 611 gc->can_sleep = true; 612 613 gc->base = chip->gpio_start; 614 gc->ngpio = gpios; 615 gc->label = dev_name(&chip->client->dev); 616 gc->parent = &chip->client->dev; 617 gc->owner = THIS_MODULE; 618 gc->names = chip->names; 619 } 620 621 #ifdef CONFIG_GPIO_PCA953X_IRQ 622 static void pca953x_irq_mask(struct irq_data *d) 623 { 624 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 625 struct pca953x_chip *chip = gpiochip_get_data(gc); 626 irq_hw_number_t hwirq = irqd_to_hwirq(d); 627 628 clear_bit(hwirq, chip->irq_mask); 629 } 630 631 static void pca953x_irq_unmask(struct irq_data *d) 632 { 633 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 634 struct pca953x_chip *chip = gpiochip_get_data(gc); 635 irq_hw_number_t hwirq = irqd_to_hwirq(d); 636 637 set_bit(hwirq, chip->irq_mask); 638 } 639 640 static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on) 641 { 642 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 643 struct pca953x_chip *chip = gpiochip_get_data(gc); 644 645 if (on) 646 atomic_inc(&chip->wakeup_path); 647 else 648 atomic_dec(&chip->wakeup_path); 649 650 return irq_set_irq_wake(chip->client->irq, on); 651 } 652 653 static void pca953x_irq_bus_lock(struct irq_data *d) 654 { 655 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 656 struct pca953x_chip *chip = gpiochip_get_data(gc); 657 658 mutex_lock(&chip->irq_lock); 659 } 660 661 static void pca953x_irq_bus_sync_unlock(struct irq_data *d) 662 { 663 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 664 struct pca953x_chip *chip = gpiochip_get_data(gc); 665 DECLARE_BITMAP(irq_mask, MAX_LINE); 666 DECLARE_BITMAP(reg_direction, MAX_LINE); 667 int level; 668 669 if (chip->driver_data & PCA_PCAL) { 670 /* Enable latch on interrupt-enabled inputs */ 671 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask); 672 673 bitmap_complement(irq_mask, chip->irq_mask, gc->ngpio); 674 675 /* Unmask enabled interrupts */ 676 pca953x_write_regs(chip, PCAL953X_INT_MASK, irq_mask); 677 } 678 679 /* Switch direction to input if needed */ 680 pca953x_read_regs(chip, chip->regs->direction, reg_direction); 681 682 bitmap_or(irq_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio); 683 bitmap_complement(reg_direction, reg_direction, gc->ngpio); 684 bitmap_and(irq_mask, irq_mask, reg_direction, gc->ngpio); 685 686 /* Look for any newly setup interrupt */ 687 for_each_set_bit(level, irq_mask, gc->ngpio) 688 pca953x_gpio_direction_input(&chip->gpio_chip, level); 689 690 mutex_unlock(&chip->irq_lock); 691 } 692 693 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type) 694 { 695 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 696 struct pca953x_chip *chip = gpiochip_get_data(gc); 697 irq_hw_number_t hwirq = irqd_to_hwirq(d); 698 699 if (!(type & IRQ_TYPE_EDGE_BOTH)) { 700 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", 701 d->irq, type); 702 return -EINVAL; 703 } 704 705 assign_bit(hwirq, chip->irq_trig_fall, type & IRQ_TYPE_EDGE_FALLING); 706 assign_bit(hwirq, chip->irq_trig_raise, type & IRQ_TYPE_EDGE_RISING); 707 708 return 0; 709 } 710 711 static void pca953x_irq_shutdown(struct irq_data *d) 712 { 713 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 714 struct pca953x_chip *chip = gpiochip_get_data(gc); 715 irq_hw_number_t hwirq = irqd_to_hwirq(d); 716 717 clear_bit(hwirq, chip->irq_trig_raise); 718 clear_bit(hwirq, chip->irq_trig_fall); 719 } 720 721 static bool pca953x_irq_pending(struct pca953x_chip *chip, unsigned long *pending) 722 { 723 struct gpio_chip *gc = &chip->gpio_chip; 724 DECLARE_BITMAP(reg_direction, MAX_LINE); 725 DECLARE_BITMAP(old_stat, MAX_LINE); 726 DECLARE_BITMAP(cur_stat, MAX_LINE); 727 DECLARE_BITMAP(new_stat, MAX_LINE); 728 DECLARE_BITMAP(trigger, MAX_LINE); 729 int ret; 730 731 if (chip->driver_data & PCA_PCAL) { 732 /* Read the current interrupt status from the device */ 733 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger); 734 if (ret) 735 return false; 736 737 /* Check latched inputs and clear interrupt status */ 738 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat); 739 if (ret) 740 return false; 741 742 /* Apply filter for rising/falling edge selection */ 743 bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise, cur_stat, gc->ngpio); 744 745 bitmap_and(pending, new_stat, trigger, gc->ngpio); 746 747 return !bitmap_empty(pending, gc->ngpio); 748 } 749 750 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat); 751 if (ret) 752 return false; 753 754 /* Remove output pins from the equation */ 755 pca953x_read_regs(chip, chip->regs->direction, reg_direction); 756 757 bitmap_copy(old_stat, chip->irq_stat, gc->ngpio); 758 759 bitmap_and(new_stat, cur_stat, reg_direction, gc->ngpio); 760 bitmap_xor(cur_stat, new_stat, old_stat, gc->ngpio); 761 bitmap_and(trigger, cur_stat, chip->irq_mask, gc->ngpio); 762 763 if (bitmap_empty(trigger, gc->ngpio)) 764 return false; 765 766 bitmap_copy(chip->irq_stat, new_stat, gc->ngpio); 767 768 bitmap_and(cur_stat, chip->irq_trig_fall, old_stat, gc->ngpio); 769 bitmap_and(old_stat, chip->irq_trig_raise, new_stat, gc->ngpio); 770 bitmap_or(new_stat, old_stat, cur_stat, gc->ngpio); 771 bitmap_and(pending, new_stat, trigger, gc->ngpio); 772 773 return !bitmap_empty(pending, gc->ngpio); 774 } 775 776 static irqreturn_t pca953x_irq_handler(int irq, void *devid) 777 { 778 struct pca953x_chip *chip = devid; 779 struct gpio_chip *gc = &chip->gpio_chip; 780 DECLARE_BITMAP(pending, MAX_LINE); 781 int level; 782 bool ret; 783 784 bitmap_zero(pending, MAX_LINE); 785 786 mutex_lock(&chip->i2c_lock); 787 ret = pca953x_irq_pending(chip, pending); 788 mutex_unlock(&chip->i2c_lock); 789 790 if (ret) { 791 ret = 0; 792 793 for_each_set_bit(level, pending, gc->ngpio) { 794 int nested_irq = irq_find_mapping(gc->irq.domain, level); 795 796 if (unlikely(nested_irq <= 0)) { 797 dev_warn_ratelimited(gc->parent, "unmapped interrupt %d\n", level); 798 continue; 799 } 800 801 handle_nested_irq(nested_irq); 802 ret = 1; 803 } 804 } 805 806 return IRQ_RETVAL(ret); 807 } 808 809 static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base) 810 { 811 struct i2c_client *client = chip->client; 812 struct irq_chip *irq_chip = &chip->irq_chip; 813 DECLARE_BITMAP(reg_direction, MAX_LINE); 814 DECLARE_BITMAP(irq_stat, MAX_LINE); 815 struct gpio_irq_chip *girq; 816 int ret; 817 818 if (dmi_first_match(pca953x_dmi_acpi_irq_info)) { 819 ret = pca953x_acpi_get_irq(&client->dev); 820 if (ret > 0) 821 client->irq = ret; 822 } 823 824 if (!client->irq) 825 return 0; 826 827 if (irq_base == -1) 828 return 0; 829 830 if (!(chip->driver_data & PCA_INT)) 831 return 0; 832 833 ret = pca953x_read_regs(chip, chip->regs->input, irq_stat); 834 if (ret) 835 return ret; 836 837 /* 838 * There is no way to know which GPIO line generated the 839 * interrupt. We have to rely on the previous read for 840 * this purpose. 841 */ 842 pca953x_read_regs(chip, chip->regs->direction, reg_direction); 843 bitmap_and(chip->irq_stat, irq_stat, reg_direction, chip->gpio_chip.ngpio); 844 mutex_init(&chip->irq_lock); 845 846 irq_chip->name = dev_name(&client->dev); 847 irq_chip->irq_mask = pca953x_irq_mask; 848 irq_chip->irq_unmask = pca953x_irq_unmask; 849 irq_chip->irq_set_wake = pca953x_irq_set_wake; 850 irq_chip->irq_bus_lock = pca953x_irq_bus_lock; 851 irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock; 852 irq_chip->irq_set_type = pca953x_irq_set_type; 853 irq_chip->irq_shutdown = pca953x_irq_shutdown; 854 855 girq = &chip->gpio_chip.irq; 856 girq->chip = irq_chip; 857 /* This will let us handle the parent IRQ in the driver */ 858 girq->parent_handler = NULL; 859 girq->num_parents = 0; 860 girq->parents = NULL; 861 girq->default_type = IRQ_TYPE_NONE; 862 girq->handler = handle_simple_irq; 863 girq->threaded = true; 864 girq->first = irq_base; /* FIXME: get rid of this */ 865 866 ret = devm_request_threaded_irq(&client->dev, client->irq, 867 NULL, pca953x_irq_handler, 868 IRQF_ONESHOT | IRQF_SHARED, 869 dev_name(&client->dev), chip); 870 if (ret) { 871 dev_err(&client->dev, "failed to request irq %d\n", 872 client->irq); 873 return ret; 874 } 875 876 return 0; 877 } 878 879 #else /* CONFIG_GPIO_PCA953X_IRQ */ 880 static int pca953x_irq_setup(struct pca953x_chip *chip, 881 int irq_base) 882 { 883 struct i2c_client *client = chip->client; 884 885 if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT)) 886 dev_warn(&client->dev, "interrupt support not compiled in\n"); 887 888 return 0; 889 } 890 #endif 891 892 static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert) 893 { 894 DECLARE_BITMAP(val, MAX_LINE); 895 int ret; 896 897 ret = regcache_sync_region(chip->regmap, chip->regs->output, 898 chip->regs->output + NBANK(chip)); 899 if (ret) 900 goto out; 901 902 ret = regcache_sync_region(chip->regmap, chip->regs->direction, 903 chip->regs->direction + NBANK(chip)); 904 if (ret) 905 goto out; 906 907 /* set platform specific polarity inversion */ 908 if (invert) 909 bitmap_fill(val, MAX_LINE); 910 else 911 bitmap_zero(val, MAX_LINE); 912 913 ret = pca953x_write_regs(chip, chip->regs->invert, val); 914 out: 915 return ret; 916 } 917 918 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) 919 { 920 DECLARE_BITMAP(val, MAX_LINE); 921 unsigned int i; 922 int ret; 923 924 ret = device_pca95xx_init(chip, invert); 925 if (ret) 926 goto out; 927 928 /* To enable register 6, 7 to control pull up and pull down */ 929 for (i = 0; i < NBANK(chip); i++) 930 bitmap_set_value8(val, 0x02, i * BANK_SZ); 931 932 ret = pca953x_write_regs(chip, PCA957X_BKEN, val); 933 if (ret) 934 goto out; 935 936 return 0; 937 out: 938 return ret; 939 } 940 941 static int pca953x_probe(struct i2c_client *client, 942 const struct i2c_device_id *i2c_id) 943 { 944 struct pca953x_platform_data *pdata; 945 struct pca953x_chip *chip; 946 int irq_base = 0; 947 int ret; 948 u32 invert = 0; 949 struct regulator *reg; 950 const struct regmap_config *regmap_config; 951 952 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); 953 if (chip == NULL) 954 return -ENOMEM; 955 956 pdata = dev_get_platdata(&client->dev); 957 if (pdata) { 958 irq_base = pdata->irq_base; 959 chip->gpio_start = pdata->gpio_base; 960 invert = pdata->invert; 961 chip->names = pdata->names; 962 } else { 963 struct gpio_desc *reset_gpio; 964 965 chip->gpio_start = -1; 966 irq_base = 0; 967 968 /* 969 * See if we need to de-assert a reset pin. 970 * 971 * There is no known ACPI-enabled platforms that are 972 * using "reset" GPIO. Otherwise any of those platform 973 * must use _DSD method with corresponding property. 974 */ 975 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset", 976 GPIOD_OUT_LOW); 977 if (IS_ERR(reset_gpio)) 978 return PTR_ERR(reset_gpio); 979 } 980 981 chip->client = client; 982 983 reg = devm_regulator_get(&client->dev, "vcc"); 984 if (IS_ERR(reg)) 985 return dev_err_probe(&client->dev, PTR_ERR(reg), "reg get err\n"); 986 987 ret = regulator_enable(reg); 988 if (ret) { 989 dev_err(&client->dev, "reg en err: %d\n", ret); 990 return ret; 991 } 992 chip->regulator = reg; 993 994 if (i2c_id) { 995 chip->driver_data = i2c_id->driver_data; 996 } else { 997 const void *match; 998 999 match = device_get_match_data(&client->dev); 1000 if (!match) { 1001 ret = -ENODEV; 1002 goto err_exit; 1003 } 1004 1005 chip->driver_data = (uintptr_t)match; 1006 } 1007 1008 i2c_set_clientdata(client, chip); 1009 1010 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK); 1011 1012 if (NBANK(chip) > 2 || PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) { 1013 dev_info(&client->dev, "using AI\n"); 1014 regmap_config = &pca953x_ai_i2c_regmap; 1015 } else { 1016 dev_info(&client->dev, "using no AI\n"); 1017 regmap_config = &pca953x_i2c_regmap; 1018 } 1019 1020 chip->regmap = devm_regmap_init_i2c(client, regmap_config); 1021 if (IS_ERR(chip->regmap)) { 1022 ret = PTR_ERR(chip->regmap); 1023 goto err_exit; 1024 } 1025 1026 regcache_mark_dirty(chip->regmap); 1027 1028 mutex_init(&chip->i2c_lock); 1029 /* 1030 * In case we have an i2c-mux controlled by a GPIO provided by an 1031 * expander using the same driver higher on the device tree, read the 1032 * i2c adapter nesting depth and use the retrieved value as lockdep 1033 * subclass for chip->i2c_lock. 1034 * 1035 * REVISIT: This solution is not complete. It protects us from lockdep 1036 * false positives when the expander controlling the i2c-mux is on 1037 * a different level on the device tree, but not when it's on the same 1038 * level on a different branch (in which case the subclass number 1039 * would be the same). 1040 * 1041 * TODO: Once a correct solution is developed, a similar fix should be 1042 * applied to all other i2c-controlled GPIO expanders (and potentially 1043 * regmap-i2c). 1044 */ 1045 lockdep_set_subclass(&chip->i2c_lock, 1046 i2c_adapter_depth(client->adapter)); 1047 1048 /* initialize cached registers from their original values. 1049 * we can't share this chip with another i2c master. 1050 */ 1051 1052 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { 1053 chip->regs = &pca953x_regs; 1054 ret = device_pca95xx_init(chip, invert); 1055 } else { 1056 chip->regs = &pca957x_regs; 1057 ret = device_pca957x_init(chip, invert); 1058 } 1059 if (ret) 1060 goto err_exit; 1061 1062 ret = pca953x_irq_setup(chip, irq_base); 1063 if (ret) 1064 goto err_exit; 1065 1066 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip); 1067 if (ret) 1068 goto err_exit; 1069 1070 if (pdata && pdata->setup) { 1071 ret = pdata->setup(client, chip->gpio_chip.base, 1072 chip->gpio_chip.ngpio, pdata->context); 1073 if (ret < 0) 1074 dev_warn(&client->dev, "setup failed, %d\n", ret); 1075 } 1076 1077 return 0; 1078 1079 err_exit: 1080 regulator_disable(chip->regulator); 1081 return ret; 1082 } 1083 1084 static int pca953x_remove(struct i2c_client *client) 1085 { 1086 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev); 1087 struct pca953x_chip *chip = i2c_get_clientdata(client); 1088 int ret; 1089 1090 if (pdata && pdata->teardown) { 1091 ret = pdata->teardown(client, chip->gpio_chip.base, 1092 chip->gpio_chip.ngpio, pdata->context); 1093 if (ret < 0) 1094 dev_err(&client->dev, "teardown failed, %d\n", ret); 1095 } else { 1096 ret = 0; 1097 } 1098 1099 regulator_disable(chip->regulator); 1100 1101 return ret; 1102 } 1103 1104 #ifdef CONFIG_PM_SLEEP 1105 static int pca953x_regcache_sync(struct device *dev) 1106 { 1107 struct pca953x_chip *chip = dev_get_drvdata(dev); 1108 int ret; 1109 1110 /* 1111 * The ordering between direction and output is important, 1112 * sync these registers first and only then sync the rest. 1113 */ 1114 ret = regcache_sync_region(chip->regmap, chip->regs->direction, 1115 chip->regs->direction + NBANK(chip)); 1116 if (ret) { 1117 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret); 1118 return ret; 1119 } 1120 1121 ret = regcache_sync_region(chip->regmap, chip->regs->output, 1122 chip->regs->output + NBANK(chip)); 1123 if (ret) { 1124 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret); 1125 return ret; 1126 } 1127 1128 #ifdef CONFIG_GPIO_PCA953X_IRQ 1129 if (chip->driver_data & PCA_PCAL) { 1130 ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH, 1131 PCAL953X_IN_LATCH + NBANK(chip)); 1132 if (ret) { 1133 dev_err(dev, "Failed to sync INT latch registers: %d\n", 1134 ret); 1135 return ret; 1136 } 1137 1138 ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK, 1139 PCAL953X_INT_MASK + NBANK(chip)); 1140 if (ret) { 1141 dev_err(dev, "Failed to sync INT mask registers: %d\n", 1142 ret); 1143 return ret; 1144 } 1145 } 1146 #endif 1147 1148 return 0; 1149 } 1150 1151 static int pca953x_suspend(struct device *dev) 1152 { 1153 struct pca953x_chip *chip = dev_get_drvdata(dev); 1154 1155 regcache_cache_only(chip->regmap, true); 1156 1157 if (atomic_read(&chip->wakeup_path)) 1158 device_set_wakeup_path(dev); 1159 else 1160 regulator_disable(chip->regulator); 1161 1162 return 0; 1163 } 1164 1165 static int pca953x_resume(struct device *dev) 1166 { 1167 struct pca953x_chip *chip = dev_get_drvdata(dev); 1168 int ret; 1169 1170 if (!atomic_read(&chip->wakeup_path)) { 1171 ret = regulator_enable(chip->regulator); 1172 if (ret) { 1173 dev_err(dev, "Failed to enable regulator: %d\n", ret); 1174 return 0; 1175 } 1176 } 1177 1178 regcache_cache_only(chip->regmap, false); 1179 regcache_mark_dirty(chip->regmap); 1180 ret = pca953x_regcache_sync(dev); 1181 if (ret) 1182 return ret; 1183 1184 ret = regcache_sync(chip->regmap); 1185 if (ret) { 1186 dev_err(dev, "Failed to restore register map: %d\n", ret); 1187 return ret; 1188 } 1189 1190 return 0; 1191 } 1192 #endif 1193 1194 /* convenience to stop overlong match-table lines */ 1195 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int) 1196 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int) 1197 1198 static const struct of_device_id pca953x_dt_ids[] = { 1199 { .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), }, 1200 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), }, 1201 { .compatible = "nxp,pca9506", .data = OF_953X(40, PCA_INT), }, 1202 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), }, 1203 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), }, 1204 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), }, 1205 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), }, 1206 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), }, 1207 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), }, 1208 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), }, 1209 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), }, 1210 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), }, 1211 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), }, 1212 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), }, 1213 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), }, 1214 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), }, 1215 1216 { .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), }, 1217 { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), }, 1218 { .compatible = "nxp,pcal9535", .data = OF_953X(16, PCA_LATCH_INT), }, 1219 { .compatible = "nxp,pcal9554b", .data = OF_953X( 8, PCA_LATCH_INT), }, 1220 { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), }, 1221 1222 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), }, 1223 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), }, 1224 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), }, 1225 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), }, 1226 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), }, 1227 1228 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), }, 1229 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), }, 1230 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), }, 1231 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), }, 1232 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), }, 1233 { .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), }, 1234 1235 { .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), }, 1236 { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), }, 1237 { .compatible = "onnn,pca9655", .data = OF_953X(16, PCA_INT), }, 1238 1239 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), }, 1240 { } 1241 }; 1242 1243 MODULE_DEVICE_TABLE(of, pca953x_dt_ids); 1244 1245 static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume); 1246 1247 static struct i2c_driver pca953x_driver = { 1248 .driver = { 1249 .name = "pca953x", 1250 .pm = &pca953x_pm_ops, 1251 .of_match_table = pca953x_dt_ids, 1252 .acpi_match_table = pca953x_acpi_ids, 1253 }, 1254 .probe = pca953x_probe, 1255 .remove = pca953x_remove, 1256 .id_table = pca953x_id, 1257 }; 1258 1259 static int __init pca953x_init(void) 1260 { 1261 return i2c_add_driver(&pca953x_driver); 1262 } 1263 /* register after i2c postcore initcall and before 1264 * subsys initcalls that may rely on these GPIOs 1265 */ 1266 subsys_initcall(pca953x_init); 1267 1268 static void __exit pca953x_exit(void) 1269 { 1270 i2c_del_driver(&pca953x_driver); 1271 } 1272 module_exit(pca953x_exit); 1273 1274 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>"); 1275 MODULE_DESCRIPTION("GPIO expander driver for PCA953x"); 1276 MODULE_LICENSE("GPL"); 1277