1 /* 2 * PCA953x 4/8/16/24/40 bit I/O ports 3 * 4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com> 5 * Copyright (C) 2007 Marvell International Ltd. 6 * 7 * Derived from drivers/i2c/chips/pca9539.c 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; version 2 of the License. 12 */ 13 14 #include <linux/acpi.h> 15 #include <linux/gpio.h> 16 #include <linux/gpio/consumer.h> 17 #include <linux/i2c.h> 18 #include <linux/init.h> 19 #include <linux/interrupt.h> 20 #include <linux/module.h> 21 #include <linux/of_platform.h> 22 #include <linux/platform_data/pca953x.h> 23 #include <linux/regulator/consumer.h> 24 #include <linux/slab.h> 25 26 #include <asm/unaligned.h> 27 28 #define PCA953X_INPUT 0 29 #define PCA953X_OUTPUT 1 30 #define PCA953X_INVERT 2 31 #define PCA953X_DIRECTION 3 32 33 #define REG_ADDR_AI 0x80 34 35 #define PCA957X_IN 0 36 #define PCA957X_INVRT 1 37 #define PCA957X_BKEN 2 38 #define PCA957X_PUPD 3 39 #define PCA957X_CFG 4 40 #define PCA957X_OUT 5 41 #define PCA957X_MSK 6 42 #define PCA957X_INTS 7 43 44 #define PCAL953X_IN_LATCH 34 45 #define PCAL953X_INT_MASK 37 46 #define PCAL953X_INT_STAT 38 47 48 #define PCA_GPIO_MASK 0x00FF 49 #define PCA_INT 0x0100 50 #define PCA_PCAL 0x0200 51 #define PCA953X_TYPE 0x1000 52 #define PCA957X_TYPE 0x2000 53 #define PCA_TYPE_MASK 0xF000 54 55 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK) 56 57 static const struct i2c_device_id pca953x_id[] = { 58 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, }, 59 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, }, 60 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, }, 61 { "pca9536", 4 | PCA953X_TYPE, }, 62 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, }, 63 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, }, 64 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, }, 65 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, }, 66 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, }, 67 { "pca9556", 8 | PCA953X_TYPE, }, 68 { "pca9557", 8 | PCA953X_TYPE, }, 69 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, }, 70 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, }, 71 { "pca9698", 40 | PCA953X_TYPE, }, 72 73 { "pcal6524", 24 | PCA953X_TYPE | PCA_INT | PCA_PCAL, }, 74 { "pcal9555a", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, }, 75 76 { "max7310", 8 | PCA953X_TYPE, }, 77 { "max7312", 16 | PCA953X_TYPE | PCA_INT, }, 78 { "max7313", 16 | PCA953X_TYPE | PCA_INT, }, 79 { "max7315", 8 | PCA953X_TYPE | PCA_INT, }, 80 { "max7318", 16 | PCA953X_TYPE | PCA_INT, }, 81 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, }, 82 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, }, 83 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, }, 84 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, }, 85 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, }, 86 { "tca9554", 8 | PCA953X_TYPE | PCA_INT, }, 87 { "xra1202", 8 | PCA953X_TYPE }, 88 { } 89 }; 90 MODULE_DEVICE_TABLE(i2c, pca953x_id); 91 92 static const struct acpi_device_id pca953x_acpi_ids[] = { 93 { "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, }, 94 { } 95 }; 96 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids); 97 98 #define MAX_BANK 5 99 #define BANK_SZ 8 100 101 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ) 102 103 struct pca953x_reg_config { 104 int direction; 105 int output; 106 int input; 107 }; 108 109 static const struct pca953x_reg_config pca953x_regs = { 110 .direction = PCA953X_DIRECTION, 111 .output = PCA953X_OUTPUT, 112 .input = PCA953X_INPUT, 113 }; 114 115 static const struct pca953x_reg_config pca957x_regs = { 116 .direction = PCA957X_CFG, 117 .output = PCA957X_OUT, 118 .input = PCA957X_IN, 119 }; 120 121 struct pca953x_chip { 122 unsigned gpio_start; 123 u8 reg_output[MAX_BANK]; 124 u8 reg_direction[MAX_BANK]; 125 struct mutex i2c_lock; 126 127 #ifdef CONFIG_GPIO_PCA953X_IRQ 128 struct mutex irq_lock; 129 u8 irq_mask[MAX_BANK]; 130 u8 irq_stat[MAX_BANK]; 131 u8 irq_trig_raise[MAX_BANK]; 132 u8 irq_trig_fall[MAX_BANK]; 133 #endif 134 135 struct i2c_client *client; 136 struct gpio_chip gpio_chip; 137 const char *const *names; 138 unsigned long driver_data; 139 struct regulator *regulator; 140 141 const struct pca953x_reg_config *regs; 142 143 int (*write_regs)(struct pca953x_chip *, int, u8 *); 144 int (*read_regs)(struct pca953x_chip *, int, u8 *); 145 }; 146 147 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, 148 int off) 149 { 150 int ret; 151 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 152 int offset = off / BANK_SZ; 153 154 ret = i2c_smbus_read_byte_data(chip->client, 155 (reg << bank_shift) + offset); 156 *val = ret; 157 158 if (ret < 0) { 159 dev_err(&chip->client->dev, "failed reading register\n"); 160 return ret; 161 } 162 163 return 0; 164 } 165 166 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, 167 int off) 168 { 169 int ret; 170 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 171 int offset = off / BANK_SZ; 172 173 ret = i2c_smbus_write_byte_data(chip->client, 174 (reg << bank_shift) + offset, val); 175 176 if (ret < 0) { 177 dev_err(&chip->client->dev, "failed writing register\n"); 178 return ret; 179 } 180 181 return 0; 182 } 183 184 static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val) 185 { 186 return i2c_smbus_write_byte_data(chip->client, reg, *val); 187 } 188 189 static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) 190 { 191 u16 word = get_unaligned((u16 *)val); 192 193 return i2c_smbus_write_word_data(chip->client, reg << 1, word); 194 } 195 196 static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) 197 { 198 int ret; 199 200 ret = i2c_smbus_write_byte_data(chip->client, reg << 1, val[0]); 201 if (ret < 0) 202 return ret; 203 204 return i2c_smbus_write_byte_data(chip->client, (reg << 1) + 1, val[1]); 205 } 206 207 static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val) 208 { 209 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 210 211 return i2c_smbus_write_i2c_block_data(chip->client, 212 (reg << bank_shift) | REG_ADDR_AI, 213 NBANK(chip), val); 214 } 215 216 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) 217 { 218 int ret = 0; 219 220 ret = chip->write_regs(chip, reg, val); 221 if (ret < 0) { 222 dev_err(&chip->client->dev, "failed writing register\n"); 223 return ret; 224 } 225 226 return 0; 227 } 228 229 static int pca953x_read_regs_8(struct pca953x_chip *chip, int reg, u8 *val) 230 { 231 int ret; 232 233 ret = i2c_smbus_read_byte_data(chip->client, reg); 234 *val = ret; 235 236 return ret; 237 } 238 239 static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val) 240 { 241 int ret; 242 243 ret = i2c_smbus_read_word_data(chip->client, reg << 1); 244 put_unaligned(ret, (u16 *)val); 245 246 return ret; 247 } 248 249 static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val) 250 { 251 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 252 253 return i2c_smbus_read_i2c_block_data(chip->client, 254 (reg << bank_shift) | REG_ADDR_AI, 255 NBANK(chip), val); 256 } 257 258 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) 259 { 260 int ret; 261 262 ret = chip->read_regs(chip, reg, val); 263 if (ret < 0) { 264 dev_err(&chip->client->dev, "failed reading register\n"); 265 return ret; 266 } 267 268 return 0; 269 } 270 271 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) 272 { 273 struct pca953x_chip *chip = gpiochip_get_data(gc); 274 u8 reg_val; 275 int ret; 276 277 mutex_lock(&chip->i2c_lock); 278 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ)); 279 280 ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off); 281 if (ret) 282 goto exit; 283 284 chip->reg_direction[off / BANK_SZ] = reg_val; 285 exit: 286 mutex_unlock(&chip->i2c_lock); 287 return ret; 288 } 289 290 static int pca953x_gpio_direction_output(struct gpio_chip *gc, 291 unsigned off, int val) 292 { 293 struct pca953x_chip *chip = gpiochip_get_data(gc); 294 u8 reg_val; 295 int ret; 296 297 mutex_lock(&chip->i2c_lock); 298 /* set output level */ 299 if (val) 300 reg_val = chip->reg_output[off / BANK_SZ] 301 | (1u << (off % BANK_SZ)); 302 else 303 reg_val = chip->reg_output[off / BANK_SZ] 304 & ~(1u << (off % BANK_SZ)); 305 306 ret = pca953x_write_single(chip, chip->regs->output, reg_val, off); 307 if (ret) 308 goto exit; 309 310 chip->reg_output[off / BANK_SZ] = reg_val; 311 312 /* then direction */ 313 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ)); 314 ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off); 315 if (ret) 316 goto exit; 317 318 chip->reg_direction[off / BANK_SZ] = reg_val; 319 exit: 320 mutex_unlock(&chip->i2c_lock); 321 return ret; 322 } 323 324 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) 325 { 326 struct pca953x_chip *chip = gpiochip_get_data(gc); 327 u32 reg_val; 328 int ret; 329 330 mutex_lock(&chip->i2c_lock); 331 ret = pca953x_read_single(chip, chip->regs->input, ®_val, off); 332 mutex_unlock(&chip->i2c_lock); 333 if (ret < 0) { 334 /* NOTE: diagnostic already emitted; that's all we should 335 * do unless gpio_*_value_cansleep() calls become different 336 * from their nonsleeping siblings (and report faults). 337 */ 338 return 0; 339 } 340 341 return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0; 342 } 343 344 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) 345 { 346 struct pca953x_chip *chip = gpiochip_get_data(gc); 347 u8 reg_val; 348 int ret; 349 350 mutex_lock(&chip->i2c_lock); 351 if (val) 352 reg_val = chip->reg_output[off / BANK_SZ] 353 | (1u << (off % BANK_SZ)); 354 else 355 reg_val = chip->reg_output[off / BANK_SZ] 356 & ~(1u << (off % BANK_SZ)); 357 358 ret = pca953x_write_single(chip, chip->regs->output, reg_val, off); 359 if (ret) 360 goto exit; 361 362 chip->reg_output[off / BANK_SZ] = reg_val; 363 exit: 364 mutex_unlock(&chip->i2c_lock); 365 } 366 367 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off) 368 { 369 struct pca953x_chip *chip = gpiochip_get_data(gc); 370 u32 reg_val; 371 int ret; 372 373 mutex_lock(&chip->i2c_lock); 374 ret = pca953x_read_single(chip, chip->regs->direction, ®_val, off); 375 mutex_unlock(&chip->i2c_lock); 376 if (ret < 0) 377 return ret; 378 379 return !!(reg_val & (1u << (off % BANK_SZ))); 380 } 381 382 static void pca953x_gpio_set_multiple(struct gpio_chip *gc, 383 unsigned long *mask, unsigned long *bits) 384 { 385 struct pca953x_chip *chip = gpiochip_get_data(gc); 386 unsigned int bank_mask, bank_val; 387 int bank_shift, bank; 388 u8 reg_val[MAX_BANK]; 389 int ret; 390 391 bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 392 393 mutex_lock(&chip->i2c_lock); 394 memcpy(reg_val, chip->reg_output, NBANK(chip)); 395 for (bank = 0; bank < NBANK(chip); bank++) { 396 bank_mask = mask[bank / sizeof(*mask)] >> 397 ((bank % sizeof(*mask)) * 8); 398 if (bank_mask) { 399 bank_val = bits[bank / sizeof(*bits)] >> 400 ((bank % sizeof(*bits)) * 8); 401 bank_val &= bank_mask; 402 reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val; 403 } 404 } 405 406 ret = i2c_smbus_write_i2c_block_data(chip->client, 407 chip->regs->output << bank_shift, 408 NBANK(chip), reg_val); 409 if (ret) 410 goto exit; 411 412 memcpy(chip->reg_output, reg_val, NBANK(chip)); 413 exit: 414 mutex_unlock(&chip->i2c_lock); 415 } 416 417 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) 418 { 419 struct gpio_chip *gc; 420 421 gc = &chip->gpio_chip; 422 423 gc->direction_input = pca953x_gpio_direction_input; 424 gc->direction_output = pca953x_gpio_direction_output; 425 gc->get = pca953x_gpio_get_value; 426 gc->set = pca953x_gpio_set_value; 427 gc->get_direction = pca953x_gpio_get_direction; 428 gc->set_multiple = pca953x_gpio_set_multiple; 429 gc->can_sleep = true; 430 431 gc->base = chip->gpio_start; 432 gc->ngpio = gpios; 433 gc->label = chip->client->name; 434 gc->parent = &chip->client->dev; 435 gc->owner = THIS_MODULE; 436 gc->names = chip->names; 437 } 438 439 #ifdef CONFIG_GPIO_PCA953X_IRQ 440 static void pca953x_irq_mask(struct irq_data *d) 441 { 442 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 443 struct pca953x_chip *chip = gpiochip_get_data(gc); 444 445 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ)); 446 } 447 448 static void pca953x_irq_unmask(struct irq_data *d) 449 { 450 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 451 struct pca953x_chip *chip = gpiochip_get_data(gc); 452 453 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ); 454 } 455 456 static void pca953x_irq_bus_lock(struct irq_data *d) 457 { 458 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 459 struct pca953x_chip *chip = gpiochip_get_data(gc); 460 461 mutex_lock(&chip->irq_lock); 462 } 463 464 static void pca953x_irq_bus_sync_unlock(struct irq_data *d) 465 { 466 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 467 struct pca953x_chip *chip = gpiochip_get_data(gc); 468 u8 new_irqs; 469 int level, i; 470 u8 invert_irq_mask[MAX_BANK]; 471 472 if (chip->driver_data & PCA_PCAL) { 473 /* Enable latch on interrupt-enabled inputs */ 474 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask); 475 476 for (i = 0; i < NBANK(chip); i++) 477 invert_irq_mask[i] = ~chip->irq_mask[i]; 478 479 /* Unmask enabled interrupts */ 480 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask); 481 } 482 483 /* Look for any newly setup interrupt */ 484 for (i = 0; i < NBANK(chip); i++) { 485 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i]; 486 new_irqs &= ~chip->reg_direction[i]; 487 488 while (new_irqs) { 489 level = __ffs(new_irqs); 490 pca953x_gpio_direction_input(&chip->gpio_chip, 491 level + (BANK_SZ * i)); 492 new_irqs &= ~(1 << level); 493 } 494 } 495 496 mutex_unlock(&chip->irq_lock); 497 } 498 499 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type) 500 { 501 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 502 struct pca953x_chip *chip = gpiochip_get_data(gc); 503 int bank_nb = d->hwirq / BANK_SZ; 504 u8 mask = 1 << (d->hwirq % BANK_SZ); 505 506 if (!(type & IRQ_TYPE_EDGE_BOTH)) { 507 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", 508 d->irq, type); 509 return -EINVAL; 510 } 511 512 if (type & IRQ_TYPE_EDGE_FALLING) 513 chip->irq_trig_fall[bank_nb] |= mask; 514 else 515 chip->irq_trig_fall[bank_nb] &= ~mask; 516 517 if (type & IRQ_TYPE_EDGE_RISING) 518 chip->irq_trig_raise[bank_nb] |= mask; 519 else 520 chip->irq_trig_raise[bank_nb] &= ~mask; 521 522 return 0; 523 } 524 525 static struct irq_chip pca953x_irq_chip = { 526 .name = "pca953x", 527 .irq_mask = pca953x_irq_mask, 528 .irq_unmask = pca953x_irq_unmask, 529 .irq_bus_lock = pca953x_irq_bus_lock, 530 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock, 531 .irq_set_type = pca953x_irq_set_type, 532 }; 533 534 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) 535 { 536 u8 cur_stat[MAX_BANK]; 537 u8 old_stat[MAX_BANK]; 538 bool pending_seen = false; 539 bool trigger_seen = false; 540 u8 trigger[MAX_BANK]; 541 int ret, i; 542 543 if (chip->driver_data & PCA_PCAL) { 544 /* Read the current interrupt status from the device */ 545 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger); 546 if (ret) 547 return false; 548 549 /* Check latched inputs and clear interrupt status */ 550 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat); 551 if (ret) 552 return false; 553 554 for (i = 0; i < NBANK(chip); i++) { 555 /* Apply filter for rising/falling edge selection */ 556 pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) | 557 (cur_stat[i] & chip->irq_trig_raise[i]); 558 pending[i] &= trigger[i]; 559 if (pending[i]) 560 pending_seen = true; 561 } 562 563 return pending_seen; 564 } 565 566 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat); 567 if (ret) 568 return false; 569 570 /* Remove output pins from the equation */ 571 for (i = 0; i < NBANK(chip); i++) 572 cur_stat[i] &= chip->reg_direction[i]; 573 574 memcpy(old_stat, chip->irq_stat, NBANK(chip)); 575 576 for (i = 0; i < NBANK(chip); i++) { 577 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i]; 578 if (trigger[i]) 579 trigger_seen = true; 580 } 581 582 if (!trigger_seen) 583 return false; 584 585 memcpy(chip->irq_stat, cur_stat, NBANK(chip)); 586 587 for (i = 0; i < NBANK(chip); i++) { 588 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) | 589 (cur_stat[i] & chip->irq_trig_raise[i]); 590 pending[i] &= trigger[i]; 591 if (pending[i]) 592 pending_seen = true; 593 } 594 595 return pending_seen; 596 } 597 598 static irqreturn_t pca953x_irq_handler(int irq, void *devid) 599 { 600 struct pca953x_chip *chip = devid; 601 u8 pending[MAX_BANK]; 602 u8 level; 603 unsigned nhandled = 0; 604 int i; 605 606 if (!pca953x_irq_pending(chip, pending)) 607 return IRQ_NONE; 608 609 for (i = 0; i < NBANK(chip); i++) { 610 while (pending[i]) { 611 level = __ffs(pending[i]); 612 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain, 613 level + (BANK_SZ * i))); 614 pending[i] &= ~(1 << level); 615 nhandled++; 616 } 617 } 618 619 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE; 620 } 621 622 static int pca953x_irq_setup(struct pca953x_chip *chip, 623 int irq_base) 624 { 625 struct i2c_client *client = chip->client; 626 int ret, i; 627 628 if (client->irq && irq_base != -1 629 && (chip->driver_data & PCA_INT)) { 630 ret = pca953x_read_regs(chip, 631 chip->regs->input, chip->irq_stat); 632 if (ret) 633 return ret; 634 635 /* 636 * There is no way to know which GPIO line generated the 637 * interrupt. We have to rely on the previous read for 638 * this purpose. 639 */ 640 for (i = 0; i < NBANK(chip); i++) 641 chip->irq_stat[i] &= chip->reg_direction[i]; 642 mutex_init(&chip->irq_lock); 643 644 ret = devm_request_threaded_irq(&client->dev, 645 client->irq, 646 NULL, 647 pca953x_irq_handler, 648 IRQF_TRIGGER_LOW | IRQF_ONESHOT | 649 IRQF_SHARED, 650 dev_name(&client->dev), chip); 651 if (ret) { 652 dev_err(&client->dev, "failed to request irq %d\n", 653 client->irq); 654 return ret; 655 } 656 657 ret = gpiochip_irqchip_add_nested(&chip->gpio_chip, 658 &pca953x_irq_chip, 659 irq_base, 660 handle_simple_irq, 661 IRQ_TYPE_NONE); 662 if (ret) { 663 dev_err(&client->dev, 664 "could not connect irqchip to gpiochip\n"); 665 return ret; 666 } 667 668 gpiochip_set_nested_irqchip(&chip->gpio_chip, 669 &pca953x_irq_chip, 670 client->irq); 671 } 672 673 return 0; 674 } 675 676 #else /* CONFIG_GPIO_PCA953X_IRQ */ 677 static int pca953x_irq_setup(struct pca953x_chip *chip, 678 int irq_base) 679 { 680 struct i2c_client *client = chip->client; 681 682 if (irq_base != -1 && (chip->driver_data & PCA_INT)) 683 dev_warn(&client->dev, "interrupt support not compiled in\n"); 684 685 return 0; 686 } 687 #endif 688 689 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) 690 { 691 int ret; 692 u8 val[MAX_BANK]; 693 694 chip->regs = &pca953x_regs; 695 696 ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output); 697 if (ret) 698 goto out; 699 700 ret = pca953x_read_regs(chip, chip->regs->direction, 701 chip->reg_direction); 702 if (ret) 703 goto out; 704 705 /* set platform specific polarity inversion */ 706 if (invert) 707 memset(val, 0xFF, NBANK(chip)); 708 else 709 memset(val, 0, NBANK(chip)); 710 711 ret = pca953x_write_regs(chip, PCA953X_INVERT, val); 712 out: 713 return ret; 714 } 715 716 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) 717 { 718 int ret; 719 u8 val[MAX_BANK]; 720 721 chip->regs = &pca957x_regs; 722 723 ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output); 724 if (ret) 725 goto out; 726 ret = pca953x_read_regs(chip, chip->regs->direction, 727 chip->reg_direction); 728 if (ret) 729 goto out; 730 731 /* set platform specific polarity inversion */ 732 if (invert) 733 memset(val, 0xFF, NBANK(chip)); 734 else 735 memset(val, 0, NBANK(chip)); 736 ret = pca953x_write_regs(chip, PCA957X_INVRT, val); 737 if (ret) 738 goto out; 739 740 /* To enable register 6, 7 to control pull up and pull down */ 741 memset(val, 0x02, NBANK(chip)); 742 ret = pca953x_write_regs(chip, PCA957X_BKEN, val); 743 if (ret) 744 goto out; 745 746 return 0; 747 out: 748 return ret; 749 } 750 751 static const struct of_device_id pca953x_dt_ids[]; 752 753 static int pca953x_probe(struct i2c_client *client, 754 const struct i2c_device_id *i2c_id) 755 { 756 struct pca953x_platform_data *pdata; 757 struct pca953x_chip *chip; 758 int irq_base = 0; 759 int ret; 760 u32 invert = 0; 761 struct regulator *reg; 762 763 chip = devm_kzalloc(&client->dev, 764 sizeof(struct pca953x_chip), GFP_KERNEL); 765 if (chip == NULL) 766 return -ENOMEM; 767 768 pdata = dev_get_platdata(&client->dev); 769 if (pdata) { 770 irq_base = pdata->irq_base; 771 chip->gpio_start = pdata->gpio_base; 772 invert = pdata->invert; 773 chip->names = pdata->names; 774 } else { 775 struct gpio_desc *reset_gpio; 776 777 chip->gpio_start = -1; 778 irq_base = 0; 779 780 /* 781 * See if we need to de-assert a reset pin. 782 * 783 * There is no known ACPI-enabled platforms that are 784 * using "reset" GPIO. Otherwise any of those platform 785 * must use _DSD method with corresponding property. 786 */ 787 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset", 788 GPIOD_OUT_LOW); 789 if (IS_ERR(reset_gpio)) 790 return PTR_ERR(reset_gpio); 791 } 792 793 chip->client = client; 794 795 reg = devm_regulator_get(&client->dev, "vcc"); 796 if (IS_ERR(reg)) { 797 ret = PTR_ERR(reg); 798 if (ret != -EPROBE_DEFER) 799 dev_err(&client->dev, "reg get err: %d\n", ret); 800 return ret; 801 } 802 ret = regulator_enable(reg); 803 if (ret) { 804 dev_err(&client->dev, "reg en err: %d\n", ret); 805 return ret; 806 } 807 chip->regulator = reg; 808 809 if (i2c_id) { 810 chip->driver_data = i2c_id->driver_data; 811 } else { 812 const struct acpi_device_id *acpi_id; 813 const struct of_device_id *match; 814 815 match = of_match_device(pca953x_dt_ids, &client->dev); 816 if (match) { 817 chip->driver_data = (int)(uintptr_t)match->data; 818 } else { 819 acpi_id = acpi_match_device(pca953x_acpi_ids, &client->dev); 820 if (!acpi_id) { 821 ret = -ENODEV; 822 goto err_exit; 823 } 824 825 chip->driver_data = acpi_id->driver_data; 826 } 827 } 828 829 mutex_init(&chip->i2c_lock); 830 /* 831 * In case we have an i2c-mux controlled by a GPIO provided by an 832 * expander using the same driver higher on the device tree, read the 833 * i2c adapter nesting depth and use the retrieved value as lockdep 834 * subclass for chip->i2c_lock. 835 * 836 * REVISIT: This solution is not complete. It protects us from lockdep 837 * false positives when the expander controlling the i2c-mux is on 838 * a different level on the device tree, but not when it's on the same 839 * level on a different branch (in which case the subclass number 840 * would be the same). 841 * 842 * TODO: Once a correct solution is developed, a similar fix should be 843 * applied to all other i2c-controlled GPIO expanders (and potentially 844 * regmap-i2c). 845 */ 846 lockdep_set_subclass(&chip->i2c_lock, 847 i2c_adapter_depth(client->adapter)); 848 849 /* initialize cached registers from their original values. 850 * we can't share this chip with another i2c master. 851 */ 852 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK); 853 854 if (chip->gpio_chip.ngpio <= 8) { 855 chip->write_regs = pca953x_write_regs_8; 856 chip->read_regs = pca953x_read_regs_8; 857 } else if (chip->gpio_chip.ngpio >= 24) { 858 chip->write_regs = pca953x_write_regs_24; 859 chip->read_regs = pca953x_read_regs_24; 860 } else { 861 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) 862 chip->write_regs = pca953x_write_regs_16; 863 else 864 chip->write_regs = pca957x_write_regs_16; 865 chip->read_regs = pca953x_read_regs_16; 866 } 867 868 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) 869 ret = device_pca953x_init(chip, invert); 870 else 871 ret = device_pca957x_init(chip, invert); 872 if (ret) 873 goto err_exit; 874 875 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip); 876 if (ret) 877 goto err_exit; 878 879 ret = pca953x_irq_setup(chip, irq_base); 880 if (ret) 881 goto err_exit; 882 883 if (pdata && pdata->setup) { 884 ret = pdata->setup(client, chip->gpio_chip.base, 885 chip->gpio_chip.ngpio, pdata->context); 886 if (ret < 0) 887 dev_warn(&client->dev, "setup failed, %d\n", ret); 888 } 889 890 i2c_set_clientdata(client, chip); 891 return 0; 892 893 err_exit: 894 regulator_disable(chip->regulator); 895 return ret; 896 } 897 898 static int pca953x_remove(struct i2c_client *client) 899 { 900 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev); 901 struct pca953x_chip *chip = i2c_get_clientdata(client); 902 int ret; 903 904 if (pdata && pdata->teardown) { 905 ret = pdata->teardown(client, chip->gpio_chip.base, 906 chip->gpio_chip.ngpio, pdata->context); 907 if (ret < 0) 908 dev_err(&client->dev, "%s failed, %d\n", 909 "teardown", ret); 910 } else { 911 ret = 0; 912 } 913 914 regulator_disable(chip->regulator); 915 916 return ret; 917 } 918 919 /* convenience to stop overlong match-table lines */ 920 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int) 921 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int) 922 923 static const struct of_device_id pca953x_dt_ids[] = { 924 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), }, 925 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), }, 926 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), }, 927 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), }, 928 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), }, 929 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), }, 930 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), }, 931 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), }, 932 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), }, 933 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), }, 934 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), }, 935 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), }, 936 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), }, 937 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), }, 938 939 { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_INT), }, 940 { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_INT), }, 941 942 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), }, 943 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), }, 944 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), }, 945 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), }, 946 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), }, 947 948 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), }, 949 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), }, 950 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), }, 951 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), }, 952 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), }, 953 954 { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), }, 955 956 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), }, 957 { } 958 }; 959 960 MODULE_DEVICE_TABLE(of, pca953x_dt_ids); 961 962 static struct i2c_driver pca953x_driver = { 963 .driver = { 964 .name = "pca953x", 965 .of_match_table = pca953x_dt_ids, 966 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids), 967 }, 968 .probe = pca953x_probe, 969 .remove = pca953x_remove, 970 .id_table = pca953x_id, 971 }; 972 973 static int __init pca953x_init(void) 974 { 975 return i2c_add_driver(&pca953x_driver); 976 } 977 /* register after i2c postcore initcall and before 978 * subsys initcalls that may rely on these GPIOs 979 */ 980 subsys_initcall(pca953x_init); 981 982 static void __exit pca953x_exit(void) 983 { 984 i2c_del_driver(&pca953x_driver); 985 } 986 module_exit(pca953x_exit); 987 988 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>"); 989 MODULE_DESCRIPTION("GPIO expander driver for PCA953x"); 990 MODULE_LICENSE("GPL"); 991