xref: /openbmc/linux/drivers/gpio/gpio-pca953x.c (revision dea54fba)
1 /*
2  *  PCA953x 4/8/16/24/40 bit I/O ports
3  *
4  *  Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
5  *  Copyright (C) 2007 Marvell International Ltd.
6  *
7  *  Derived from drivers/i2c/chips/pca9539.c
8  *
9  *  This program is free software; you can redistribute it and/or modify
10  *  it under the terms of the GNU General Public License as published by
11  *  the Free Software Foundation; version 2 of the License.
12  */
13 
14 #include <linux/acpi.h>
15 #include <linux/gpio.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/i2c.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/module.h>
21 #include <linux/of_platform.h>
22 #include <linux/platform_data/pca953x.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/slab.h>
25 
26 #include <asm/unaligned.h>
27 
28 #define PCA953X_INPUT		0
29 #define PCA953X_OUTPUT		1
30 #define PCA953X_INVERT		2
31 #define PCA953X_DIRECTION	3
32 
33 #define REG_ADDR_AI		0x80
34 
35 #define PCA957X_IN		0
36 #define PCA957X_INVRT		1
37 #define PCA957X_BKEN		2
38 #define PCA957X_PUPD		3
39 #define PCA957X_CFG		4
40 #define PCA957X_OUT		5
41 #define PCA957X_MSK		6
42 #define PCA957X_INTS		7
43 
44 #define PCAL953X_IN_LATCH	34
45 #define PCAL953X_INT_MASK	37
46 #define PCAL953X_INT_STAT	38
47 
48 #define PCA_GPIO_MASK		0x00FF
49 #define PCA_INT			0x0100
50 #define PCA_PCAL		0x0200
51 #define PCA953X_TYPE		0x1000
52 #define PCA957X_TYPE		0x2000
53 #define PCA_TYPE_MASK		0xF000
54 
55 #define PCA_CHIP_TYPE(x)	((x) & PCA_TYPE_MASK)
56 
57 static const struct i2c_device_id pca953x_id[] = {
58 	{ "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
59 	{ "pca9534", 8  | PCA953X_TYPE | PCA_INT, },
60 	{ "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
61 	{ "pca9536", 4  | PCA953X_TYPE, },
62 	{ "pca9537", 4  | PCA953X_TYPE | PCA_INT, },
63 	{ "pca9538", 8  | PCA953X_TYPE | PCA_INT, },
64 	{ "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
65 	{ "pca9554", 8  | PCA953X_TYPE | PCA_INT, },
66 	{ "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
67 	{ "pca9556", 8  | PCA953X_TYPE, },
68 	{ "pca9557", 8  | PCA953X_TYPE, },
69 	{ "pca9574", 8  | PCA957X_TYPE | PCA_INT, },
70 	{ "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
71 	{ "pca9698", 40 | PCA953X_TYPE, },
72 
73 	{ "pcal9555a", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
74 
75 	{ "max7310", 8  | PCA953X_TYPE, },
76 	{ "max7312", 16 | PCA953X_TYPE | PCA_INT, },
77 	{ "max7313", 16 | PCA953X_TYPE | PCA_INT, },
78 	{ "max7315", 8  | PCA953X_TYPE | PCA_INT, },
79 	{ "max7318", 16 | PCA953X_TYPE | PCA_INT, },
80 	{ "pca6107", 8  | PCA953X_TYPE | PCA_INT, },
81 	{ "tca6408", 8  | PCA953X_TYPE | PCA_INT, },
82 	{ "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
83 	{ "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
84 	{ "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
85 	{ "tca9554", 8  | PCA953X_TYPE | PCA_INT, },
86 	{ "xra1202", 8  | PCA953X_TYPE },
87 	{ }
88 };
89 MODULE_DEVICE_TABLE(i2c, pca953x_id);
90 
91 static const struct acpi_device_id pca953x_acpi_ids[] = {
92 	{ "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
93 	{ }
94 };
95 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
96 
97 #define MAX_BANK 5
98 #define BANK_SZ 8
99 
100 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
101 
102 struct pca953x_reg_config {
103 	int direction;
104 	int output;
105 	int input;
106 };
107 
108 static const struct pca953x_reg_config pca953x_regs = {
109 	.direction = PCA953X_DIRECTION,
110 	.output = PCA953X_OUTPUT,
111 	.input = PCA953X_INPUT,
112 };
113 
114 static const struct pca953x_reg_config pca957x_regs = {
115 	.direction = PCA957X_CFG,
116 	.output = PCA957X_OUT,
117 	.input = PCA957X_IN,
118 };
119 
120 struct pca953x_chip {
121 	unsigned gpio_start;
122 	u8 reg_output[MAX_BANK];
123 	u8 reg_direction[MAX_BANK];
124 	struct mutex i2c_lock;
125 
126 #ifdef CONFIG_GPIO_PCA953X_IRQ
127 	struct mutex irq_lock;
128 	u8 irq_mask[MAX_BANK];
129 	u8 irq_stat[MAX_BANK];
130 	u8 irq_trig_raise[MAX_BANK];
131 	u8 irq_trig_fall[MAX_BANK];
132 #endif
133 
134 	struct i2c_client *client;
135 	struct gpio_chip gpio_chip;
136 	const char *const *names;
137 	unsigned long driver_data;
138 	struct regulator *regulator;
139 
140 	const struct pca953x_reg_config *regs;
141 
142 	int (*write_regs)(struct pca953x_chip *, int, u8 *);
143 	int (*read_regs)(struct pca953x_chip *, int, u8 *);
144 };
145 
146 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
147 				int off)
148 {
149 	int ret;
150 	int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
151 	int offset = off / BANK_SZ;
152 
153 	ret = i2c_smbus_read_byte_data(chip->client,
154 				(reg << bank_shift) + offset);
155 	*val = ret;
156 
157 	if (ret < 0) {
158 		dev_err(&chip->client->dev, "failed reading register\n");
159 		return ret;
160 	}
161 
162 	return 0;
163 }
164 
165 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
166 				int off)
167 {
168 	int ret;
169 	int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
170 	int offset = off / BANK_SZ;
171 
172 	ret = i2c_smbus_write_byte_data(chip->client,
173 					(reg << bank_shift) + offset, val);
174 
175 	if (ret < 0) {
176 		dev_err(&chip->client->dev, "failed writing register\n");
177 		return ret;
178 	}
179 
180 	return 0;
181 }
182 
183 static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val)
184 {
185 	return i2c_smbus_write_byte_data(chip->client, reg, *val);
186 }
187 
188 static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
189 {
190 	__le16 word = cpu_to_le16(get_unaligned((u16 *)val));
191 
192 	return i2c_smbus_write_word_data(chip->client,
193 					 reg << 1, (__force u16)word);
194 }
195 
196 static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
197 {
198 	int ret;
199 
200 	ret = i2c_smbus_write_byte_data(chip->client, reg << 1, val[0]);
201 	if (ret < 0)
202 		return ret;
203 
204 	return i2c_smbus_write_byte_data(chip->client, (reg << 1) + 1, val[1]);
205 }
206 
207 static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
208 {
209 	int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
210 
211 	return i2c_smbus_write_i2c_block_data(chip->client,
212 					      (reg << bank_shift) | REG_ADDR_AI,
213 					      NBANK(chip), val);
214 }
215 
216 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
217 {
218 	int ret = 0;
219 
220 	ret = chip->write_regs(chip, reg, val);
221 	if (ret < 0) {
222 		dev_err(&chip->client->dev, "failed writing register\n");
223 		return ret;
224 	}
225 
226 	return 0;
227 }
228 
229 static int pca953x_read_regs_8(struct pca953x_chip *chip, int reg, u8 *val)
230 {
231 	int ret;
232 
233 	ret = i2c_smbus_read_byte_data(chip->client, reg);
234 	*val = ret;
235 
236 	return ret;
237 }
238 
239 static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
240 {
241 	int ret;
242 
243 	ret = i2c_smbus_read_word_data(chip->client, reg << 1);
244 	val[0] = (u16)ret & 0xFF;
245 	val[1] = (u16)ret >> 8;
246 
247 	return ret;
248 }
249 
250 static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
251 {
252 	int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
253 
254 	return i2c_smbus_read_i2c_block_data(chip->client,
255 					     (reg << bank_shift) | REG_ADDR_AI,
256 					     NBANK(chip), val);
257 }
258 
259 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
260 {
261 	int ret;
262 
263 	ret = chip->read_regs(chip, reg, val);
264 	if (ret < 0) {
265 		dev_err(&chip->client->dev, "failed reading register\n");
266 		return ret;
267 	}
268 
269 	return 0;
270 }
271 
272 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
273 {
274 	struct pca953x_chip *chip = gpiochip_get_data(gc);
275 	u8 reg_val;
276 	int ret;
277 
278 	mutex_lock(&chip->i2c_lock);
279 	reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
280 
281 	ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
282 	if (ret)
283 		goto exit;
284 
285 	chip->reg_direction[off / BANK_SZ] = reg_val;
286 exit:
287 	mutex_unlock(&chip->i2c_lock);
288 	return ret;
289 }
290 
291 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
292 		unsigned off, int val)
293 {
294 	struct pca953x_chip *chip = gpiochip_get_data(gc);
295 	u8 reg_val;
296 	int ret;
297 
298 	mutex_lock(&chip->i2c_lock);
299 	/* set output level */
300 	if (val)
301 		reg_val = chip->reg_output[off / BANK_SZ]
302 			| (1u << (off % BANK_SZ));
303 	else
304 		reg_val = chip->reg_output[off / BANK_SZ]
305 			& ~(1u << (off % BANK_SZ));
306 
307 	ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
308 	if (ret)
309 		goto exit;
310 
311 	chip->reg_output[off / BANK_SZ] = reg_val;
312 
313 	/* then direction */
314 	reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
315 	ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
316 	if (ret)
317 		goto exit;
318 
319 	chip->reg_direction[off / BANK_SZ] = reg_val;
320 exit:
321 	mutex_unlock(&chip->i2c_lock);
322 	return ret;
323 }
324 
325 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
326 {
327 	struct pca953x_chip *chip = gpiochip_get_data(gc);
328 	u32 reg_val;
329 	int ret;
330 
331 	mutex_lock(&chip->i2c_lock);
332 	ret = pca953x_read_single(chip, chip->regs->input, &reg_val, off);
333 	mutex_unlock(&chip->i2c_lock);
334 	if (ret < 0) {
335 		/* NOTE:  diagnostic already emitted; that's all we should
336 		 * do unless gpio_*_value_cansleep() calls become different
337 		 * from their nonsleeping siblings (and report faults).
338 		 */
339 		return 0;
340 	}
341 
342 	return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0;
343 }
344 
345 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
346 {
347 	struct pca953x_chip *chip = gpiochip_get_data(gc);
348 	u8 reg_val;
349 	int ret;
350 
351 	mutex_lock(&chip->i2c_lock);
352 	if (val)
353 		reg_val = chip->reg_output[off / BANK_SZ]
354 			| (1u << (off % BANK_SZ));
355 	else
356 		reg_val = chip->reg_output[off / BANK_SZ]
357 			& ~(1u << (off % BANK_SZ));
358 
359 	ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
360 	if (ret)
361 		goto exit;
362 
363 	chip->reg_output[off / BANK_SZ] = reg_val;
364 exit:
365 	mutex_unlock(&chip->i2c_lock);
366 }
367 
368 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
369 {
370 	struct pca953x_chip *chip = gpiochip_get_data(gc);
371 	u32 reg_val;
372 	int ret;
373 
374 	mutex_lock(&chip->i2c_lock);
375 	ret = pca953x_read_single(chip, chip->regs->direction, &reg_val, off);
376 	mutex_unlock(&chip->i2c_lock);
377 	if (ret < 0)
378 		return ret;
379 
380 	return !!(reg_val & (1u << (off % BANK_SZ)));
381 }
382 
383 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
384 				      unsigned long *mask, unsigned long *bits)
385 {
386 	struct pca953x_chip *chip = gpiochip_get_data(gc);
387 	unsigned int bank_mask, bank_val;
388 	int bank_shift, bank;
389 	u8 reg_val[MAX_BANK];
390 	int ret;
391 
392 	bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
393 
394 	mutex_lock(&chip->i2c_lock);
395 	memcpy(reg_val, chip->reg_output, NBANK(chip));
396 	for (bank = 0; bank < NBANK(chip); bank++) {
397 		bank_mask = mask[bank / sizeof(*mask)] >>
398 			   ((bank % sizeof(*mask)) * 8);
399 		if (bank_mask) {
400 			bank_val = bits[bank / sizeof(*bits)] >>
401 				  ((bank % sizeof(*bits)) * 8);
402 			bank_val &= bank_mask;
403 			reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val;
404 		}
405 	}
406 
407 	ret = i2c_smbus_write_i2c_block_data(chip->client,
408 					     chip->regs->output << bank_shift,
409 					     NBANK(chip), reg_val);
410 	if (ret)
411 		goto exit;
412 
413 	memcpy(chip->reg_output, reg_val, NBANK(chip));
414 exit:
415 	mutex_unlock(&chip->i2c_lock);
416 }
417 
418 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
419 {
420 	struct gpio_chip *gc;
421 
422 	gc = &chip->gpio_chip;
423 
424 	gc->direction_input  = pca953x_gpio_direction_input;
425 	gc->direction_output = pca953x_gpio_direction_output;
426 	gc->get = pca953x_gpio_get_value;
427 	gc->set = pca953x_gpio_set_value;
428 	gc->get_direction = pca953x_gpio_get_direction;
429 	gc->set_multiple = pca953x_gpio_set_multiple;
430 	gc->can_sleep = true;
431 
432 	gc->base = chip->gpio_start;
433 	gc->ngpio = gpios;
434 	gc->label = chip->client->name;
435 	gc->parent = &chip->client->dev;
436 	gc->owner = THIS_MODULE;
437 	gc->names = chip->names;
438 }
439 
440 #ifdef CONFIG_GPIO_PCA953X_IRQ
441 static void pca953x_irq_mask(struct irq_data *d)
442 {
443 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
444 	struct pca953x_chip *chip = gpiochip_get_data(gc);
445 
446 	chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
447 }
448 
449 static void pca953x_irq_unmask(struct irq_data *d)
450 {
451 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
452 	struct pca953x_chip *chip = gpiochip_get_data(gc);
453 
454 	chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
455 }
456 
457 static void pca953x_irq_bus_lock(struct irq_data *d)
458 {
459 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
460 	struct pca953x_chip *chip = gpiochip_get_data(gc);
461 
462 	mutex_lock(&chip->irq_lock);
463 }
464 
465 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
466 {
467 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
468 	struct pca953x_chip *chip = gpiochip_get_data(gc);
469 	u8 new_irqs;
470 	int level, i;
471 	u8 invert_irq_mask[MAX_BANK];
472 
473 	if (chip->driver_data & PCA_PCAL) {
474 		/* Enable latch on interrupt-enabled inputs */
475 		pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
476 
477 		for (i = 0; i < NBANK(chip); i++)
478 			invert_irq_mask[i] = ~chip->irq_mask[i];
479 
480 		/* Unmask enabled interrupts */
481 		pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
482 	}
483 
484 	/* Look for any newly setup interrupt */
485 	for (i = 0; i < NBANK(chip); i++) {
486 		new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
487 		new_irqs &= ~chip->reg_direction[i];
488 
489 		while (new_irqs) {
490 			level = __ffs(new_irqs);
491 			pca953x_gpio_direction_input(&chip->gpio_chip,
492 							level + (BANK_SZ * i));
493 			new_irqs &= ~(1 << level);
494 		}
495 	}
496 
497 	mutex_unlock(&chip->irq_lock);
498 }
499 
500 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
501 {
502 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
503 	struct pca953x_chip *chip = gpiochip_get_data(gc);
504 	int bank_nb = d->hwirq / BANK_SZ;
505 	u8 mask = 1 << (d->hwirq % BANK_SZ);
506 
507 	if (!(type & IRQ_TYPE_EDGE_BOTH)) {
508 		dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
509 			d->irq, type);
510 		return -EINVAL;
511 	}
512 
513 	if (type & IRQ_TYPE_EDGE_FALLING)
514 		chip->irq_trig_fall[bank_nb] |= mask;
515 	else
516 		chip->irq_trig_fall[bank_nb] &= ~mask;
517 
518 	if (type & IRQ_TYPE_EDGE_RISING)
519 		chip->irq_trig_raise[bank_nb] |= mask;
520 	else
521 		chip->irq_trig_raise[bank_nb] &= ~mask;
522 
523 	return 0;
524 }
525 
526 static struct irq_chip pca953x_irq_chip = {
527 	.name			= "pca953x",
528 	.irq_mask		= pca953x_irq_mask,
529 	.irq_unmask		= pca953x_irq_unmask,
530 	.irq_bus_lock		= pca953x_irq_bus_lock,
531 	.irq_bus_sync_unlock	= pca953x_irq_bus_sync_unlock,
532 	.irq_set_type		= pca953x_irq_set_type,
533 };
534 
535 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
536 {
537 	u8 cur_stat[MAX_BANK];
538 	u8 old_stat[MAX_BANK];
539 	bool pending_seen = false;
540 	bool trigger_seen = false;
541 	u8 trigger[MAX_BANK];
542 	int ret, i;
543 
544 	if (chip->driver_data & PCA_PCAL) {
545 		/* Read the current interrupt status from the device */
546 		ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
547 		if (ret)
548 			return false;
549 
550 		/* Check latched inputs and clear interrupt status */
551 		ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
552 		if (ret)
553 			return false;
554 
555 		for (i = 0; i < NBANK(chip); i++) {
556 			/* Apply filter for rising/falling edge selection */
557 			pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
558 				(cur_stat[i] & chip->irq_trig_raise[i]);
559 			pending[i] &= trigger[i];
560 			if (pending[i])
561 				pending_seen = true;
562 		}
563 
564 		return pending_seen;
565 	}
566 
567 	ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
568 	if (ret)
569 		return false;
570 
571 	/* Remove output pins from the equation */
572 	for (i = 0; i < NBANK(chip); i++)
573 		cur_stat[i] &= chip->reg_direction[i];
574 
575 	memcpy(old_stat, chip->irq_stat, NBANK(chip));
576 
577 	for (i = 0; i < NBANK(chip); i++) {
578 		trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
579 		if (trigger[i])
580 			trigger_seen = true;
581 	}
582 
583 	if (!trigger_seen)
584 		return false;
585 
586 	memcpy(chip->irq_stat, cur_stat, NBANK(chip));
587 
588 	for (i = 0; i < NBANK(chip); i++) {
589 		pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
590 			(cur_stat[i] & chip->irq_trig_raise[i]);
591 		pending[i] &= trigger[i];
592 		if (pending[i])
593 			pending_seen = true;
594 	}
595 
596 	return pending_seen;
597 }
598 
599 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
600 {
601 	struct pca953x_chip *chip = devid;
602 	u8 pending[MAX_BANK];
603 	u8 level;
604 	unsigned nhandled = 0;
605 	int i;
606 
607 	if (!pca953x_irq_pending(chip, pending))
608 		return IRQ_NONE;
609 
610 	for (i = 0; i < NBANK(chip); i++) {
611 		while (pending[i]) {
612 			level = __ffs(pending[i]);
613 			handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain,
614 							level + (BANK_SZ * i)));
615 			pending[i] &= ~(1 << level);
616 			nhandled++;
617 		}
618 	}
619 
620 	return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
621 }
622 
623 static int pca953x_irq_setup(struct pca953x_chip *chip,
624 			     int irq_base)
625 {
626 	struct i2c_client *client = chip->client;
627 	int ret, i;
628 
629 	if (client->irq && irq_base != -1
630 			&& (chip->driver_data & PCA_INT)) {
631 		ret = pca953x_read_regs(chip,
632 					chip->regs->input, chip->irq_stat);
633 		if (ret)
634 			return ret;
635 
636 		/*
637 		 * There is no way to know which GPIO line generated the
638 		 * interrupt.  We have to rely on the previous read for
639 		 * this purpose.
640 		 */
641 		for (i = 0; i < NBANK(chip); i++)
642 			chip->irq_stat[i] &= chip->reg_direction[i];
643 		mutex_init(&chip->irq_lock);
644 
645 		ret = devm_request_threaded_irq(&client->dev,
646 					client->irq,
647 					   NULL,
648 					   pca953x_irq_handler,
649 					   IRQF_TRIGGER_LOW | IRQF_ONESHOT |
650 						   IRQF_SHARED,
651 					   dev_name(&client->dev), chip);
652 		if (ret) {
653 			dev_err(&client->dev, "failed to request irq %d\n",
654 				client->irq);
655 			return ret;
656 		}
657 
658 		ret =  gpiochip_irqchip_add_nested(&chip->gpio_chip,
659 						   &pca953x_irq_chip,
660 						   irq_base,
661 						   handle_simple_irq,
662 						   IRQ_TYPE_NONE);
663 		if (ret) {
664 			dev_err(&client->dev,
665 				"could not connect irqchip to gpiochip\n");
666 			return ret;
667 		}
668 
669 		gpiochip_set_nested_irqchip(&chip->gpio_chip,
670 					    &pca953x_irq_chip,
671 					    client->irq);
672 	}
673 
674 	return 0;
675 }
676 
677 #else /* CONFIG_GPIO_PCA953X_IRQ */
678 static int pca953x_irq_setup(struct pca953x_chip *chip,
679 			     int irq_base)
680 {
681 	struct i2c_client *client = chip->client;
682 
683 	if (irq_base != -1 && (chip->driver_data & PCA_INT))
684 		dev_warn(&client->dev, "interrupt support not compiled in\n");
685 
686 	return 0;
687 }
688 #endif
689 
690 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
691 {
692 	int ret;
693 	u8 val[MAX_BANK];
694 
695 	chip->regs = &pca953x_regs;
696 
697 	ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
698 	if (ret)
699 		goto out;
700 
701 	ret = pca953x_read_regs(chip, chip->regs->direction,
702 				chip->reg_direction);
703 	if (ret)
704 		goto out;
705 
706 	/* set platform specific polarity inversion */
707 	if (invert)
708 		memset(val, 0xFF, NBANK(chip));
709 	else
710 		memset(val, 0, NBANK(chip));
711 
712 	ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
713 out:
714 	return ret;
715 }
716 
717 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
718 {
719 	int ret;
720 	u8 val[MAX_BANK];
721 
722 	chip->regs = &pca957x_regs;
723 
724 	ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
725 	if (ret)
726 		goto out;
727 	ret = pca953x_read_regs(chip, chip->regs->direction,
728 				chip->reg_direction);
729 	if (ret)
730 		goto out;
731 
732 	/* set platform specific polarity inversion */
733 	if (invert)
734 		memset(val, 0xFF, NBANK(chip));
735 	else
736 		memset(val, 0, NBANK(chip));
737 	ret = pca953x_write_regs(chip, PCA957X_INVRT, val);
738 	if (ret)
739 		goto out;
740 
741 	/* To enable register 6, 7 to control pull up and pull down */
742 	memset(val, 0x02, NBANK(chip));
743 	ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
744 	if (ret)
745 		goto out;
746 
747 	return 0;
748 out:
749 	return ret;
750 }
751 
752 static const struct of_device_id pca953x_dt_ids[];
753 
754 static int pca953x_probe(struct i2c_client *client,
755 				   const struct i2c_device_id *i2c_id)
756 {
757 	struct pca953x_platform_data *pdata;
758 	struct pca953x_chip *chip;
759 	int irq_base = 0;
760 	int ret;
761 	u32 invert = 0;
762 	struct regulator *reg;
763 
764 	chip = devm_kzalloc(&client->dev,
765 			sizeof(struct pca953x_chip), GFP_KERNEL);
766 	if (chip == NULL)
767 		return -ENOMEM;
768 
769 	pdata = dev_get_platdata(&client->dev);
770 	if (pdata) {
771 		irq_base = pdata->irq_base;
772 		chip->gpio_start = pdata->gpio_base;
773 		invert = pdata->invert;
774 		chip->names = pdata->names;
775 	} else {
776 		struct gpio_desc *reset_gpio;
777 
778 		chip->gpio_start = -1;
779 		irq_base = 0;
780 
781 		/*
782 		 * See if we need to de-assert a reset pin.
783 		 *
784 		 * There is no known ACPI-enabled platforms that are
785 		 * using "reset" GPIO. Otherwise any of those platform
786 		 * must use _DSD method with corresponding property.
787 		 */
788 		reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
789 						     GPIOD_OUT_LOW);
790 		if (IS_ERR(reset_gpio))
791 			return PTR_ERR(reset_gpio);
792 	}
793 
794 	chip->client = client;
795 
796 	reg = devm_regulator_get(&client->dev, "vcc");
797 	if (IS_ERR(reg)) {
798 		ret = PTR_ERR(reg);
799 		if (ret != -EPROBE_DEFER)
800 			dev_err(&client->dev, "reg get err: %d\n", ret);
801 		return ret;
802 	}
803 	ret = regulator_enable(reg);
804 	if (ret) {
805 		dev_err(&client->dev, "reg en err: %d\n", ret);
806 		return ret;
807 	}
808 	chip->regulator = reg;
809 
810 	if (i2c_id) {
811 		chip->driver_data = i2c_id->driver_data;
812 	} else {
813 		const struct acpi_device_id *acpi_id;
814 		const struct of_device_id *match;
815 
816 		match = of_match_device(pca953x_dt_ids, &client->dev);
817 		if (match) {
818 			chip->driver_data = (int)(uintptr_t)match->data;
819 		} else {
820 			acpi_id = acpi_match_device(pca953x_acpi_ids, &client->dev);
821 			if (!acpi_id) {
822 				ret = -ENODEV;
823 				goto err_exit;
824 			}
825 
826 			chip->driver_data = acpi_id->driver_data;
827 		}
828 	}
829 
830 	mutex_init(&chip->i2c_lock);
831 	/*
832 	 * In case we have an i2c-mux controlled by a GPIO provided by an
833 	 * expander using the same driver higher on the device tree, read the
834 	 * i2c adapter nesting depth and use the retrieved value as lockdep
835 	 * subclass for chip->i2c_lock.
836 	 *
837 	 * REVISIT: This solution is not complete. It protects us from lockdep
838 	 * false positives when the expander controlling the i2c-mux is on
839 	 * a different level on the device tree, but not when it's on the same
840 	 * level on a different branch (in which case the subclass number
841 	 * would be the same).
842 	 *
843 	 * TODO: Once a correct solution is developed, a similar fix should be
844 	 * applied to all other i2c-controlled GPIO expanders (and potentially
845 	 * regmap-i2c).
846 	 */
847 	lockdep_set_subclass(&chip->i2c_lock,
848 			     i2c_adapter_depth(client->adapter));
849 
850 	/* initialize cached registers from their original values.
851 	 * we can't share this chip with another i2c master.
852 	 */
853 	pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
854 
855 	if (chip->gpio_chip.ngpio <= 8) {
856 		chip->write_regs = pca953x_write_regs_8;
857 		chip->read_regs = pca953x_read_regs_8;
858 	} else if (chip->gpio_chip.ngpio >= 24) {
859 		chip->write_regs = pca953x_write_regs_24;
860 		chip->read_regs = pca953x_read_regs_24;
861 	} else {
862 		if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
863 			chip->write_regs = pca953x_write_regs_16;
864 		else
865 			chip->write_regs = pca957x_write_regs_16;
866 		chip->read_regs = pca953x_read_regs_16;
867 	}
868 
869 	if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
870 		ret = device_pca953x_init(chip, invert);
871 	else
872 		ret = device_pca957x_init(chip, invert);
873 	if (ret)
874 		goto err_exit;
875 
876 	ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
877 	if (ret)
878 		goto err_exit;
879 
880 	ret = pca953x_irq_setup(chip, irq_base);
881 	if (ret)
882 		goto err_exit;
883 
884 	if (pdata && pdata->setup) {
885 		ret = pdata->setup(client, chip->gpio_chip.base,
886 				chip->gpio_chip.ngpio, pdata->context);
887 		if (ret < 0)
888 			dev_warn(&client->dev, "setup failed, %d\n", ret);
889 	}
890 
891 	i2c_set_clientdata(client, chip);
892 	return 0;
893 
894 err_exit:
895 	regulator_disable(chip->regulator);
896 	return ret;
897 }
898 
899 static int pca953x_remove(struct i2c_client *client)
900 {
901 	struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
902 	struct pca953x_chip *chip = i2c_get_clientdata(client);
903 	int ret;
904 
905 	if (pdata && pdata->teardown) {
906 		ret = pdata->teardown(client, chip->gpio_chip.base,
907 				chip->gpio_chip.ngpio, pdata->context);
908 		if (ret < 0)
909 			dev_err(&client->dev, "%s failed, %d\n",
910 					"teardown", ret);
911 	} else {
912 		ret = 0;
913 	}
914 
915 	regulator_disable(chip->regulator);
916 
917 	return ret;
918 }
919 
920 /* convenience to stop overlong match-table lines */
921 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
922 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
923 
924 static const struct of_device_id pca953x_dt_ids[] = {
925 	{ .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
926 	{ .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
927 	{ .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
928 	{ .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
929 	{ .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
930 	{ .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
931 	{ .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
932 	{ .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
933 	{ .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
934 	{ .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
935 	{ .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
936 	{ .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
937 	{ .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
938 	{ .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
939 
940 	{ .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
941 	{ .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
942 	{ .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
943 	{ .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
944 	{ .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
945 
946 	{ .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
947 	{ .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
948 	{ .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
949 	{ .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
950 	{ .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
951 
952 	{ .compatible = "onsemi,pca9654", .data = OF_953X( 8, PCA_INT), },
953 
954 	{ .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
955 	{ }
956 };
957 
958 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
959 
960 static struct i2c_driver pca953x_driver = {
961 	.driver = {
962 		.name	= "pca953x",
963 		.of_match_table = pca953x_dt_ids,
964 		.acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
965 	},
966 	.probe		= pca953x_probe,
967 	.remove		= pca953x_remove,
968 	.id_table	= pca953x_id,
969 };
970 
971 static int __init pca953x_init(void)
972 {
973 	return i2c_add_driver(&pca953x_driver);
974 }
975 /* register after i2c postcore initcall and before
976  * subsys initcalls that may rely on these GPIOs
977  */
978 subsys_initcall(pca953x_init);
979 
980 static void __exit pca953x_exit(void)
981 {
982 	i2c_del_driver(&pca953x_driver);
983 }
984 module_exit(pca953x_exit);
985 
986 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
987 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
988 MODULE_LICENSE("GPL");
989