1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * PCA953x 4/8/16/24/40 bit I/O ports 4 * 5 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com> 6 * Copyright (C) 2007 Marvell International Ltd. 7 * 8 * Derived from drivers/i2c/chips/pca9539.c 9 */ 10 11 #include <linux/acpi.h> 12 #include <linux/bitmap.h> 13 #include <linux/gpio/driver.h> 14 #include <linux/gpio/consumer.h> 15 #include <linux/i2c.h> 16 #include <linux/init.h> 17 #include <linux/interrupt.h> 18 #include <linux/module.h> 19 #include <linux/of_platform.h> 20 #include <linux/platform_data/pca953x.h> 21 #include <linux/regmap.h> 22 #include <linux/regulator/consumer.h> 23 #include <linux/slab.h> 24 25 #include <asm/unaligned.h> 26 27 #define PCA953X_INPUT 0x00 28 #define PCA953X_OUTPUT 0x01 29 #define PCA953X_INVERT 0x02 30 #define PCA953X_DIRECTION 0x03 31 32 #define REG_ADDR_MASK GENMASK(5, 0) 33 #define REG_ADDR_EXT BIT(6) 34 #define REG_ADDR_AI BIT(7) 35 36 #define PCA957X_IN 0x00 37 #define PCA957X_INVRT 0x01 38 #define PCA957X_BKEN 0x02 39 #define PCA957X_PUPD 0x03 40 #define PCA957X_CFG 0x04 41 #define PCA957X_OUT 0x05 42 #define PCA957X_MSK 0x06 43 #define PCA957X_INTS 0x07 44 45 #define PCAL953X_OUT_STRENGTH 0x20 46 #define PCAL953X_IN_LATCH 0x22 47 #define PCAL953X_PULL_EN 0x23 48 #define PCAL953X_PULL_SEL 0x24 49 #define PCAL953X_INT_MASK 0x25 50 #define PCAL953X_INT_STAT 0x26 51 #define PCAL953X_OUT_CONF 0x27 52 53 #define PCAL6524_INT_EDGE 0x28 54 #define PCAL6524_INT_CLR 0x2a 55 #define PCAL6524_IN_STATUS 0x2b 56 #define PCAL6524_OUT_INDCONF 0x2c 57 #define PCAL6524_DEBOUNCE 0x2d 58 59 #define PCA_GPIO_MASK GENMASK(7, 0) 60 61 #define PCAL_GPIO_MASK GENMASK(4, 0) 62 #define PCAL_PINCTRL_MASK GENMASK(6, 5) 63 64 #define PCA_INT BIT(8) 65 #define PCA_PCAL BIT(9) 66 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT) 67 #define PCA953X_TYPE BIT(12) 68 #define PCA957X_TYPE BIT(13) 69 #define PCA_TYPE_MASK GENMASK(15, 12) 70 71 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK) 72 73 static const struct i2c_device_id pca953x_id[] = { 74 { "pca6416", 16 | PCA953X_TYPE | PCA_INT, }, 75 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, }, 76 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, }, 77 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, }, 78 { "pca9536", 4 | PCA953X_TYPE, }, 79 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, }, 80 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, }, 81 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, }, 82 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, }, 83 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, }, 84 { "pca9556", 8 | PCA953X_TYPE, }, 85 { "pca9557", 8 | PCA953X_TYPE, }, 86 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, }, 87 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, }, 88 { "pca9698", 40 | PCA953X_TYPE, }, 89 90 { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, 91 { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, }, 92 { "pcal9535", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, 93 { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, 94 95 { "max7310", 8 | PCA953X_TYPE, }, 96 { "max7312", 16 | PCA953X_TYPE | PCA_INT, }, 97 { "max7313", 16 | PCA953X_TYPE | PCA_INT, }, 98 { "max7315", 8 | PCA953X_TYPE | PCA_INT, }, 99 { "max7318", 16 | PCA953X_TYPE | PCA_INT, }, 100 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, }, 101 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, }, 102 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, }, 103 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, }, 104 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, }, 105 { "tca9554", 8 | PCA953X_TYPE | PCA_INT, }, 106 { "xra1202", 8 | PCA953X_TYPE }, 107 { } 108 }; 109 MODULE_DEVICE_TABLE(i2c, pca953x_id); 110 111 #ifdef CONFIG_GPIO_PCA953X_IRQ 112 113 #include <linux/dmi.h> 114 #include <linux/gpio.h> 115 #include <linux/list.h> 116 117 static const struct dmi_system_id pca953x_dmi_acpi_irq_info[] = { 118 { 119 /* 120 * On Intel Galileo Gen 2 board the IRQ pin of one of 121 * the I²C GPIO expanders, which has GpioInt() resource, 122 * is provided as an absolute number instead of being 123 * relative. Since first controller (gpio-sch.c) and 124 * second (gpio-dwapb.c) are at the fixed bases, we may 125 * safely refer to the number in the global space to get 126 * an IRQ out of it. 127 */ 128 .matches = { 129 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"), 130 }, 131 }, 132 {} 133 }; 134 135 #ifdef CONFIG_ACPI 136 static int pca953x_acpi_get_pin(struct acpi_resource *ares, void *data) 137 { 138 struct acpi_resource_gpio *agpio; 139 int *pin = data; 140 141 if (acpi_gpio_get_irq_resource(ares, &agpio)) 142 *pin = agpio->pin_table[0]; 143 return 1; 144 } 145 146 static int pca953x_acpi_find_pin(struct device *dev) 147 { 148 struct acpi_device *adev = ACPI_COMPANION(dev); 149 int pin = -ENOENT, ret; 150 LIST_HEAD(r); 151 152 ret = acpi_dev_get_resources(adev, &r, pca953x_acpi_get_pin, &pin); 153 acpi_dev_free_resource_list(&r); 154 if (ret < 0) 155 return ret; 156 157 return pin; 158 } 159 #else 160 static inline int pca953x_acpi_find_pin(struct device *dev) { return -ENXIO; } 161 #endif 162 163 static int pca953x_acpi_get_irq(struct device *dev) 164 { 165 int pin, ret; 166 167 pin = pca953x_acpi_find_pin(dev); 168 if (pin < 0) 169 return pin; 170 171 dev_info(dev, "Applying ACPI interrupt quirk (GPIO %d)\n", pin); 172 173 if (!gpio_is_valid(pin)) 174 return -EINVAL; 175 176 ret = gpio_request(pin, "pca953x interrupt"); 177 if (ret) 178 return ret; 179 180 ret = gpio_to_irq(pin); 181 182 /* When pin is used as an IRQ, no need to keep it requested */ 183 gpio_free(pin); 184 185 return ret; 186 } 187 #endif 188 189 static const struct acpi_device_id pca953x_acpi_ids[] = { 190 { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, 191 { } 192 }; 193 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids); 194 195 #define MAX_BANK 5 196 #define BANK_SZ 8 197 #define MAX_LINE (MAX_BANK * BANK_SZ) 198 199 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ) 200 201 struct pca953x_reg_config { 202 int direction; 203 int output; 204 int input; 205 int invert; 206 }; 207 208 static const struct pca953x_reg_config pca953x_regs = { 209 .direction = PCA953X_DIRECTION, 210 .output = PCA953X_OUTPUT, 211 .input = PCA953X_INPUT, 212 .invert = PCA953X_INVERT, 213 }; 214 215 static const struct pca953x_reg_config pca957x_regs = { 216 .direction = PCA957X_CFG, 217 .output = PCA957X_OUT, 218 .input = PCA957X_IN, 219 .invert = PCA957X_INVRT, 220 }; 221 222 struct pca953x_chip { 223 unsigned gpio_start; 224 struct mutex i2c_lock; 225 struct regmap *regmap; 226 227 #ifdef CONFIG_GPIO_PCA953X_IRQ 228 struct mutex irq_lock; 229 DECLARE_BITMAP(irq_mask, MAX_LINE); 230 DECLARE_BITMAP(irq_stat, MAX_LINE); 231 DECLARE_BITMAP(irq_trig_raise, MAX_LINE); 232 DECLARE_BITMAP(irq_trig_fall, MAX_LINE); 233 struct irq_chip irq_chip; 234 #endif 235 atomic_t wakeup_path; 236 237 struct i2c_client *client; 238 struct gpio_chip gpio_chip; 239 const char *const *names; 240 unsigned long driver_data; 241 struct regulator *regulator; 242 243 const struct pca953x_reg_config *regs; 244 }; 245 246 static int pca953x_bank_shift(struct pca953x_chip *chip) 247 { 248 return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 249 } 250 251 #define PCA953x_BANK_INPUT BIT(0) 252 #define PCA953x_BANK_OUTPUT BIT(1) 253 #define PCA953x_BANK_POLARITY BIT(2) 254 #define PCA953x_BANK_CONFIG BIT(3) 255 256 #define PCA957x_BANK_INPUT BIT(0) 257 #define PCA957x_BANK_POLARITY BIT(1) 258 #define PCA957x_BANK_BUSHOLD BIT(2) 259 #define PCA957x_BANK_CONFIG BIT(4) 260 #define PCA957x_BANK_OUTPUT BIT(5) 261 262 #define PCAL9xxx_BANK_IN_LATCH BIT(8 + 2) 263 #define PCAL9xxx_BANK_PULL_EN BIT(8 + 3) 264 #define PCAL9xxx_BANK_PULL_SEL BIT(8 + 4) 265 #define PCAL9xxx_BANK_IRQ_MASK BIT(8 + 5) 266 #define PCAL9xxx_BANK_IRQ_STAT BIT(8 + 6) 267 268 /* 269 * We care about the following registers: 270 * - Standard set, below 0x40, each port can be replicated up to 8 times 271 * - PCA953x standard 272 * Input port 0x00 + 0 * bank_size R 273 * Output port 0x00 + 1 * bank_size RW 274 * Polarity Inversion port 0x00 + 2 * bank_size RW 275 * Configuration port 0x00 + 3 * bank_size RW 276 * - PCA957x with mixed up registers 277 * Input port 0x00 + 0 * bank_size R 278 * Polarity Inversion port 0x00 + 1 * bank_size RW 279 * Bus hold port 0x00 + 2 * bank_size RW 280 * Configuration port 0x00 + 4 * bank_size RW 281 * Output port 0x00 + 5 * bank_size RW 282 * 283 * - Extended set, above 0x40, often chip specific. 284 * - PCAL6524/PCAL9555A with custom PCAL IRQ handling: 285 * Input latch register 0x40 + 2 * bank_size RW 286 * Pull-up/pull-down enable reg 0x40 + 3 * bank_size RW 287 * Pull-up/pull-down select reg 0x40 + 4 * bank_size RW 288 * Interrupt mask register 0x40 + 5 * bank_size RW 289 * Interrupt status register 0x40 + 6 * bank_size R 290 * 291 * - Registers with bit 0x80 set, the AI bit 292 * The bit is cleared and the registers fall into one of the 293 * categories above. 294 */ 295 296 static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg, 297 u32 checkbank) 298 { 299 int bank_shift = pca953x_bank_shift(chip); 300 int bank = (reg & REG_ADDR_MASK) >> bank_shift; 301 int offset = reg & (BIT(bank_shift) - 1); 302 303 /* Special PCAL extended register check. */ 304 if (reg & REG_ADDR_EXT) { 305 if (!(chip->driver_data & PCA_PCAL)) 306 return false; 307 bank += 8; 308 } 309 310 /* Register is not in the matching bank. */ 311 if (!(BIT(bank) & checkbank)) 312 return false; 313 314 /* Register is not within allowed range of bank. */ 315 if (offset >= NBANK(chip)) 316 return false; 317 318 return true; 319 } 320 321 static bool pca953x_readable_register(struct device *dev, unsigned int reg) 322 { 323 struct pca953x_chip *chip = dev_get_drvdata(dev); 324 u32 bank; 325 326 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { 327 bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT | 328 PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG; 329 } else { 330 bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT | 331 PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG | 332 PCA957x_BANK_BUSHOLD; 333 } 334 335 if (chip->driver_data & PCA_PCAL) { 336 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN | 337 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK | 338 PCAL9xxx_BANK_IRQ_STAT; 339 } 340 341 return pca953x_check_register(chip, reg, bank); 342 } 343 344 static bool pca953x_writeable_register(struct device *dev, unsigned int reg) 345 { 346 struct pca953x_chip *chip = dev_get_drvdata(dev); 347 u32 bank; 348 349 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { 350 bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY | 351 PCA953x_BANK_CONFIG; 352 } else { 353 bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY | 354 PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD; 355 } 356 357 if (chip->driver_data & PCA_PCAL) 358 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN | 359 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK; 360 361 return pca953x_check_register(chip, reg, bank); 362 } 363 364 static bool pca953x_volatile_register(struct device *dev, unsigned int reg) 365 { 366 struct pca953x_chip *chip = dev_get_drvdata(dev); 367 u32 bank; 368 369 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) 370 bank = PCA953x_BANK_INPUT; 371 else 372 bank = PCA957x_BANK_INPUT; 373 374 if (chip->driver_data & PCA_PCAL) 375 bank |= PCAL9xxx_BANK_IRQ_STAT; 376 377 return pca953x_check_register(chip, reg, bank); 378 } 379 380 static const struct regmap_config pca953x_i2c_regmap = { 381 .reg_bits = 8, 382 .val_bits = 8, 383 384 .readable_reg = pca953x_readable_register, 385 .writeable_reg = pca953x_writeable_register, 386 .volatile_reg = pca953x_volatile_register, 387 388 .disable_locking = true, 389 .cache_type = REGCACHE_RBTREE, 390 .max_register = 0x7f, 391 }; 392 393 static const struct regmap_config pca953x_ai_i2c_regmap = { 394 .reg_bits = 8, 395 .val_bits = 8, 396 397 .read_flag_mask = REG_ADDR_AI, 398 .write_flag_mask = REG_ADDR_AI, 399 400 .readable_reg = pca953x_readable_register, 401 .writeable_reg = pca953x_writeable_register, 402 .volatile_reg = pca953x_volatile_register, 403 404 .disable_locking = true, 405 .cache_type = REGCACHE_RBTREE, 406 .max_register = 0x7f, 407 }; 408 409 static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off) 410 { 411 int bank_shift = pca953x_bank_shift(chip); 412 int addr = (reg & PCAL_GPIO_MASK) << bank_shift; 413 int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; 414 u8 regaddr = pinctrl | addr | (off / BANK_SZ); 415 416 return regaddr; 417 } 418 419 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, unsigned long *val) 420 { 421 u8 regaddr = pca953x_recalc_addr(chip, reg, 0); 422 u8 value[MAX_BANK]; 423 int i, ret; 424 425 for (i = 0; i < NBANK(chip); i++) 426 value[i] = bitmap_get_value8(val, i * BANK_SZ); 427 428 ret = regmap_bulk_write(chip->regmap, regaddr, value, NBANK(chip)); 429 if (ret < 0) { 430 dev_err(&chip->client->dev, "failed writing register\n"); 431 return ret; 432 } 433 434 return 0; 435 } 436 437 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, unsigned long *val) 438 { 439 u8 regaddr = pca953x_recalc_addr(chip, reg, 0); 440 u8 value[MAX_BANK]; 441 int i, ret; 442 443 ret = regmap_bulk_read(chip->regmap, regaddr, value, NBANK(chip)); 444 if (ret < 0) { 445 dev_err(&chip->client->dev, "failed reading register\n"); 446 return ret; 447 } 448 449 for (i = 0; i < NBANK(chip); i++) 450 bitmap_set_value8(val, value[i], i * BANK_SZ); 451 452 return 0; 453 } 454 455 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) 456 { 457 struct pca953x_chip *chip = gpiochip_get_data(gc); 458 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off); 459 u8 bit = BIT(off % BANK_SZ); 460 int ret; 461 462 mutex_lock(&chip->i2c_lock); 463 ret = regmap_write_bits(chip->regmap, dirreg, bit, bit); 464 mutex_unlock(&chip->i2c_lock); 465 return ret; 466 } 467 468 static int pca953x_gpio_direction_output(struct gpio_chip *gc, 469 unsigned off, int val) 470 { 471 struct pca953x_chip *chip = gpiochip_get_data(gc); 472 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off); 473 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off); 474 u8 bit = BIT(off % BANK_SZ); 475 int ret; 476 477 mutex_lock(&chip->i2c_lock); 478 /* set output level */ 479 ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0); 480 if (ret) 481 goto exit; 482 483 /* then direction */ 484 ret = regmap_write_bits(chip->regmap, dirreg, bit, 0); 485 exit: 486 mutex_unlock(&chip->i2c_lock); 487 return ret; 488 } 489 490 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) 491 { 492 struct pca953x_chip *chip = gpiochip_get_data(gc); 493 u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off); 494 u8 bit = BIT(off % BANK_SZ); 495 u32 reg_val; 496 int ret; 497 498 mutex_lock(&chip->i2c_lock); 499 ret = regmap_read(chip->regmap, inreg, ®_val); 500 mutex_unlock(&chip->i2c_lock); 501 if (ret < 0) { 502 /* 503 * NOTE: 504 * diagnostic already emitted; that's all we should 505 * do unless gpio_*_value_cansleep() calls become different 506 * from their nonsleeping siblings (and report faults). 507 */ 508 return 0; 509 } 510 511 return !!(reg_val & bit); 512 } 513 514 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) 515 { 516 struct pca953x_chip *chip = gpiochip_get_data(gc); 517 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off); 518 u8 bit = BIT(off % BANK_SZ); 519 520 mutex_lock(&chip->i2c_lock); 521 regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0); 522 mutex_unlock(&chip->i2c_lock); 523 } 524 525 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off) 526 { 527 struct pca953x_chip *chip = gpiochip_get_data(gc); 528 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off); 529 u8 bit = BIT(off % BANK_SZ); 530 u32 reg_val; 531 int ret; 532 533 mutex_lock(&chip->i2c_lock); 534 ret = regmap_read(chip->regmap, dirreg, ®_val); 535 mutex_unlock(&chip->i2c_lock); 536 if (ret < 0) 537 return ret; 538 539 if (reg_val & bit) 540 return GPIO_LINE_DIRECTION_IN; 541 542 return GPIO_LINE_DIRECTION_OUT; 543 } 544 545 static int pca953x_gpio_get_multiple(struct gpio_chip *gc, 546 unsigned long *mask, unsigned long *bits) 547 { 548 struct pca953x_chip *chip = gpiochip_get_data(gc); 549 DECLARE_BITMAP(reg_val, MAX_LINE); 550 int ret; 551 552 mutex_lock(&chip->i2c_lock); 553 ret = pca953x_read_regs(chip, chip->regs->input, reg_val); 554 mutex_unlock(&chip->i2c_lock); 555 if (ret) 556 return ret; 557 558 bitmap_replace(bits, bits, reg_val, mask, gc->ngpio); 559 return 0; 560 } 561 562 static void pca953x_gpio_set_multiple(struct gpio_chip *gc, 563 unsigned long *mask, unsigned long *bits) 564 { 565 struct pca953x_chip *chip = gpiochip_get_data(gc); 566 DECLARE_BITMAP(reg_val, MAX_LINE); 567 int ret; 568 569 mutex_lock(&chip->i2c_lock); 570 ret = pca953x_read_regs(chip, chip->regs->output, reg_val); 571 if (ret) 572 goto exit; 573 574 bitmap_replace(reg_val, reg_val, bits, mask, gc->ngpio); 575 576 pca953x_write_regs(chip, chip->regs->output, reg_val); 577 exit: 578 mutex_unlock(&chip->i2c_lock); 579 } 580 581 static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip, 582 unsigned int offset, 583 unsigned long config) 584 { 585 u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset); 586 u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset); 587 u8 bit = BIT(offset % BANK_SZ); 588 int ret; 589 590 /* 591 * pull-up/pull-down configuration requires PCAL extended 592 * registers 593 */ 594 if (!(chip->driver_data & PCA_PCAL)) 595 return -ENOTSUPP; 596 597 mutex_lock(&chip->i2c_lock); 598 599 /* Disable pull-up/pull-down */ 600 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0); 601 if (ret) 602 goto exit; 603 604 /* Configure pull-up/pull-down */ 605 if (config == PIN_CONFIG_BIAS_PULL_UP) 606 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit); 607 else if (config == PIN_CONFIG_BIAS_PULL_DOWN) 608 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0); 609 if (ret) 610 goto exit; 611 612 /* Enable pull-up/pull-down */ 613 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit); 614 615 exit: 616 mutex_unlock(&chip->i2c_lock); 617 return ret; 618 } 619 620 static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset, 621 unsigned long config) 622 { 623 struct pca953x_chip *chip = gpiochip_get_data(gc); 624 625 switch (pinconf_to_config_param(config)) { 626 case PIN_CONFIG_BIAS_PULL_UP: 627 case PIN_CONFIG_BIAS_PULL_DOWN: 628 return pca953x_gpio_set_pull_up_down(chip, offset, config); 629 default: 630 return -ENOTSUPP; 631 } 632 } 633 634 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) 635 { 636 struct gpio_chip *gc; 637 638 gc = &chip->gpio_chip; 639 640 gc->direction_input = pca953x_gpio_direction_input; 641 gc->direction_output = pca953x_gpio_direction_output; 642 gc->get = pca953x_gpio_get_value; 643 gc->set = pca953x_gpio_set_value; 644 gc->get_direction = pca953x_gpio_get_direction; 645 gc->get_multiple = pca953x_gpio_get_multiple; 646 gc->set_multiple = pca953x_gpio_set_multiple; 647 gc->set_config = pca953x_gpio_set_config; 648 gc->can_sleep = true; 649 650 gc->base = chip->gpio_start; 651 gc->ngpio = gpios; 652 gc->label = dev_name(&chip->client->dev); 653 gc->parent = &chip->client->dev; 654 gc->owner = THIS_MODULE; 655 gc->names = chip->names; 656 } 657 658 #ifdef CONFIG_GPIO_PCA953X_IRQ 659 static void pca953x_irq_mask(struct irq_data *d) 660 { 661 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 662 struct pca953x_chip *chip = gpiochip_get_data(gc); 663 irq_hw_number_t hwirq = irqd_to_hwirq(d); 664 665 clear_bit(hwirq, chip->irq_mask); 666 } 667 668 static void pca953x_irq_unmask(struct irq_data *d) 669 { 670 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 671 struct pca953x_chip *chip = gpiochip_get_data(gc); 672 irq_hw_number_t hwirq = irqd_to_hwirq(d); 673 674 set_bit(hwirq, chip->irq_mask); 675 } 676 677 static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on) 678 { 679 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 680 struct pca953x_chip *chip = gpiochip_get_data(gc); 681 682 if (on) 683 atomic_inc(&chip->wakeup_path); 684 else 685 atomic_dec(&chip->wakeup_path); 686 687 return irq_set_irq_wake(chip->client->irq, on); 688 } 689 690 static void pca953x_irq_bus_lock(struct irq_data *d) 691 { 692 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 693 struct pca953x_chip *chip = gpiochip_get_data(gc); 694 695 mutex_lock(&chip->irq_lock); 696 } 697 698 static void pca953x_irq_bus_sync_unlock(struct irq_data *d) 699 { 700 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 701 struct pca953x_chip *chip = gpiochip_get_data(gc); 702 DECLARE_BITMAP(irq_mask, MAX_LINE); 703 DECLARE_BITMAP(reg_direction, MAX_LINE); 704 int level; 705 706 if (chip->driver_data & PCA_PCAL) { 707 /* Enable latch on interrupt-enabled inputs */ 708 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask); 709 710 bitmap_complement(irq_mask, chip->irq_mask, gc->ngpio); 711 712 /* Unmask enabled interrupts */ 713 pca953x_write_regs(chip, PCAL953X_INT_MASK, irq_mask); 714 } 715 716 /* Switch direction to input if needed */ 717 pca953x_read_regs(chip, chip->regs->direction, reg_direction); 718 719 bitmap_or(irq_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio); 720 bitmap_complement(reg_direction, reg_direction, gc->ngpio); 721 bitmap_and(irq_mask, irq_mask, reg_direction, gc->ngpio); 722 723 /* Look for any newly setup interrupt */ 724 for_each_set_bit(level, irq_mask, gc->ngpio) 725 pca953x_gpio_direction_input(&chip->gpio_chip, level); 726 727 mutex_unlock(&chip->irq_lock); 728 } 729 730 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type) 731 { 732 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 733 struct pca953x_chip *chip = gpiochip_get_data(gc); 734 irq_hw_number_t hwirq = irqd_to_hwirq(d); 735 736 if (!(type & IRQ_TYPE_EDGE_BOTH)) { 737 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", 738 d->irq, type); 739 return -EINVAL; 740 } 741 742 assign_bit(hwirq, chip->irq_trig_fall, type & IRQ_TYPE_EDGE_FALLING); 743 assign_bit(hwirq, chip->irq_trig_raise, type & IRQ_TYPE_EDGE_RISING); 744 745 return 0; 746 } 747 748 static void pca953x_irq_shutdown(struct irq_data *d) 749 { 750 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 751 struct pca953x_chip *chip = gpiochip_get_data(gc); 752 irq_hw_number_t hwirq = irqd_to_hwirq(d); 753 754 clear_bit(hwirq, chip->irq_trig_raise); 755 clear_bit(hwirq, chip->irq_trig_fall); 756 } 757 758 static bool pca953x_irq_pending(struct pca953x_chip *chip, unsigned long *pending) 759 { 760 struct gpio_chip *gc = &chip->gpio_chip; 761 DECLARE_BITMAP(reg_direction, MAX_LINE); 762 DECLARE_BITMAP(old_stat, MAX_LINE); 763 DECLARE_BITMAP(cur_stat, MAX_LINE); 764 DECLARE_BITMAP(new_stat, MAX_LINE); 765 DECLARE_BITMAP(trigger, MAX_LINE); 766 int ret; 767 768 if (chip->driver_data & PCA_PCAL) { 769 /* Read the current interrupt status from the device */ 770 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger); 771 if (ret) 772 return false; 773 774 /* Check latched inputs and clear interrupt status */ 775 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat); 776 if (ret) 777 return false; 778 779 /* Apply filter for rising/falling edge selection */ 780 bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise, cur_stat, gc->ngpio); 781 782 bitmap_and(pending, new_stat, trigger, gc->ngpio); 783 784 return !bitmap_empty(pending, gc->ngpio); 785 } 786 787 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat); 788 if (ret) 789 return false; 790 791 /* Remove output pins from the equation */ 792 pca953x_read_regs(chip, chip->regs->direction, reg_direction); 793 794 bitmap_copy(old_stat, chip->irq_stat, gc->ngpio); 795 796 bitmap_and(new_stat, cur_stat, reg_direction, gc->ngpio); 797 bitmap_xor(cur_stat, new_stat, old_stat, gc->ngpio); 798 bitmap_and(trigger, cur_stat, chip->irq_mask, gc->ngpio); 799 800 if (bitmap_empty(trigger, gc->ngpio)) 801 return false; 802 803 bitmap_copy(chip->irq_stat, new_stat, gc->ngpio); 804 805 bitmap_and(cur_stat, chip->irq_trig_fall, old_stat, gc->ngpio); 806 bitmap_and(old_stat, chip->irq_trig_raise, new_stat, gc->ngpio); 807 bitmap_or(new_stat, old_stat, cur_stat, gc->ngpio); 808 bitmap_and(pending, new_stat, trigger, gc->ngpio); 809 810 return !bitmap_empty(pending, gc->ngpio); 811 } 812 813 static irqreturn_t pca953x_irq_handler(int irq, void *devid) 814 { 815 struct pca953x_chip *chip = devid; 816 struct gpio_chip *gc = &chip->gpio_chip; 817 DECLARE_BITMAP(pending, MAX_LINE); 818 int level; 819 bool ret; 820 821 bitmap_zero(pending, MAX_LINE); 822 823 mutex_lock(&chip->i2c_lock); 824 ret = pca953x_irq_pending(chip, pending); 825 mutex_unlock(&chip->i2c_lock); 826 827 if (ret) { 828 ret = 0; 829 830 for_each_set_bit(level, pending, gc->ngpio) { 831 int nested_irq = irq_find_mapping(gc->irq.domain, level); 832 833 if (unlikely(nested_irq <= 0)) { 834 dev_warn_ratelimited(gc->parent, "unmapped interrupt %d\n", level); 835 continue; 836 } 837 838 handle_nested_irq(nested_irq); 839 ret = 1; 840 } 841 } 842 843 return IRQ_RETVAL(ret); 844 } 845 846 static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base) 847 { 848 struct i2c_client *client = chip->client; 849 struct irq_chip *irq_chip = &chip->irq_chip; 850 DECLARE_BITMAP(reg_direction, MAX_LINE); 851 DECLARE_BITMAP(irq_stat, MAX_LINE); 852 struct gpio_irq_chip *girq; 853 int ret; 854 855 if (dmi_first_match(pca953x_dmi_acpi_irq_info)) { 856 ret = pca953x_acpi_get_irq(&client->dev); 857 if (ret > 0) 858 client->irq = ret; 859 } 860 861 if (!client->irq) 862 return 0; 863 864 if (irq_base == -1) 865 return 0; 866 867 if (!(chip->driver_data & PCA_INT)) 868 return 0; 869 870 ret = pca953x_read_regs(chip, chip->regs->input, irq_stat); 871 if (ret) 872 return ret; 873 874 /* 875 * There is no way to know which GPIO line generated the 876 * interrupt. We have to rely on the previous read for 877 * this purpose. 878 */ 879 pca953x_read_regs(chip, chip->regs->direction, reg_direction); 880 bitmap_and(chip->irq_stat, irq_stat, reg_direction, chip->gpio_chip.ngpio); 881 mutex_init(&chip->irq_lock); 882 883 irq_chip->name = dev_name(&client->dev); 884 irq_chip->irq_mask = pca953x_irq_mask; 885 irq_chip->irq_unmask = pca953x_irq_unmask; 886 irq_chip->irq_set_wake = pca953x_irq_set_wake; 887 irq_chip->irq_bus_lock = pca953x_irq_bus_lock; 888 irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock; 889 irq_chip->irq_set_type = pca953x_irq_set_type; 890 irq_chip->irq_shutdown = pca953x_irq_shutdown; 891 892 girq = &chip->gpio_chip.irq; 893 girq->chip = irq_chip; 894 /* This will let us handle the parent IRQ in the driver */ 895 girq->parent_handler = NULL; 896 girq->num_parents = 0; 897 girq->parents = NULL; 898 girq->default_type = IRQ_TYPE_NONE; 899 girq->handler = handle_simple_irq; 900 girq->threaded = true; 901 girq->first = irq_base; /* FIXME: get rid of this */ 902 903 ret = devm_request_threaded_irq(&client->dev, client->irq, 904 NULL, pca953x_irq_handler, 905 IRQF_ONESHOT | IRQF_SHARED, 906 dev_name(&client->dev), chip); 907 if (ret) { 908 dev_err(&client->dev, "failed to request irq %d\n", 909 client->irq); 910 return ret; 911 } 912 913 return 0; 914 } 915 916 #else /* CONFIG_GPIO_PCA953X_IRQ */ 917 static int pca953x_irq_setup(struct pca953x_chip *chip, 918 int irq_base) 919 { 920 struct i2c_client *client = chip->client; 921 922 if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT)) 923 dev_warn(&client->dev, "interrupt support not compiled in\n"); 924 925 return 0; 926 } 927 #endif 928 929 static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert) 930 { 931 DECLARE_BITMAP(val, MAX_LINE); 932 int ret; 933 934 ret = regcache_sync_region(chip->regmap, chip->regs->output, 935 chip->regs->output + NBANK(chip)); 936 if (ret) 937 goto out; 938 939 ret = regcache_sync_region(chip->regmap, chip->regs->direction, 940 chip->regs->direction + NBANK(chip)); 941 if (ret) 942 goto out; 943 944 /* set platform specific polarity inversion */ 945 if (invert) 946 bitmap_fill(val, MAX_LINE); 947 else 948 bitmap_zero(val, MAX_LINE); 949 950 ret = pca953x_write_regs(chip, chip->regs->invert, val); 951 out: 952 return ret; 953 } 954 955 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) 956 { 957 DECLARE_BITMAP(val, MAX_LINE); 958 unsigned int i; 959 int ret; 960 961 ret = device_pca95xx_init(chip, invert); 962 if (ret) 963 goto out; 964 965 /* To enable register 6, 7 to control pull up and pull down */ 966 for (i = 0; i < NBANK(chip); i++) 967 bitmap_set_value8(val, 0x02, i * BANK_SZ); 968 969 ret = pca953x_write_regs(chip, PCA957X_BKEN, val); 970 if (ret) 971 goto out; 972 973 return 0; 974 out: 975 return ret; 976 } 977 978 static int pca953x_probe(struct i2c_client *client, 979 const struct i2c_device_id *i2c_id) 980 { 981 struct pca953x_platform_data *pdata; 982 struct pca953x_chip *chip; 983 int irq_base = 0; 984 int ret; 985 u32 invert = 0; 986 struct regulator *reg; 987 const struct regmap_config *regmap_config; 988 989 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); 990 if (chip == NULL) 991 return -ENOMEM; 992 993 pdata = dev_get_platdata(&client->dev); 994 if (pdata) { 995 irq_base = pdata->irq_base; 996 chip->gpio_start = pdata->gpio_base; 997 invert = pdata->invert; 998 chip->names = pdata->names; 999 } else { 1000 struct gpio_desc *reset_gpio; 1001 1002 chip->gpio_start = -1; 1003 irq_base = 0; 1004 1005 /* 1006 * See if we need to de-assert a reset pin. 1007 * 1008 * There is no known ACPI-enabled platforms that are 1009 * using "reset" GPIO. Otherwise any of those platform 1010 * must use _DSD method with corresponding property. 1011 */ 1012 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset", 1013 GPIOD_OUT_LOW); 1014 if (IS_ERR(reset_gpio)) 1015 return PTR_ERR(reset_gpio); 1016 } 1017 1018 chip->client = client; 1019 1020 reg = devm_regulator_get(&client->dev, "vcc"); 1021 if (IS_ERR(reg)) { 1022 ret = PTR_ERR(reg); 1023 if (ret != -EPROBE_DEFER) 1024 dev_err(&client->dev, "reg get err: %d\n", ret); 1025 return ret; 1026 } 1027 ret = regulator_enable(reg); 1028 if (ret) { 1029 dev_err(&client->dev, "reg en err: %d\n", ret); 1030 return ret; 1031 } 1032 chip->regulator = reg; 1033 1034 if (i2c_id) { 1035 chip->driver_data = i2c_id->driver_data; 1036 } else { 1037 const void *match; 1038 1039 match = device_get_match_data(&client->dev); 1040 if (!match) { 1041 ret = -ENODEV; 1042 goto err_exit; 1043 } 1044 1045 chip->driver_data = (uintptr_t)match; 1046 } 1047 1048 i2c_set_clientdata(client, chip); 1049 1050 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK); 1051 1052 if (NBANK(chip) > 2 || PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) { 1053 dev_info(&client->dev, "using AI\n"); 1054 regmap_config = &pca953x_ai_i2c_regmap; 1055 } else { 1056 dev_info(&client->dev, "using no AI\n"); 1057 regmap_config = &pca953x_i2c_regmap; 1058 } 1059 1060 chip->regmap = devm_regmap_init_i2c(client, regmap_config); 1061 if (IS_ERR(chip->regmap)) { 1062 ret = PTR_ERR(chip->regmap); 1063 goto err_exit; 1064 } 1065 1066 regcache_mark_dirty(chip->regmap); 1067 1068 mutex_init(&chip->i2c_lock); 1069 /* 1070 * In case we have an i2c-mux controlled by a GPIO provided by an 1071 * expander using the same driver higher on the device tree, read the 1072 * i2c adapter nesting depth and use the retrieved value as lockdep 1073 * subclass for chip->i2c_lock. 1074 * 1075 * REVISIT: This solution is not complete. It protects us from lockdep 1076 * false positives when the expander controlling the i2c-mux is on 1077 * a different level on the device tree, but not when it's on the same 1078 * level on a different branch (in which case the subclass number 1079 * would be the same). 1080 * 1081 * TODO: Once a correct solution is developed, a similar fix should be 1082 * applied to all other i2c-controlled GPIO expanders (and potentially 1083 * regmap-i2c). 1084 */ 1085 lockdep_set_subclass(&chip->i2c_lock, 1086 i2c_adapter_depth(client->adapter)); 1087 1088 /* initialize cached registers from their original values. 1089 * we can't share this chip with another i2c master. 1090 */ 1091 1092 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { 1093 chip->regs = &pca953x_regs; 1094 ret = device_pca95xx_init(chip, invert); 1095 } else { 1096 chip->regs = &pca957x_regs; 1097 ret = device_pca957x_init(chip, invert); 1098 } 1099 if (ret) 1100 goto err_exit; 1101 1102 ret = pca953x_irq_setup(chip, irq_base); 1103 if (ret) 1104 goto err_exit; 1105 1106 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip); 1107 if (ret) 1108 goto err_exit; 1109 1110 if (pdata && pdata->setup) { 1111 ret = pdata->setup(client, chip->gpio_chip.base, 1112 chip->gpio_chip.ngpio, pdata->context); 1113 if (ret < 0) 1114 dev_warn(&client->dev, "setup failed, %d\n", ret); 1115 } 1116 1117 return 0; 1118 1119 err_exit: 1120 regulator_disable(chip->regulator); 1121 return ret; 1122 } 1123 1124 static int pca953x_remove(struct i2c_client *client) 1125 { 1126 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev); 1127 struct pca953x_chip *chip = i2c_get_clientdata(client); 1128 int ret; 1129 1130 if (pdata && pdata->teardown) { 1131 ret = pdata->teardown(client, chip->gpio_chip.base, 1132 chip->gpio_chip.ngpio, pdata->context); 1133 if (ret < 0) 1134 dev_err(&client->dev, "teardown failed, %d\n", ret); 1135 } else { 1136 ret = 0; 1137 } 1138 1139 regulator_disable(chip->regulator); 1140 1141 return ret; 1142 } 1143 1144 #ifdef CONFIG_PM_SLEEP 1145 static int pca953x_regcache_sync(struct device *dev) 1146 { 1147 struct pca953x_chip *chip = dev_get_drvdata(dev); 1148 int ret; 1149 1150 /* 1151 * The ordering between direction and output is important, 1152 * sync these registers first and only then sync the rest. 1153 */ 1154 ret = regcache_sync_region(chip->regmap, chip->regs->direction, 1155 chip->regs->direction + NBANK(chip)); 1156 if (ret) { 1157 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret); 1158 return ret; 1159 } 1160 1161 ret = regcache_sync_region(chip->regmap, chip->regs->output, 1162 chip->regs->output + NBANK(chip)); 1163 if (ret) { 1164 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret); 1165 return ret; 1166 } 1167 1168 #ifdef CONFIG_GPIO_PCA953X_IRQ 1169 if (chip->driver_data & PCA_PCAL) { 1170 ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH, 1171 PCAL953X_IN_LATCH + NBANK(chip)); 1172 if (ret) { 1173 dev_err(dev, "Failed to sync INT latch registers: %d\n", 1174 ret); 1175 return ret; 1176 } 1177 1178 ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK, 1179 PCAL953X_INT_MASK + NBANK(chip)); 1180 if (ret) { 1181 dev_err(dev, "Failed to sync INT mask registers: %d\n", 1182 ret); 1183 return ret; 1184 } 1185 } 1186 #endif 1187 1188 return 0; 1189 } 1190 1191 static int pca953x_suspend(struct device *dev) 1192 { 1193 struct pca953x_chip *chip = dev_get_drvdata(dev); 1194 1195 regcache_cache_only(chip->regmap, true); 1196 1197 if (atomic_read(&chip->wakeup_path)) 1198 device_set_wakeup_path(dev); 1199 else 1200 regulator_disable(chip->regulator); 1201 1202 return 0; 1203 } 1204 1205 static int pca953x_resume(struct device *dev) 1206 { 1207 struct pca953x_chip *chip = dev_get_drvdata(dev); 1208 int ret; 1209 1210 if (!atomic_read(&chip->wakeup_path)) { 1211 ret = regulator_enable(chip->regulator); 1212 if (ret) { 1213 dev_err(dev, "Failed to enable regulator: %d\n", ret); 1214 return 0; 1215 } 1216 } 1217 1218 regcache_cache_only(chip->regmap, false); 1219 regcache_mark_dirty(chip->regmap); 1220 ret = pca953x_regcache_sync(dev); 1221 if (ret) 1222 return ret; 1223 1224 ret = regcache_sync(chip->regmap); 1225 if (ret) { 1226 dev_err(dev, "Failed to restore register map: %d\n", ret); 1227 return ret; 1228 } 1229 1230 return 0; 1231 } 1232 #endif 1233 1234 /* convenience to stop overlong match-table lines */ 1235 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int) 1236 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int) 1237 1238 static const struct of_device_id pca953x_dt_ids[] = { 1239 { .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), }, 1240 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), }, 1241 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), }, 1242 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), }, 1243 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), }, 1244 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), }, 1245 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), }, 1246 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), }, 1247 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), }, 1248 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), }, 1249 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), }, 1250 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), }, 1251 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), }, 1252 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), }, 1253 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), }, 1254 1255 { .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), }, 1256 { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), }, 1257 { .compatible = "nxp,pcal9535", .data = OF_953X(16, PCA_LATCH_INT), }, 1258 { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), }, 1259 1260 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), }, 1261 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), }, 1262 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), }, 1263 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), }, 1264 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), }, 1265 1266 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), }, 1267 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), }, 1268 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), }, 1269 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), }, 1270 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), }, 1271 { .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), }, 1272 1273 { .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), }, 1274 { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), }, 1275 1276 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), }, 1277 { } 1278 }; 1279 1280 MODULE_DEVICE_TABLE(of, pca953x_dt_ids); 1281 1282 static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume); 1283 1284 static struct i2c_driver pca953x_driver = { 1285 .driver = { 1286 .name = "pca953x", 1287 .pm = &pca953x_pm_ops, 1288 .of_match_table = pca953x_dt_ids, 1289 .acpi_match_table = pca953x_acpi_ids, 1290 }, 1291 .probe = pca953x_probe, 1292 .remove = pca953x_remove, 1293 .id_table = pca953x_id, 1294 }; 1295 1296 static int __init pca953x_init(void) 1297 { 1298 return i2c_add_driver(&pca953x_driver); 1299 } 1300 /* register after i2c postcore initcall and before 1301 * subsys initcalls that may rely on these GPIOs 1302 */ 1303 subsys_initcall(pca953x_init); 1304 1305 static void __exit pca953x_exit(void) 1306 { 1307 i2c_del_driver(&pca953x_driver); 1308 } 1309 module_exit(pca953x_exit); 1310 1311 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>"); 1312 MODULE_DESCRIPTION("GPIO expander driver for PCA953x"); 1313 MODULE_LICENSE("GPL"); 1314