1 /* 2 * PCA953x 4/8/16/24/40 bit I/O ports 3 * 4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com> 5 * Copyright (C) 2007 Marvell International Ltd. 6 * 7 * Derived from drivers/i2c/chips/pca9539.c 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; version 2 of the License. 12 */ 13 14 #include <linux/module.h> 15 #include <linux/init.h> 16 #include <linux/gpio.h> 17 #include <linux/interrupt.h> 18 #include <linux/i2c.h> 19 #include <linux/platform_data/pca953x.h> 20 #include <linux/slab.h> 21 #include <linux/of_platform.h> 22 #include <linux/acpi.h> 23 24 #define PCA953X_INPUT 0 25 #define PCA953X_OUTPUT 1 26 #define PCA953X_INVERT 2 27 #define PCA953X_DIRECTION 3 28 29 #define REG_ADDR_AI 0x80 30 31 #define PCA957X_IN 0 32 #define PCA957X_INVRT 1 33 #define PCA957X_BKEN 2 34 #define PCA957X_PUPD 3 35 #define PCA957X_CFG 4 36 #define PCA957X_OUT 5 37 #define PCA957X_MSK 6 38 #define PCA957X_INTS 7 39 40 #define PCA_GPIO_MASK 0x00FF 41 #define PCA_INT 0x0100 42 #define PCA953X_TYPE 0x1000 43 #define PCA957X_TYPE 0x2000 44 #define PCA_TYPE_MASK 0xF000 45 46 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK) 47 48 static const struct i2c_device_id pca953x_id[] = { 49 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, }, 50 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, }, 51 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, }, 52 { "pca9536", 4 | PCA953X_TYPE, }, 53 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, }, 54 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, }, 55 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, }, 56 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, }, 57 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, }, 58 { "pca9556", 8 | PCA953X_TYPE, }, 59 { "pca9557", 8 | PCA953X_TYPE, }, 60 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, }, 61 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, }, 62 { "pca9698", 40 | PCA953X_TYPE, }, 63 64 { "max7310", 8 | PCA953X_TYPE, }, 65 { "max7312", 16 | PCA953X_TYPE | PCA_INT, }, 66 { "max7313", 16 | PCA953X_TYPE | PCA_INT, }, 67 { "max7315", 8 | PCA953X_TYPE | PCA_INT, }, 68 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, }, 69 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, }, 70 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, }, 71 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, }, 72 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, }, 73 { "xra1202", 8 | PCA953X_TYPE }, 74 { } 75 }; 76 MODULE_DEVICE_TABLE(i2c, pca953x_id); 77 78 static const struct acpi_device_id pca953x_acpi_ids[] = { 79 { "INT3491", 16 | PCA953X_TYPE | PCA_INT, }, 80 { } 81 }; 82 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids); 83 84 #define MAX_BANK 5 85 #define BANK_SZ 8 86 87 #define NBANK(chip) (chip->gpio_chip.ngpio / BANK_SZ) 88 89 struct pca953x_chip { 90 unsigned gpio_start; 91 u8 reg_output[MAX_BANK]; 92 u8 reg_direction[MAX_BANK]; 93 struct mutex i2c_lock; 94 95 #ifdef CONFIG_GPIO_PCA953X_IRQ 96 struct mutex irq_lock; 97 u8 irq_mask[MAX_BANK]; 98 u8 irq_stat[MAX_BANK]; 99 u8 irq_trig_raise[MAX_BANK]; 100 u8 irq_trig_fall[MAX_BANK]; 101 #endif 102 103 struct i2c_client *client; 104 struct gpio_chip gpio_chip; 105 const char *const *names; 106 int chip_type; 107 unsigned long driver_data; 108 }; 109 110 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, 111 int off) 112 { 113 int ret; 114 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 115 int offset = off / BANK_SZ; 116 117 ret = i2c_smbus_read_byte_data(chip->client, 118 (reg << bank_shift) + offset); 119 *val = ret; 120 121 if (ret < 0) { 122 dev_err(&chip->client->dev, "failed reading register\n"); 123 return ret; 124 } 125 126 return 0; 127 } 128 129 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, 130 int off) 131 { 132 int ret = 0; 133 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 134 int offset = off / BANK_SZ; 135 136 ret = i2c_smbus_write_byte_data(chip->client, 137 (reg << bank_shift) + offset, val); 138 139 if (ret < 0) { 140 dev_err(&chip->client->dev, "failed writing register\n"); 141 return ret; 142 } 143 144 return 0; 145 } 146 147 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) 148 { 149 int ret = 0; 150 151 if (chip->gpio_chip.ngpio <= 8) 152 ret = i2c_smbus_write_byte_data(chip->client, reg, *val); 153 else if (chip->gpio_chip.ngpio >= 24) { 154 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 155 ret = i2c_smbus_write_i2c_block_data(chip->client, 156 (reg << bank_shift) | REG_ADDR_AI, 157 NBANK(chip), val); 158 } else { 159 switch (chip->chip_type) { 160 case PCA953X_TYPE: 161 ret = i2c_smbus_write_word_data(chip->client, 162 reg << 1, (u16) *val); 163 break; 164 case PCA957X_TYPE: 165 ret = i2c_smbus_write_byte_data(chip->client, reg << 1, 166 val[0]); 167 if (ret < 0) 168 break; 169 ret = i2c_smbus_write_byte_data(chip->client, 170 (reg << 1) + 1, 171 val[1]); 172 break; 173 } 174 } 175 176 if (ret < 0) { 177 dev_err(&chip->client->dev, "failed writing register\n"); 178 return ret; 179 } 180 181 return 0; 182 } 183 184 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) 185 { 186 int ret; 187 188 if (chip->gpio_chip.ngpio <= 8) { 189 ret = i2c_smbus_read_byte_data(chip->client, reg); 190 *val = ret; 191 } else if (chip->gpio_chip.ngpio >= 24) { 192 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 193 194 ret = i2c_smbus_read_i2c_block_data(chip->client, 195 (reg << bank_shift) | REG_ADDR_AI, 196 NBANK(chip), val); 197 } else { 198 ret = i2c_smbus_read_word_data(chip->client, reg << 1); 199 val[0] = (u16)ret & 0xFF; 200 val[1] = (u16)ret >> 8; 201 } 202 if (ret < 0) { 203 dev_err(&chip->client->dev, "failed reading register\n"); 204 return ret; 205 } 206 207 return 0; 208 } 209 210 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) 211 { 212 struct pca953x_chip *chip = gpiochip_get_data(gc); 213 u8 reg_val; 214 int ret, offset = 0; 215 216 mutex_lock(&chip->i2c_lock); 217 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ)); 218 219 switch (chip->chip_type) { 220 case PCA953X_TYPE: 221 offset = PCA953X_DIRECTION; 222 break; 223 case PCA957X_TYPE: 224 offset = PCA957X_CFG; 225 break; 226 } 227 ret = pca953x_write_single(chip, offset, reg_val, off); 228 if (ret) 229 goto exit; 230 231 chip->reg_direction[off / BANK_SZ] = reg_val; 232 ret = 0; 233 exit: 234 mutex_unlock(&chip->i2c_lock); 235 return ret; 236 } 237 238 static int pca953x_gpio_direction_output(struct gpio_chip *gc, 239 unsigned off, int val) 240 { 241 struct pca953x_chip *chip = gpiochip_get_data(gc); 242 u8 reg_val; 243 int ret, offset = 0; 244 245 mutex_lock(&chip->i2c_lock); 246 /* set output level */ 247 if (val) 248 reg_val = chip->reg_output[off / BANK_SZ] 249 | (1u << (off % BANK_SZ)); 250 else 251 reg_val = chip->reg_output[off / BANK_SZ] 252 & ~(1u << (off % BANK_SZ)); 253 254 switch (chip->chip_type) { 255 case PCA953X_TYPE: 256 offset = PCA953X_OUTPUT; 257 break; 258 case PCA957X_TYPE: 259 offset = PCA957X_OUT; 260 break; 261 } 262 ret = pca953x_write_single(chip, offset, reg_val, off); 263 if (ret) 264 goto exit; 265 266 chip->reg_output[off / BANK_SZ] = reg_val; 267 268 /* then direction */ 269 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ)); 270 switch (chip->chip_type) { 271 case PCA953X_TYPE: 272 offset = PCA953X_DIRECTION; 273 break; 274 case PCA957X_TYPE: 275 offset = PCA957X_CFG; 276 break; 277 } 278 ret = pca953x_write_single(chip, offset, reg_val, off); 279 if (ret) 280 goto exit; 281 282 chip->reg_direction[off / BANK_SZ] = reg_val; 283 ret = 0; 284 exit: 285 mutex_unlock(&chip->i2c_lock); 286 return ret; 287 } 288 289 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) 290 { 291 struct pca953x_chip *chip = gpiochip_get_data(gc); 292 u32 reg_val; 293 int ret, offset = 0; 294 295 mutex_lock(&chip->i2c_lock); 296 switch (chip->chip_type) { 297 case PCA953X_TYPE: 298 offset = PCA953X_INPUT; 299 break; 300 case PCA957X_TYPE: 301 offset = PCA957X_IN; 302 break; 303 } 304 ret = pca953x_read_single(chip, offset, ®_val, off); 305 mutex_unlock(&chip->i2c_lock); 306 if (ret < 0) { 307 /* NOTE: diagnostic already emitted; that's all we should 308 * do unless gpio_*_value_cansleep() calls become different 309 * from their nonsleeping siblings (and report faults). 310 */ 311 return 0; 312 } 313 314 return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0; 315 } 316 317 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) 318 { 319 struct pca953x_chip *chip = gpiochip_get_data(gc); 320 u8 reg_val; 321 int ret, offset = 0; 322 323 mutex_lock(&chip->i2c_lock); 324 if (val) 325 reg_val = chip->reg_output[off / BANK_SZ] 326 | (1u << (off % BANK_SZ)); 327 else 328 reg_val = chip->reg_output[off / BANK_SZ] 329 & ~(1u << (off % BANK_SZ)); 330 331 switch (chip->chip_type) { 332 case PCA953X_TYPE: 333 offset = PCA953X_OUTPUT; 334 break; 335 case PCA957X_TYPE: 336 offset = PCA957X_OUT; 337 break; 338 } 339 ret = pca953x_write_single(chip, offset, reg_val, off); 340 if (ret) 341 goto exit; 342 343 chip->reg_output[off / BANK_SZ] = reg_val; 344 exit: 345 mutex_unlock(&chip->i2c_lock); 346 } 347 348 349 static void pca953x_gpio_set_multiple(struct gpio_chip *gc, 350 unsigned long *mask, unsigned long *bits) 351 { 352 struct pca953x_chip *chip = gpiochip_get_data(gc); 353 u8 reg_val[MAX_BANK]; 354 int ret, offset = 0; 355 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 356 int bank; 357 358 switch (chip->chip_type) { 359 case PCA953X_TYPE: 360 offset = PCA953X_OUTPUT; 361 break; 362 case PCA957X_TYPE: 363 offset = PCA957X_OUT; 364 break; 365 } 366 367 memcpy(reg_val, chip->reg_output, NBANK(chip)); 368 mutex_lock(&chip->i2c_lock); 369 for(bank=0; bank<NBANK(chip); bank++) { 370 unsigned bankmask = mask[bank/4] >> ((bank % 4) * 8); 371 if(bankmask) { 372 unsigned bankval = bits[bank/4] >> ((bank % 4) * 8); 373 reg_val[bank] = (reg_val[bank] & ~bankmask) | bankval; 374 } 375 } 376 ret = i2c_smbus_write_i2c_block_data(chip->client, offset << bank_shift, NBANK(chip), reg_val); 377 if (ret) 378 goto exit; 379 380 memcpy(chip->reg_output, reg_val, NBANK(chip)); 381 exit: 382 mutex_unlock(&chip->i2c_lock); 383 } 384 385 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) 386 { 387 struct gpio_chip *gc; 388 389 gc = &chip->gpio_chip; 390 391 gc->direction_input = pca953x_gpio_direction_input; 392 gc->direction_output = pca953x_gpio_direction_output; 393 gc->get = pca953x_gpio_get_value; 394 gc->set = pca953x_gpio_set_value; 395 gc->set_multiple = pca953x_gpio_set_multiple; 396 gc->can_sleep = true; 397 398 gc->base = chip->gpio_start; 399 gc->ngpio = gpios; 400 gc->label = chip->client->name; 401 gc->parent = &chip->client->dev; 402 gc->owner = THIS_MODULE; 403 gc->names = chip->names; 404 } 405 406 #ifdef CONFIG_GPIO_PCA953X_IRQ 407 static void pca953x_irq_mask(struct irq_data *d) 408 { 409 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 410 struct pca953x_chip *chip = gpiochip_get_data(gc); 411 412 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ)); 413 } 414 415 static void pca953x_irq_unmask(struct irq_data *d) 416 { 417 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 418 struct pca953x_chip *chip = gpiochip_get_data(gc); 419 420 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ); 421 } 422 423 static void pca953x_irq_bus_lock(struct irq_data *d) 424 { 425 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 426 struct pca953x_chip *chip = gpiochip_get_data(gc); 427 428 mutex_lock(&chip->irq_lock); 429 } 430 431 static void pca953x_irq_bus_sync_unlock(struct irq_data *d) 432 { 433 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 434 struct pca953x_chip *chip = gpiochip_get_data(gc); 435 u8 new_irqs; 436 int level, i; 437 438 /* Look for any newly setup interrupt */ 439 for (i = 0; i < NBANK(chip); i++) { 440 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i]; 441 new_irqs &= ~chip->reg_direction[i]; 442 443 while (new_irqs) { 444 level = __ffs(new_irqs); 445 pca953x_gpio_direction_input(&chip->gpio_chip, 446 level + (BANK_SZ * i)); 447 new_irqs &= ~(1 << level); 448 } 449 } 450 451 mutex_unlock(&chip->irq_lock); 452 } 453 454 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type) 455 { 456 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 457 struct pca953x_chip *chip = gpiochip_get_data(gc); 458 int bank_nb = d->hwirq / BANK_SZ; 459 u8 mask = 1 << (d->hwirq % BANK_SZ); 460 461 if (!(type & IRQ_TYPE_EDGE_BOTH)) { 462 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", 463 d->irq, type); 464 return -EINVAL; 465 } 466 467 if (type & IRQ_TYPE_EDGE_FALLING) 468 chip->irq_trig_fall[bank_nb] |= mask; 469 else 470 chip->irq_trig_fall[bank_nb] &= ~mask; 471 472 if (type & IRQ_TYPE_EDGE_RISING) 473 chip->irq_trig_raise[bank_nb] |= mask; 474 else 475 chip->irq_trig_raise[bank_nb] &= ~mask; 476 477 return 0; 478 } 479 480 static struct irq_chip pca953x_irq_chip = { 481 .name = "pca953x", 482 .irq_mask = pca953x_irq_mask, 483 .irq_unmask = pca953x_irq_unmask, 484 .irq_bus_lock = pca953x_irq_bus_lock, 485 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock, 486 .irq_set_type = pca953x_irq_set_type, 487 }; 488 489 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) 490 { 491 u8 cur_stat[MAX_BANK]; 492 u8 old_stat[MAX_BANK]; 493 bool pending_seen = false; 494 bool trigger_seen = false; 495 u8 trigger[MAX_BANK]; 496 int ret, i, offset = 0; 497 498 switch (chip->chip_type) { 499 case PCA953X_TYPE: 500 offset = PCA953X_INPUT; 501 break; 502 case PCA957X_TYPE: 503 offset = PCA957X_IN; 504 break; 505 } 506 ret = pca953x_read_regs(chip, offset, cur_stat); 507 if (ret) 508 return false; 509 510 /* Remove output pins from the equation */ 511 for (i = 0; i < NBANK(chip); i++) 512 cur_stat[i] &= chip->reg_direction[i]; 513 514 memcpy(old_stat, chip->irq_stat, NBANK(chip)); 515 516 for (i = 0; i < NBANK(chip); i++) { 517 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i]; 518 if (trigger[i]) 519 trigger_seen = true; 520 } 521 522 if (!trigger_seen) 523 return false; 524 525 memcpy(chip->irq_stat, cur_stat, NBANK(chip)); 526 527 for (i = 0; i < NBANK(chip); i++) { 528 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) | 529 (cur_stat[i] & chip->irq_trig_raise[i]); 530 pending[i] &= trigger[i]; 531 if (pending[i]) 532 pending_seen = true; 533 } 534 535 return pending_seen; 536 } 537 538 static irqreturn_t pca953x_irq_handler(int irq, void *devid) 539 { 540 struct pca953x_chip *chip = devid; 541 u8 pending[MAX_BANK]; 542 u8 level; 543 unsigned nhandled = 0; 544 int i; 545 546 if (!pca953x_irq_pending(chip, pending)) 547 return IRQ_NONE; 548 549 for (i = 0; i < NBANK(chip); i++) { 550 while (pending[i]) { 551 level = __ffs(pending[i]); 552 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain, 553 level + (BANK_SZ * i))); 554 pending[i] &= ~(1 << level); 555 nhandled++; 556 } 557 } 558 559 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE; 560 } 561 562 static int pca953x_irq_setup(struct pca953x_chip *chip, 563 int irq_base) 564 { 565 struct i2c_client *client = chip->client; 566 int ret, i, offset = 0; 567 568 if (client->irq && irq_base != -1 569 && (chip->driver_data & PCA_INT)) { 570 571 switch (chip->chip_type) { 572 case PCA953X_TYPE: 573 offset = PCA953X_INPUT; 574 break; 575 case PCA957X_TYPE: 576 offset = PCA957X_IN; 577 break; 578 } 579 ret = pca953x_read_regs(chip, offset, chip->irq_stat); 580 if (ret) 581 return ret; 582 583 /* 584 * There is no way to know which GPIO line generated the 585 * interrupt. We have to rely on the previous read for 586 * this purpose. 587 */ 588 for (i = 0; i < NBANK(chip); i++) 589 chip->irq_stat[i] &= chip->reg_direction[i]; 590 mutex_init(&chip->irq_lock); 591 592 ret = devm_request_threaded_irq(&client->dev, 593 client->irq, 594 NULL, 595 pca953x_irq_handler, 596 IRQF_TRIGGER_LOW | IRQF_ONESHOT | 597 IRQF_SHARED, 598 dev_name(&client->dev), chip); 599 if (ret) { 600 dev_err(&client->dev, "failed to request irq %d\n", 601 client->irq); 602 return ret; 603 } 604 605 ret = gpiochip_irqchip_add(&chip->gpio_chip, 606 &pca953x_irq_chip, 607 irq_base, 608 handle_simple_irq, 609 IRQ_TYPE_NONE); 610 if (ret) { 611 dev_err(&client->dev, 612 "could not connect irqchip to gpiochip\n"); 613 return ret; 614 } 615 616 gpiochip_set_chained_irqchip(&chip->gpio_chip, 617 &pca953x_irq_chip, 618 client->irq, NULL); 619 } 620 621 return 0; 622 } 623 624 #else /* CONFIG_GPIO_PCA953X_IRQ */ 625 static int pca953x_irq_setup(struct pca953x_chip *chip, 626 int irq_base) 627 { 628 struct i2c_client *client = chip->client; 629 630 if (irq_base != -1 && (chip->driver_data & PCA_INT)) 631 dev_warn(&client->dev, "interrupt support not compiled in\n"); 632 633 return 0; 634 } 635 #endif 636 637 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) 638 { 639 int ret; 640 u8 val[MAX_BANK]; 641 642 ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output); 643 if (ret) 644 goto out; 645 646 ret = pca953x_read_regs(chip, PCA953X_DIRECTION, 647 chip->reg_direction); 648 if (ret) 649 goto out; 650 651 /* set platform specific polarity inversion */ 652 if (invert) 653 memset(val, 0xFF, NBANK(chip)); 654 else 655 memset(val, 0, NBANK(chip)); 656 657 ret = pca953x_write_regs(chip, PCA953X_INVERT, val); 658 out: 659 return ret; 660 } 661 662 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) 663 { 664 int ret; 665 u8 val[MAX_BANK]; 666 667 ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output); 668 if (ret) 669 goto out; 670 ret = pca953x_read_regs(chip, PCA957X_CFG, chip->reg_direction); 671 if (ret) 672 goto out; 673 674 /* set platform specific polarity inversion */ 675 if (invert) 676 memset(val, 0xFF, NBANK(chip)); 677 else 678 memset(val, 0, NBANK(chip)); 679 ret = pca953x_write_regs(chip, PCA957X_INVRT, val); 680 if (ret) 681 goto out; 682 683 /* To enable register 6, 7 to control pull up and pull down */ 684 memset(val, 0x02, NBANK(chip)); 685 ret = pca953x_write_regs(chip, PCA957X_BKEN, val); 686 if (ret) 687 goto out; 688 689 return 0; 690 out: 691 return ret; 692 } 693 694 static const struct of_device_id pca953x_dt_ids[]; 695 696 static int pca953x_probe(struct i2c_client *client, 697 const struct i2c_device_id *id) 698 { 699 struct pca953x_platform_data *pdata; 700 struct pca953x_chip *chip; 701 int irq_base = 0; 702 int ret; 703 u32 invert = 0; 704 705 chip = devm_kzalloc(&client->dev, 706 sizeof(struct pca953x_chip), GFP_KERNEL); 707 if (chip == NULL) 708 return -ENOMEM; 709 710 pdata = dev_get_platdata(&client->dev); 711 if (pdata) { 712 irq_base = pdata->irq_base; 713 chip->gpio_start = pdata->gpio_base; 714 invert = pdata->invert; 715 chip->names = pdata->names; 716 } else { 717 chip->gpio_start = -1; 718 irq_base = 0; 719 } 720 721 chip->client = client; 722 723 if (id) { 724 chip->driver_data = id->driver_data; 725 } else { 726 const struct acpi_device_id *id; 727 const struct of_device_id *match; 728 729 match = of_match_device(pca953x_dt_ids, &client->dev); 730 if (match) { 731 chip->driver_data = (int)(uintptr_t)match->data; 732 } else { 733 id = acpi_match_device(pca953x_acpi_ids, &client->dev); 734 if (!id) 735 return -ENODEV; 736 737 chip->driver_data = id->driver_data; 738 } 739 } 740 741 chip->chip_type = PCA_CHIP_TYPE(chip->driver_data); 742 743 mutex_init(&chip->i2c_lock); 744 745 /* initialize cached registers from their original values. 746 * we can't share this chip with another i2c master. 747 */ 748 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK); 749 750 if (chip->chip_type == PCA953X_TYPE) 751 ret = device_pca953x_init(chip, invert); 752 else 753 ret = device_pca957x_init(chip, invert); 754 if (ret) 755 return ret; 756 757 ret = gpiochip_add_data(&chip->gpio_chip, chip); 758 if (ret) 759 return ret; 760 761 ret = pca953x_irq_setup(chip, irq_base); 762 if (ret) 763 return ret; 764 765 if (pdata && pdata->setup) { 766 ret = pdata->setup(client, chip->gpio_chip.base, 767 chip->gpio_chip.ngpio, pdata->context); 768 if (ret < 0) 769 dev_warn(&client->dev, "setup failed, %d\n", ret); 770 } 771 772 i2c_set_clientdata(client, chip); 773 return 0; 774 } 775 776 static int pca953x_remove(struct i2c_client *client) 777 { 778 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev); 779 struct pca953x_chip *chip = i2c_get_clientdata(client); 780 int ret = 0; 781 782 if (pdata && pdata->teardown) { 783 ret = pdata->teardown(client, chip->gpio_chip.base, 784 chip->gpio_chip.ngpio, pdata->context); 785 if (ret < 0) { 786 dev_err(&client->dev, "%s failed, %d\n", 787 "teardown", ret); 788 return ret; 789 } 790 } 791 792 gpiochip_remove(&chip->gpio_chip); 793 794 return 0; 795 } 796 797 /* convenience to stop overlong match-table lines */ 798 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int) 799 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int) 800 801 static const struct of_device_id pca953x_dt_ids[] = { 802 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), }, 803 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), }, 804 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), }, 805 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), }, 806 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), }, 807 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), }, 808 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), }, 809 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), }, 810 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), }, 811 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), }, 812 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), }, 813 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), }, 814 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), }, 815 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), }, 816 817 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), }, 818 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), }, 819 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), }, 820 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), }, 821 822 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), }, 823 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), }, 824 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), }, 825 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), }, 826 827 { .compatible = "onsemi,pca9654", .data = OF_953X( 8, PCA_INT), }, 828 829 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), }, 830 { } 831 }; 832 833 MODULE_DEVICE_TABLE(of, pca953x_dt_ids); 834 835 static struct i2c_driver pca953x_driver = { 836 .driver = { 837 .name = "pca953x", 838 .of_match_table = pca953x_dt_ids, 839 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids), 840 }, 841 .probe = pca953x_probe, 842 .remove = pca953x_remove, 843 .id_table = pca953x_id, 844 }; 845 846 static int __init pca953x_init(void) 847 { 848 return i2c_add_driver(&pca953x_driver); 849 } 850 /* register after i2c postcore initcall and before 851 * subsys initcalls that may rely on these GPIOs 852 */ 853 subsys_initcall(pca953x_init); 854 855 static void __exit pca953x_exit(void) 856 { 857 i2c_del_driver(&pca953x_driver); 858 } 859 module_exit(pca953x_exit); 860 861 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>"); 862 MODULE_DESCRIPTION("GPIO expander driver for PCA953x"); 863 MODULE_LICENSE("GPL"); 864