1 /* 2 * PCA953x 4/8/16 bit I/O ports 3 * 4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com> 5 * Copyright (C) 2007 Marvell International Ltd. 6 * 7 * Derived from drivers/i2c/chips/pca9539.c 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; version 2 of the License. 12 */ 13 14 #include <linux/module.h> 15 #include <linux/init.h> 16 #include <linux/gpio.h> 17 #include <linux/interrupt.h> 18 #include <linux/irq.h> 19 #include <linux/irqdomain.h> 20 #include <linux/i2c.h> 21 #include <linux/i2c/pca953x.h> 22 #include <linux/slab.h> 23 #ifdef CONFIG_OF_GPIO 24 #include <linux/of_platform.h> 25 #endif 26 27 #define PCA953X_INPUT 0 28 #define PCA953X_OUTPUT 1 29 #define PCA953X_INVERT 2 30 #define PCA953X_DIRECTION 3 31 32 #define REG_ADDR_AI 0x80 33 34 #define PCA957X_IN 0 35 #define PCA957X_INVRT 1 36 #define PCA957X_BKEN 2 37 #define PCA957X_PUPD 3 38 #define PCA957X_CFG 4 39 #define PCA957X_OUT 5 40 #define PCA957X_MSK 6 41 #define PCA957X_INTS 7 42 43 #define PCA_GPIO_MASK 0x00FF 44 #define PCA_INT 0x0100 45 #define PCA953X_TYPE 0x1000 46 #define PCA957X_TYPE 0x2000 47 48 static const struct i2c_device_id pca953x_id[] = { 49 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, }, 50 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, }, 51 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, }, 52 { "pca9536", 4 | PCA953X_TYPE, }, 53 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, }, 54 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, }, 55 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, }, 56 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, }, 57 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, }, 58 { "pca9556", 8 | PCA953X_TYPE, }, 59 { "pca9557", 8 | PCA953X_TYPE, }, 60 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, }, 61 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, }, 62 63 { "max7310", 8 | PCA953X_TYPE, }, 64 { "max7312", 16 | PCA953X_TYPE | PCA_INT, }, 65 { "max7313", 16 | PCA953X_TYPE | PCA_INT, }, 66 { "max7315", 8 | PCA953X_TYPE | PCA_INT, }, 67 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, }, 68 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, }, 69 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, }, 70 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, }, 71 { } 72 }; 73 MODULE_DEVICE_TABLE(i2c, pca953x_id); 74 75 #define MAX_BANK 5 76 #define BANK_SZ 8 77 78 #define NBANK(chip) (chip->gpio_chip.ngpio / BANK_SZ) 79 80 struct pca953x_chip { 81 unsigned gpio_start; 82 u8 reg_output[MAX_BANK]; 83 u8 reg_direction[MAX_BANK]; 84 struct mutex i2c_lock; 85 86 #ifdef CONFIG_GPIO_PCA953X_IRQ 87 struct mutex irq_lock; 88 u8 irq_mask[MAX_BANK]; 89 u8 irq_stat[MAX_BANK]; 90 u8 irq_trig_raise[MAX_BANK]; 91 u8 irq_trig_fall[MAX_BANK]; 92 struct irq_domain *domain; 93 #endif 94 95 struct i2c_client *client; 96 struct gpio_chip gpio_chip; 97 const char *const *names; 98 int chip_type; 99 }; 100 101 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, 102 int off) 103 { 104 int ret; 105 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 106 int offset = off / BANK_SZ; 107 108 ret = i2c_smbus_read_byte_data(chip->client, 109 (reg << bank_shift) + offset); 110 *val = ret; 111 112 if (ret < 0) { 113 dev_err(&chip->client->dev, "failed reading register\n"); 114 return ret; 115 } 116 117 return 0; 118 } 119 120 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, 121 int off) 122 { 123 int ret = 0; 124 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 125 int offset = off / BANK_SZ; 126 127 ret = i2c_smbus_write_byte_data(chip->client, 128 (reg << bank_shift) + offset, val); 129 130 if (ret < 0) { 131 dev_err(&chip->client->dev, "failed writing register\n"); 132 return ret; 133 } 134 135 return 0; 136 } 137 138 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) 139 { 140 int ret = 0; 141 142 if (chip->gpio_chip.ngpio <= 8) 143 ret = i2c_smbus_write_byte_data(chip->client, reg, *val); 144 else if (chip->gpio_chip.ngpio >= 24) { 145 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 146 ret = i2c_smbus_write_i2c_block_data(chip->client, 147 (reg << bank_shift) | REG_ADDR_AI, 148 NBANK(chip), val); 149 } 150 else { 151 switch (chip->chip_type) { 152 case PCA953X_TYPE: 153 ret = i2c_smbus_write_word_data(chip->client, 154 reg << 1, (u16) *val); 155 break; 156 case PCA957X_TYPE: 157 ret = i2c_smbus_write_byte_data(chip->client, reg << 1, 158 val[0]); 159 if (ret < 0) 160 break; 161 ret = i2c_smbus_write_byte_data(chip->client, 162 (reg << 1) + 1, 163 val[1]); 164 break; 165 } 166 } 167 168 if (ret < 0) { 169 dev_err(&chip->client->dev, "failed writing register\n"); 170 return ret; 171 } 172 173 return 0; 174 } 175 176 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) 177 { 178 int ret; 179 180 if (chip->gpio_chip.ngpio <= 8) { 181 ret = i2c_smbus_read_byte_data(chip->client, reg); 182 *val = ret; 183 } else if (chip->gpio_chip.ngpio >= 24) { 184 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 185 186 ret = i2c_smbus_read_i2c_block_data(chip->client, 187 (reg << bank_shift) | REG_ADDR_AI, 188 NBANK(chip), val); 189 } else { 190 ret = i2c_smbus_read_word_data(chip->client, reg << 1); 191 val[0] = (u16)ret & 0xFF; 192 val[1] = (u16)ret >> 8; 193 } 194 if (ret < 0) { 195 dev_err(&chip->client->dev, "failed reading register\n"); 196 return ret; 197 } 198 199 return 0; 200 } 201 202 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) 203 { 204 struct pca953x_chip *chip; 205 u8 reg_val; 206 int ret, offset = 0; 207 208 chip = container_of(gc, struct pca953x_chip, gpio_chip); 209 210 mutex_lock(&chip->i2c_lock); 211 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ)); 212 213 switch (chip->chip_type) { 214 case PCA953X_TYPE: 215 offset = PCA953X_DIRECTION; 216 break; 217 case PCA957X_TYPE: 218 offset = PCA957X_CFG; 219 break; 220 } 221 ret = pca953x_write_single(chip, offset, reg_val, off); 222 if (ret) 223 goto exit; 224 225 chip->reg_direction[off / BANK_SZ] = reg_val; 226 ret = 0; 227 exit: 228 mutex_unlock(&chip->i2c_lock); 229 return ret; 230 } 231 232 static int pca953x_gpio_direction_output(struct gpio_chip *gc, 233 unsigned off, int val) 234 { 235 struct pca953x_chip *chip; 236 u8 reg_val; 237 int ret, offset = 0; 238 239 chip = container_of(gc, struct pca953x_chip, gpio_chip); 240 241 mutex_lock(&chip->i2c_lock); 242 /* set output level */ 243 if (val) 244 reg_val = chip->reg_output[off / BANK_SZ] 245 | (1u << (off % BANK_SZ)); 246 else 247 reg_val = chip->reg_output[off / BANK_SZ] 248 & ~(1u << (off % BANK_SZ)); 249 250 switch (chip->chip_type) { 251 case PCA953X_TYPE: 252 offset = PCA953X_OUTPUT; 253 break; 254 case PCA957X_TYPE: 255 offset = PCA957X_OUT; 256 break; 257 } 258 ret = pca953x_write_single(chip, offset, reg_val, off); 259 if (ret) 260 goto exit; 261 262 chip->reg_output[off / BANK_SZ] = reg_val; 263 264 /* then direction */ 265 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ)); 266 switch (chip->chip_type) { 267 case PCA953X_TYPE: 268 offset = PCA953X_DIRECTION; 269 break; 270 case PCA957X_TYPE: 271 offset = PCA957X_CFG; 272 break; 273 } 274 ret = pca953x_write_single(chip, offset, reg_val, off); 275 if (ret) 276 goto exit; 277 278 chip->reg_direction[off / BANK_SZ] = reg_val; 279 ret = 0; 280 exit: 281 mutex_unlock(&chip->i2c_lock); 282 return ret; 283 } 284 285 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) 286 { 287 struct pca953x_chip *chip; 288 u32 reg_val; 289 int ret, offset = 0; 290 291 chip = container_of(gc, struct pca953x_chip, gpio_chip); 292 293 mutex_lock(&chip->i2c_lock); 294 switch (chip->chip_type) { 295 case PCA953X_TYPE: 296 offset = PCA953X_INPUT; 297 break; 298 case PCA957X_TYPE: 299 offset = PCA957X_IN; 300 break; 301 } 302 ret = pca953x_read_single(chip, offset, ®_val, off); 303 mutex_unlock(&chip->i2c_lock); 304 if (ret < 0) { 305 /* NOTE: diagnostic already emitted; that's all we should 306 * do unless gpio_*_value_cansleep() calls become different 307 * from their nonsleeping siblings (and report faults). 308 */ 309 return 0; 310 } 311 312 return (reg_val & (1u << off)) ? 1 : 0; 313 } 314 315 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) 316 { 317 struct pca953x_chip *chip; 318 u8 reg_val; 319 int ret, offset = 0; 320 321 chip = container_of(gc, struct pca953x_chip, gpio_chip); 322 323 mutex_lock(&chip->i2c_lock); 324 if (val) 325 reg_val = chip->reg_output[off / BANK_SZ] 326 | (1u << (off % BANK_SZ)); 327 else 328 reg_val = chip->reg_output[off / BANK_SZ] 329 & ~(1u << (off % BANK_SZ)); 330 331 switch (chip->chip_type) { 332 case PCA953X_TYPE: 333 offset = PCA953X_OUTPUT; 334 break; 335 case PCA957X_TYPE: 336 offset = PCA957X_OUT; 337 break; 338 } 339 ret = pca953x_write_single(chip, offset, reg_val, off); 340 if (ret) 341 goto exit; 342 343 chip->reg_output[off / BANK_SZ] = reg_val; 344 exit: 345 mutex_unlock(&chip->i2c_lock); 346 } 347 348 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) 349 { 350 struct gpio_chip *gc; 351 352 gc = &chip->gpio_chip; 353 354 gc->direction_input = pca953x_gpio_direction_input; 355 gc->direction_output = pca953x_gpio_direction_output; 356 gc->get = pca953x_gpio_get_value; 357 gc->set = pca953x_gpio_set_value; 358 gc->can_sleep = 1; 359 360 gc->base = chip->gpio_start; 361 gc->ngpio = gpios; 362 gc->label = chip->client->name; 363 gc->dev = &chip->client->dev; 364 gc->owner = THIS_MODULE; 365 gc->names = chip->names; 366 } 367 368 #ifdef CONFIG_GPIO_PCA953X_IRQ 369 static int pca953x_gpio_to_irq(struct gpio_chip *gc, unsigned off) 370 { 371 struct pca953x_chip *chip; 372 373 chip = container_of(gc, struct pca953x_chip, gpio_chip); 374 return irq_create_mapping(chip->domain, off); 375 } 376 377 static void pca953x_irq_mask(struct irq_data *d) 378 { 379 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); 380 381 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ)); 382 } 383 384 static void pca953x_irq_unmask(struct irq_data *d) 385 { 386 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); 387 388 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ); 389 } 390 391 static void pca953x_irq_bus_lock(struct irq_data *d) 392 { 393 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); 394 395 mutex_lock(&chip->irq_lock); 396 } 397 398 static void pca953x_irq_bus_sync_unlock(struct irq_data *d) 399 { 400 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); 401 u8 new_irqs; 402 int level, i; 403 404 /* Look for any newly setup interrupt */ 405 for (i = 0; i < NBANK(chip); i++) { 406 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i]; 407 new_irqs &= ~chip->reg_direction[i]; 408 409 while (new_irqs) { 410 level = __ffs(new_irqs); 411 pca953x_gpio_direction_input(&chip->gpio_chip, 412 level + (BANK_SZ * i)); 413 new_irqs &= ~(1 << level); 414 } 415 } 416 417 mutex_unlock(&chip->irq_lock); 418 } 419 420 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type) 421 { 422 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); 423 int bank_nb = d->hwirq / BANK_SZ; 424 u8 mask = 1 << (d->hwirq % BANK_SZ); 425 426 if (!(type & IRQ_TYPE_EDGE_BOTH)) { 427 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", 428 d->irq, type); 429 return -EINVAL; 430 } 431 432 if (type & IRQ_TYPE_EDGE_FALLING) 433 chip->irq_trig_fall[bank_nb] |= mask; 434 else 435 chip->irq_trig_fall[bank_nb] &= ~mask; 436 437 if (type & IRQ_TYPE_EDGE_RISING) 438 chip->irq_trig_raise[bank_nb] |= mask; 439 else 440 chip->irq_trig_raise[bank_nb] &= ~mask; 441 442 return 0; 443 } 444 445 static struct irq_chip pca953x_irq_chip = { 446 .name = "pca953x", 447 .irq_mask = pca953x_irq_mask, 448 .irq_unmask = pca953x_irq_unmask, 449 .irq_bus_lock = pca953x_irq_bus_lock, 450 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock, 451 .irq_set_type = pca953x_irq_set_type, 452 }; 453 454 static u8 pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) 455 { 456 u8 cur_stat[MAX_BANK]; 457 u8 old_stat[MAX_BANK]; 458 u8 pendings = 0; 459 u8 trigger[MAX_BANK], triggers = 0; 460 int ret, i, offset = 0; 461 462 switch (chip->chip_type) { 463 case PCA953X_TYPE: 464 offset = PCA953X_INPUT; 465 break; 466 case PCA957X_TYPE: 467 offset = PCA957X_IN; 468 break; 469 } 470 ret = pca953x_read_regs(chip, offset, cur_stat); 471 if (ret) 472 return 0; 473 474 /* Remove output pins from the equation */ 475 for (i = 0; i < NBANK(chip); i++) 476 cur_stat[i] &= chip->reg_direction[i]; 477 478 memcpy(old_stat, chip->irq_stat, NBANK(chip)); 479 480 for (i = 0; i < NBANK(chip); i++) { 481 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i]; 482 triggers += trigger[i]; 483 } 484 485 if (!triggers) 486 return 0; 487 488 memcpy(chip->irq_stat, cur_stat, NBANK(chip)); 489 490 for (i = 0; i < NBANK(chip); i++) { 491 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) | 492 (cur_stat[i] & chip->irq_trig_raise[i]); 493 pending[i] &= trigger[i]; 494 pendings += pending[i]; 495 } 496 497 return pendings; 498 } 499 500 static irqreturn_t pca953x_irq_handler(int irq, void *devid) 501 { 502 struct pca953x_chip *chip = devid; 503 u8 pending[MAX_BANK]; 504 u8 level; 505 int i; 506 507 if (!pca953x_irq_pending(chip, pending)) 508 return IRQ_HANDLED; 509 510 for (i = 0; i < NBANK(chip); i++) { 511 while (pending[i]) { 512 level = __ffs(pending[i]); 513 handle_nested_irq(irq_find_mapping(chip->domain, 514 level + (BANK_SZ * i))); 515 pending[i] &= ~(1 << level); 516 } 517 } 518 519 return IRQ_HANDLED; 520 } 521 522 static int pca953x_gpio_irq_map(struct irq_domain *d, unsigned int irq, 523 irq_hw_number_t hwirq) 524 { 525 irq_clear_status_flags(irq, IRQ_NOREQUEST); 526 irq_set_chip_data(irq, d->host_data); 527 irq_set_chip(irq, &pca953x_irq_chip); 528 irq_set_nested_thread(irq, true); 529 #ifdef CONFIG_ARM 530 set_irq_flags(irq, IRQF_VALID); 531 #else 532 irq_set_noprobe(irq); 533 #endif 534 535 return 0; 536 } 537 538 static const struct irq_domain_ops pca953x_irq_simple_ops = { 539 .map = pca953x_gpio_irq_map, 540 .xlate = irq_domain_xlate_twocell, 541 }; 542 543 static int pca953x_irq_setup(struct pca953x_chip *chip, 544 const struct i2c_device_id *id, 545 int irq_base) 546 { 547 struct i2c_client *client = chip->client; 548 int ret, i, offset = 0; 549 550 if (irq_base != -1 551 && (id->driver_data & PCA_INT)) { 552 553 switch (chip->chip_type) { 554 case PCA953X_TYPE: 555 offset = PCA953X_INPUT; 556 break; 557 case PCA957X_TYPE: 558 offset = PCA957X_IN; 559 break; 560 } 561 ret = pca953x_read_regs(chip, offset, chip->irq_stat); 562 if (ret) 563 return ret; 564 565 /* 566 * There is no way to know which GPIO line generated the 567 * interrupt. We have to rely on the previous read for 568 * this purpose. 569 */ 570 for (i = 0; i < NBANK(chip); i++) 571 chip->irq_stat[i] &= chip->reg_direction[i]; 572 mutex_init(&chip->irq_lock); 573 574 chip->domain = irq_domain_add_simple(client->dev.of_node, 575 chip->gpio_chip.ngpio, 576 irq_base, 577 &pca953x_irq_simple_ops, 578 NULL); 579 if (!chip->domain) 580 return -ENODEV; 581 582 ret = devm_request_threaded_irq(&client->dev, 583 client->irq, 584 NULL, 585 pca953x_irq_handler, 586 IRQF_TRIGGER_LOW | IRQF_ONESHOT, 587 dev_name(&client->dev), chip); 588 if (ret) { 589 dev_err(&client->dev, "failed to request irq %d\n", 590 client->irq); 591 return ret; 592 } 593 594 chip->gpio_chip.to_irq = pca953x_gpio_to_irq; 595 } 596 597 return 0; 598 } 599 600 #else /* CONFIG_GPIO_PCA953X_IRQ */ 601 static int pca953x_irq_setup(struct pca953x_chip *chip, 602 const struct i2c_device_id *id, 603 int irq_base) 604 { 605 struct i2c_client *client = chip->client; 606 607 if (irq_base != -1 && (id->driver_data & PCA_INT)) 608 dev_warn(&client->dev, "interrupt support not compiled in\n"); 609 610 return 0; 611 } 612 #endif 613 614 /* 615 * Handlers for alternative sources of platform_data 616 */ 617 #ifdef CONFIG_OF_GPIO 618 /* 619 * Translate OpenFirmware node properties into platform_data 620 * WARNING: This is DEPRECATED and will be removed eventually! 621 */ 622 static void 623 pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, u32 *invert) 624 { 625 struct device_node *node; 626 const __be32 *val; 627 int size; 628 629 node = client->dev.of_node; 630 if (node == NULL) 631 return; 632 633 *gpio_base = -1; 634 val = of_get_property(node, "linux,gpio-base", &size); 635 WARN(val, "%s: device-tree property 'linux,gpio-base' is deprecated!", __func__); 636 if (val) { 637 if (size != sizeof(*val)) 638 dev_warn(&client->dev, "%s: wrong linux,gpio-base\n", 639 node->full_name); 640 else 641 *gpio_base = be32_to_cpup(val); 642 } 643 644 val = of_get_property(node, "polarity", NULL); 645 WARN(val, "%s: device-tree property 'polarity' is deprecated!", __func__); 646 if (val) 647 *invert = *val; 648 } 649 #else 650 static void 651 pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, u32 *invert) 652 { 653 *gpio_base = -1; 654 } 655 #endif 656 657 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) 658 { 659 int ret; 660 u8 val[MAX_BANK]; 661 662 ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output); 663 if (ret) 664 goto out; 665 666 ret = pca953x_read_regs(chip, PCA953X_DIRECTION, 667 chip->reg_direction); 668 if (ret) 669 goto out; 670 671 /* set platform specific polarity inversion */ 672 if (invert) 673 memset(val, 0xFF, NBANK(chip)); 674 else 675 memset(val, 0, NBANK(chip)); 676 677 ret = pca953x_write_regs(chip, PCA953X_INVERT, val); 678 out: 679 return ret; 680 } 681 682 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) 683 { 684 int ret; 685 u8 val[MAX_BANK]; 686 687 /* Let every port in proper state, that could save power */ 688 memset(val, 0, NBANK(chip)); 689 pca953x_write_regs(chip, PCA957X_PUPD, val); 690 memset(val, 0xFF, NBANK(chip)); 691 pca953x_write_regs(chip, PCA957X_CFG, val); 692 memset(val, 0, NBANK(chip)); 693 pca953x_write_regs(chip, PCA957X_OUT, val); 694 695 ret = pca953x_read_regs(chip, PCA957X_IN, val); 696 if (ret) 697 goto out; 698 ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output); 699 if (ret) 700 goto out; 701 ret = pca953x_read_regs(chip, PCA957X_CFG, chip->reg_direction); 702 if (ret) 703 goto out; 704 705 /* set platform specific polarity inversion */ 706 if (invert) 707 memset(val, 0xFF, NBANK(chip)); 708 else 709 memset(val, 0, NBANK(chip)); 710 pca953x_write_regs(chip, PCA957X_INVRT, val); 711 712 /* To enable register 6, 7 to controll pull up and pull down */ 713 memset(val, 0x02, NBANK(chip)); 714 pca953x_write_regs(chip, PCA957X_BKEN, val); 715 716 return 0; 717 out: 718 return ret; 719 } 720 721 static int pca953x_probe(struct i2c_client *client, 722 const struct i2c_device_id *id) 723 { 724 struct pca953x_platform_data *pdata; 725 struct pca953x_chip *chip; 726 int irq_base = 0; 727 int ret; 728 u32 invert = 0; 729 730 chip = devm_kzalloc(&client->dev, 731 sizeof(struct pca953x_chip), GFP_KERNEL); 732 if (chip == NULL) 733 return -ENOMEM; 734 735 pdata = client->dev.platform_data; 736 if (pdata) { 737 irq_base = pdata->irq_base; 738 chip->gpio_start = pdata->gpio_base; 739 invert = pdata->invert; 740 chip->names = pdata->names; 741 } else { 742 pca953x_get_alt_pdata(client, &chip->gpio_start, &invert); 743 #ifdef CONFIG_OF_GPIO 744 /* If I2C node has no interrupts property, disable GPIO interrupts */ 745 if (of_find_property(client->dev.of_node, "interrupts", NULL) == NULL) 746 irq_base = -1; 747 #endif 748 } 749 750 chip->client = client; 751 752 chip->chip_type = id->driver_data & (PCA953X_TYPE | PCA957X_TYPE); 753 754 mutex_init(&chip->i2c_lock); 755 756 /* initialize cached registers from their original values. 757 * we can't share this chip with another i2c master. 758 */ 759 pca953x_setup_gpio(chip, id->driver_data & PCA_GPIO_MASK); 760 761 if (chip->chip_type == PCA953X_TYPE) 762 ret = device_pca953x_init(chip, invert); 763 else 764 ret = device_pca957x_init(chip, invert); 765 if (ret) 766 return ret; 767 768 ret = pca953x_irq_setup(chip, id, irq_base); 769 if (ret) 770 return ret; 771 772 ret = gpiochip_add(&chip->gpio_chip); 773 if (ret) 774 return ret; 775 776 if (pdata && pdata->setup) { 777 ret = pdata->setup(client, chip->gpio_chip.base, 778 chip->gpio_chip.ngpio, pdata->context); 779 if (ret < 0) 780 dev_warn(&client->dev, "setup failed, %d\n", ret); 781 } 782 783 i2c_set_clientdata(client, chip); 784 return 0; 785 } 786 787 static int pca953x_remove(struct i2c_client *client) 788 { 789 struct pca953x_platform_data *pdata = client->dev.platform_data; 790 struct pca953x_chip *chip = i2c_get_clientdata(client); 791 int ret = 0; 792 793 if (pdata && pdata->teardown) { 794 ret = pdata->teardown(client, chip->gpio_chip.base, 795 chip->gpio_chip.ngpio, pdata->context); 796 if (ret < 0) { 797 dev_err(&client->dev, "%s failed, %d\n", 798 "teardown", ret); 799 return ret; 800 } 801 } 802 803 ret = gpiochip_remove(&chip->gpio_chip); 804 if (ret) { 805 dev_err(&client->dev, "%s failed, %d\n", 806 "gpiochip_remove()", ret); 807 return ret; 808 } 809 810 return 0; 811 } 812 813 static const struct of_device_id pca953x_dt_ids[] = { 814 { .compatible = "nxp,pca9505", }, 815 { .compatible = "nxp,pca9534", }, 816 { .compatible = "nxp,pca9535", }, 817 { .compatible = "nxp,pca9536", }, 818 { .compatible = "nxp,pca9537", }, 819 { .compatible = "nxp,pca9538", }, 820 { .compatible = "nxp,pca9539", }, 821 { .compatible = "nxp,pca9554", }, 822 { .compatible = "nxp,pca9555", }, 823 { .compatible = "nxp,pca9556", }, 824 { .compatible = "nxp,pca9557", }, 825 { .compatible = "nxp,pca9574", }, 826 { .compatible = "nxp,pca9575", }, 827 828 { .compatible = "maxim,max7310", }, 829 { .compatible = "maxim,max7312", }, 830 { .compatible = "maxim,max7313", }, 831 { .compatible = "maxim,max7315", }, 832 833 { .compatible = "ti,pca6107", }, 834 { .compatible = "ti,tca6408", }, 835 { .compatible = "ti,tca6416", }, 836 { .compatible = "ti,tca6424", }, 837 { } 838 }; 839 840 MODULE_DEVICE_TABLE(of, pca953x_dt_ids); 841 842 static struct i2c_driver pca953x_driver = { 843 .driver = { 844 .name = "pca953x", 845 .of_match_table = pca953x_dt_ids, 846 }, 847 .probe = pca953x_probe, 848 .remove = pca953x_remove, 849 .id_table = pca953x_id, 850 }; 851 852 static int __init pca953x_init(void) 853 { 854 return i2c_add_driver(&pca953x_driver); 855 } 856 /* register after i2c postcore initcall and before 857 * subsys initcalls that may rely on these GPIOs 858 */ 859 subsys_initcall(pca953x_init); 860 861 static void __exit pca953x_exit(void) 862 { 863 i2c_del_driver(&pca953x_driver); 864 } 865 module_exit(pca953x_exit); 866 867 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>"); 868 MODULE_DESCRIPTION("GPIO expander driver for PCA953x"); 869 MODULE_LICENSE("GPL"); 870