xref: /openbmc/linux/drivers/gpio/gpio-pca953x.c (revision 2fa49589)
1 /*
2  *  PCA953x 4/8/16/24/40 bit I/O ports
3  *
4  *  Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
5  *  Copyright (C) 2007 Marvell International Ltd.
6  *
7  *  Derived from drivers/i2c/chips/pca9539.c
8  *
9  *  This program is free software; you can redistribute it and/or modify
10  *  it under the terms of the GNU General Public License as published by
11  *  the Free Software Foundation; version 2 of the License.
12  */
13 
14 #include <linux/acpi.h>
15 #include <linux/gpio/driver.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/i2c.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/module.h>
21 #include <linux/of_platform.h>
22 #include <linux/platform_data/pca953x.h>
23 #include <linux/regmap.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/slab.h>
26 
27 #include <asm/unaligned.h>
28 
29 #define PCA953X_INPUT		0x00
30 #define PCA953X_OUTPUT		0x01
31 #define PCA953X_INVERT		0x02
32 #define PCA953X_DIRECTION	0x03
33 
34 #define REG_ADDR_MASK		0x3f
35 #define REG_ADDR_EXT		0x40
36 #define REG_ADDR_AI		0x80
37 
38 #define PCA957X_IN		0x00
39 #define PCA957X_INVRT		0x01
40 #define PCA957X_BKEN		0x02
41 #define PCA957X_PUPD		0x03
42 #define PCA957X_CFG		0x04
43 #define PCA957X_OUT		0x05
44 #define PCA957X_MSK		0x06
45 #define PCA957X_INTS		0x07
46 
47 #define PCAL953X_OUT_STRENGTH	0x20
48 #define PCAL953X_IN_LATCH	0x22
49 #define PCAL953X_PULL_EN	0x23
50 #define PCAL953X_PULL_SEL	0x24
51 #define PCAL953X_INT_MASK	0x25
52 #define PCAL953X_INT_STAT	0x26
53 #define PCAL953X_OUT_CONF	0x27
54 
55 #define PCAL6524_INT_EDGE	0x28
56 #define PCAL6524_INT_CLR	0x2a
57 #define PCAL6524_IN_STATUS	0x2b
58 #define PCAL6524_OUT_INDCONF	0x2c
59 #define PCAL6524_DEBOUNCE	0x2d
60 
61 #define PCA_GPIO_MASK		0x00FF
62 
63 #define PCAL_GPIO_MASK		0x1f
64 #define PCAL_PINCTRL_MASK	0x60
65 
66 #define PCA_INT			0x0100
67 #define PCA_PCAL		0x0200
68 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT)
69 #define PCA953X_TYPE		0x1000
70 #define PCA957X_TYPE		0x2000
71 #define PCA_TYPE_MASK		0xF000
72 
73 #define PCA_CHIP_TYPE(x)	((x) & PCA_TYPE_MASK)
74 
75 static const struct i2c_device_id pca953x_id[] = {
76 	{ "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
77 	{ "pca9534", 8  | PCA953X_TYPE | PCA_INT, },
78 	{ "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
79 	{ "pca9536", 4  | PCA953X_TYPE, },
80 	{ "pca9537", 4  | PCA953X_TYPE | PCA_INT, },
81 	{ "pca9538", 8  | PCA953X_TYPE | PCA_INT, },
82 	{ "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
83 	{ "pca9554", 8  | PCA953X_TYPE | PCA_INT, },
84 	{ "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
85 	{ "pca9556", 8  | PCA953X_TYPE, },
86 	{ "pca9557", 8  | PCA953X_TYPE, },
87 	{ "pca9574", 8  | PCA957X_TYPE | PCA_INT, },
88 	{ "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
89 	{ "pca9698", 40 | PCA953X_TYPE, },
90 
91 	{ "pcal6524", 24 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
92 	{ "pcal9555a", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
93 
94 	{ "max7310", 8  | PCA953X_TYPE, },
95 	{ "max7312", 16 | PCA953X_TYPE | PCA_INT, },
96 	{ "max7313", 16 | PCA953X_TYPE | PCA_INT, },
97 	{ "max7315", 8  | PCA953X_TYPE | PCA_INT, },
98 	{ "max7318", 16 | PCA953X_TYPE | PCA_INT, },
99 	{ "pca6107", 8  | PCA953X_TYPE | PCA_INT, },
100 	{ "tca6408", 8  | PCA953X_TYPE | PCA_INT, },
101 	{ "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
102 	{ "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
103 	{ "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
104 	{ "tca9554", 8  | PCA953X_TYPE | PCA_INT, },
105 	{ "xra1202", 8  | PCA953X_TYPE },
106 	{ }
107 };
108 MODULE_DEVICE_TABLE(i2c, pca953x_id);
109 
110 static const struct acpi_device_id pca953x_acpi_ids[] = {
111 	{ "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
112 	{ }
113 };
114 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
115 
116 #define MAX_BANK 5
117 #define BANK_SZ 8
118 
119 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
120 
121 struct pca953x_reg_config {
122 	int direction;
123 	int output;
124 	int input;
125 	int invert;
126 };
127 
128 static const struct pca953x_reg_config pca953x_regs = {
129 	.direction = PCA953X_DIRECTION,
130 	.output = PCA953X_OUTPUT,
131 	.input = PCA953X_INPUT,
132 	.invert = PCA953X_INVERT,
133 };
134 
135 static const struct pca953x_reg_config pca957x_regs = {
136 	.direction = PCA957X_CFG,
137 	.output = PCA957X_OUT,
138 	.input = PCA957X_IN,
139 	.invert = PCA957X_INVRT,
140 };
141 
142 struct pca953x_chip {
143 	unsigned gpio_start;
144 	struct mutex i2c_lock;
145 	struct regmap *regmap;
146 
147 #ifdef CONFIG_GPIO_PCA953X_IRQ
148 	struct mutex irq_lock;
149 	u8 irq_mask[MAX_BANK];
150 	u8 irq_stat[MAX_BANK];
151 	u8 irq_trig_raise[MAX_BANK];
152 	u8 irq_trig_fall[MAX_BANK];
153 #endif
154 
155 	struct i2c_client *client;
156 	struct gpio_chip gpio_chip;
157 	const char *const *names;
158 	unsigned long driver_data;
159 	struct regulator *regulator;
160 
161 	const struct pca953x_reg_config *regs;
162 };
163 
164 static int pca953x_bank_shift(struct pca953x_chip *chip)
165 {
166 	return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
167 }
168 
169 #define PCA953x_BANK_INPUT	BIT(0)
170 #define PCA953x_BANK_OUTPUT	BIT(1)
171 #define PCA953x_BANK_POLARITY	BIT(2)
172 #define PCA953x_BANK_CONFIG	BIT(3)
173 
174 #define PCA957x_BANK_INPUT	BIT(0)
175 #define PCA957x_BANK_POLARITY	BIT(1)
176 #define PCA957x_BANK_BUSHOLD	BIT(2)
177 #define PCA957x_BANK_CONFIG	BIT(4)
178 #define PCA957x_BANK_OUTPUT	BIT(5)
179 
180 #define PCAL9xxx_BANK_IN_LATCH	BIT(8 + 2)
181 #define PCAL9xxx_BANK_IRQ_MASK	BIT(8 + 5)
182 #define PCAL9xxx_BANK_IRQ_STAT	BIT(8 + 6)
183 
184 /*
185  * We care about the following registers:
186  * - Standard set, below 0x40, each port can be replicated up to 8 times
187  *   - PCA953x standard
188  *     Input port			0x00 + 0 * bank_size	R
189  *     Output port			0x00 + 1 * bank_size	RW
190  *     Polarity Inversion port		0x00 + 2 * bank_size	RW
191  *     Configuration port		0x00 + 3 * bank_size	RW
192  *   - PCA957x with mixed up registers
193  *     Input port			0x00 + 0 * bank_size	R
194  *     Polarity Inversion port		0x00 + 1 * bank_size	RW
195  *     Bus hold port			0x00 + 2 * bank_size	RW
196  *     Configuration port		0x00 + 4 * bank_size	RW
197  *     Output port			0x00 + 5 * bank_size	RW
198  *
199  * - Extended set, above 0x40, often chip specific.
200  *   - PCAL6524/PCAL9555A with custom PCAL IRQ handling:
201  *     Input latch register		0x40 + 2 * bank_size	RW
202  *     Interrupt mask register		0x40 + 5 * bank_size	RW
203  *     Interrupt status register	0x40 + 6 * bank_size	R
204  *
205  * - Registers with bit 0x80 set, the AI bit
206  *   The bit is cleared and the registers fall into one of the
207  *   categories above.
208  */
209 
210 static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg,
211 				   u32 checkbank)
212 {
213 	int bank_shift = pca953x_bank_shift(chip);
214 	int bank = (reg & REG_ADDR_MASK) >> bank_shift;
215 	int offset = reg & (BIT(bank_shift) - 1);
216 
217 	/* Special PCAL extended register check. */
218 	if (reg & REG_ADDR_EXT) {
219 		if (!(chip->driver_data & PCA_PCAL))
220 			return false;
221 		bank += 8;
222 	}
223 
224 	/* Register is not in the matching bank. */
225 	if (!(BIT(bank) & checkbank))
226 		return false;
227 
228 	/* Register is not within allowed range of bank. */
229 	if (offset >= NBANK(chip))
230 		return false;
231 
232 	return true;
233 }
234 
235 static bool pca953x_readable_register(struct device *dev, unsigned int reg)
236 {
237 	struct pca953x_chip *chip = dev_get_drvdata(dev);
238 	u32 bank;
239 
240 	if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
241 		bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT |
242 		       PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG;
243 	} else {
244 		bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT |
245 		       PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG |
246 		       PCA957x_BANK_BUSHOLD;
247 	}
248 
249 	if (chip->driver_data & PCA_PCAL) {
250 		bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_IRQ_MASK |
251 			PCAL9xxx_BANK_IRQ_STAT;
252 	}
253 
254 	return pca953x_check_register(chip, reg, bank);
255 }
256 
257 static bool pca953x_writeable_register(struct device *dev, unsigned int reg)
258 {
259 	struct pca953x_chip *chip = dev_get_drvdata(dev);
260 	u32 bank;
261 
262 	if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
263 		bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY |
264 			PCA953x_BANK_CONFIG;
265 	} else {
266 		bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY |
267 			PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD;
268 	}
269 
270 	if (chip->driver_data & PCA_PCAL)
271 		bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_IRQ_MASK;
272 
273 	return pca953x_check_register(chip, reg, bank);
274 }
275 
276 static bool pca953x_volatile_register(struct device *dev, unsigned int reg)
277 {
278 	struct pca953x_chip *chip = dev_get_drvdata(dev);
279 	u32 bank;
280 
281 	if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
282 		bank = PCA953x_BANK_INPUT;
283 	else
284 		bank = PCA957x_BANK_INPUT;
285 
286 	if (chip->driver_data & PCA_PCAL)
287 		bank |= PCAL9xxx_BANK_IRQ_STAT;
288 
289 	return pca953x_check_register(chip, reg, bank);
290 }
291 
292 static const struct regmap_config pca953x_i2c_regmap = {
293 	.reg_bits = 8,
294 	.val_bits = 8,
295 
296 	.readable_reg = pca953x_readable_register,
297 	.writeable_reg = pca953x_writeable_register,
298 	.volatile_reg = pca953x_volatile_register,
299 
300 	.cache_type = REGCACHE_RBTREE,
301 	.max_register = 0x7f,
302 };
303 
304 static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off,
305 			      bool write, bool addrinc)
306 {
307 	int bank_shift = pca953x_bank_shift(chip);
308 	int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
309 	int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
310 	u8 regaddr = pinctrl | addr | (off / BANK_SZ);
311 
312 	/* Single byte read doesn't need AI bit set. */
313 	if (!addrinc)
314 		return regaddr;
315 
316 	/* Chips with 24 and more GPIOs always support Auto Increment */
317 	if (write && NBANK(chip) > 2)
318 		regaddr |= REG_ADDR_AI;
319 
320 	/* PCA9575 needs address-increment on multi-byte writes */
321 	if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE)
322 		regaddr |= REG_ADDR_AI;
323 
324 	return regaddr;
325 }
326 
327 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
328 {
329 	u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true);
330 	int ret;
331 
332 	ret = regmap_bulk_write(chip->regmap, regaddr, val, NBANK(chip));
333 	if (ret < 0) {
334 		dev_err(&chip->client->dev, "failed writing register\n");
335 		return ret;
336 	}
337 
338 	return 0;
339 }
340 
341 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
342 {
343 	u8 regaddr = pca953x_recalc_addr(chip, reg, 0, false, true);
344 	int ret;
345 
346 	ret = regmap_bulk_read(chip->regmap, regaddr, val, NBANK(chip));
347 	if (ret < 0) {
348 		dev_err(&chip->client->dev, "failed reading register\n");
349 		return ret;
350 	}
351 
352 	return 0;
353 }
354 
355 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
356 {
357 	struct pca953x_chip *chip = gpiochip_get_data(gc);
358 	u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
359 					true, false);
360 	u8 bit = BIT(off % BANK_SZ);
361 	int ret;
362 
363 	mutex_lock(&chip->i2c_lock);
364 	ret = regmap_write_bits(chip->regmap, dirreg, bit, bit);
365 	mutex_unlock(&chip->i2c_lock);
366 	return ret;
367 }
368 
369 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
370 		unsigned off, int val)
371 {
372 	struct pca953x_chip *chip = gpiochip_get_data(gc);
373 	u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
374 					true, false);
375 	u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
376 					true, false);
377 	u8 bit = BIT(off % BANK_SZ);
378 	int ret;
379 
380 	mutex_lock(&chip->i2c_lock);
381 	/* set output level */
382 	ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
383 	if (ret)
384 		goto exit;
385 
386 	/* then direction */
387 	ret = regmap_write_bits(chip->regmap, dirreg, bit, 0);
388 exit:
389 	mutex_unlock(&chip->i2c_lock);
390 	return ret;
391 }
392 
393 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
394 {
395 	struct pca953x_chip *chip = gpiochip_get_data(gc);
396 	u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off,
397 				       true, false);
398 	u8 bit = BIT(off % BANK_SZ);
399 	u32 reg_val;
400 	int ret;
401 
402 	mutex_lock(&chip->i2c_lock);
403 	ret = regmap_read(chip->regmap, inreg, &reg_val);
404 	mutex_unlock(&chip->i2c_lock);
405 	if (ret < 0) {
406 		/* NOTE:  diagnostic already emitted; that's all we should
407 		 * do unless gpio_*_value_cansleep() calls become different
408 		 * from their nonsleeping siblings (and report faults).
409 		 */
410 		return 0;
411 	}
412 
413 	return !!(reg_val & bit);
414 }
415 
416 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
417 {
418 	struct pca953x_chip *chip = gpiochip_get_data(gc);
419 	u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
420 					true, false);
421 	u8 bit = BIT(off % BANK_SZ);
422 
423 	mutex_lock(&chip->i2c_lock);
424 	regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
425 	mutex_unlock(&chip->i2c_lock);
426 }
427 
428 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
429 {
430 	struct pca953x_chip *chip = gpiochip_get_data(gc);
431 	u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
432 					true, false);
433 	u8 bit = BIT(off % BANK_SZ);
434 	u32 reg_val;
435 	int ret;
436 
437 	mutex_lock(&chip->i2c_lock);
438 	ret = regmap_read(chip->regmap, dirreg, &reg_val);
439 	mutex_unlock(&chip->i2c_lock);
440 	if (ret < 0)
441 		return ret;
442 
443 	return !!(reg_val & bit);
444 }
445 
446 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
447 				      unsigned long *mask, unsigned long *bits)
448 {
449 	struct pca953x_chip *chip = gpiochip_get_data(gc);
450 	unsigned int bank_mask, bank_val;
451 	int bank;
452 	u8 reg_val[MAX_BANK];
453 	int ret;
454 
455 	mutex_lock(&chip->i2c_lock);
456 	ret = pca953x_read_regs(chip, chip->regs->output, reg_val);
457 	if (ret)
458 		goto exit;
459 
460 	for (bank = 0; bank < NBANK(chip); bank++) {
461 		bank_mask = mask[bank / sizeof(*mask)] >>
462 			   ((bank % sizeof(*mask)) * 8);
463 		if (bank_mask) {
464 			bank_val = bits[bank / sizeof(*bits)] >>
465 				  ((bank % sizeof(*bits)) * 8);
466 			bank_val &= bank_mask;
467 			reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val;
468 		}
469 	}
470 
471 	pca953x_write_regs(chip, chip->regs->output, reg_val);
472 exit:
473 	mutex_unlock(&chip->i2c_lock);
474 }
475 
476 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
477 {
478 	struct gpio_chip *gc;
479 
480 	gc = &chip->gpio_chip;
481 
482 	gc->direction_input  = pca953x_gpio_direction_input;
483 	gc->direction_output = pca953x_gpio_direction_output;
484 	gc->get = pca953x_gpio_get_value;
485 	gc->set = pca953x_gpio_set_value;
486 	gc->get_direction = pca953x_gpio_get_direction;
487 	gc->set_multiple = pca953x_gpio_set_multiple;
488 	gc->can_sleep = true;
489 
490 	gc->base = chip->gpio_start;
491 	gc->ngpio = gpios;
492 	gc->label = dev_name(&chip->client->dev);
493 	gc->parent = &chip->client->dev;
494 	gc->owner = THIS_MODULE;
495 	gc->names = chip->names;
496 }
497 
498 #ifdef CONFIG_GPIO_PCA953X_IRQ
499 static void pca953x_irq_mask(struct irq_data *d)
500 {
501 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
502 	struct pca953x_chip *chip = gpiochip_get_data(gc);
503 
504 	chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
505 }
506 
507 static void pca953x_irq_unmask(struct irq_data *d)
508 {
509 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
510 	struct pca953x_chip *chip = gpiochip_get_data(gc);
511 
512 	chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
513 }
514 
515 static void pca953x_irq_bus_lock(struct irq_data *d)
516 {
517 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
518 	struct pca953x_chip *chip = gpiochip_get_data(gc);
519 
520 	mutex_lock(&chip->irq_lock);
521 }
522 
523 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
524 {
525 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
526 	struct pca953x_chip *chip = gpiochip_get_data(gc);
527 	u8 new_irqs;
528 	int level, i;
529 	u8 invert_irq_mask[MAX_BANK];
530 	int reg_direction[MAX_BANK];
531 
532 	regmap_bulk_read(chip->regmap, chip->regs->direction, reg_direction,
533 			 NBANK(chip));
534 
535 	if (chip->driver_data & PCA_PCAL) {
536 		/* Enable latch on interrupt-enabled inputs */
537 		pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
538 
539 		for (i = 0; i < NBANK(chip); i++)
540 			invert_irq_mask[i] = ~chip->irq_mask[i];
541 
542 		/* Unmask enabled interrupts */
543 		pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
544 	}
545 
546 	/* Look for any newly setup interrupt */
547 	for (i = 0; i < NBANK(chip); i++) {
548 		new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
549 		new_irqs &= reg_direction[i];
550 
551 		while (new_irqs) {
552 			level = __ffs(new_irqs);
553 			pca953x_gpio_direction_input(&chip->gpio_chip,
554 							level + (BANK_SZ * i));
555 			new_irqs &= ~(1 << level);
556 		}
557 	}
558 
559 	mutex_unlock(&chip->irq_lock);
560 }
561 
562 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
563 {
564 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
565 	struct pca953x_chip *chip = gpiochip_get_data(gc);
566 	int bank_nb = d->hwirq / BANK_SZ;
567 	u8 mask = 1 << (d->hwirq % BANK_SZ);
568 
569 	if (!(type & IRQ_TYPE_EDGE_BOTH)) {
570 		dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
571 			d->irq, type);
572 		return -EINVAL;
573 	}
574 
575 	if (type & IRQ_TYPE_EDGE_FALLING)
576 		chip->irq_trig_fall[bank_nb] |= mask;
577 	else
578 		chip->irq_trig_fall[bank_nb] &= ~mask;
579 
580 	if (type & IRQ_TYPE_EDGE_RISING)
581 		chip->irq_trig_raise[bank_nb] |= mask;
582 	else
583 		chip->irq_trig_raise[bank_nb] &= ~mask;
584 
585 	return 0;
586 }
587 
588 static void pca953x_irq_shutdown(struct irq_data *d)
589 {
590 	struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
591 	u8 mask = 1 << (d->hwirq % BANK_SZ);
592 
593 	chip->irq_trig_raise[d->hwirq / BANK_SZ] &= ~mask;
594 	chip->irq_trig_fall[d->hwirq / BANK_SZ] &= ~mask;
595 }
596 
597 static struct irq_chip pca953x_irq_chip = {
598 	.name			= "pca953x",
599 	.irq_mask		= pca953x_irq_mask,
600 	.irq_unmask		= pca953x_irq_unmask,
601 	.irq_bus_lock		= pca953x_irq_bus_lock,
602 	.irq_bus_sync_unlock	= pca953x_irq_bus_sync_unlock,
603 	.irq_set_type		= pca953x_irq_set_type,
604 	.irq_shutdown		= pca953x_irq_shutdown,
605 };
606 
607 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
608 {
609 	u8 cur_stat[MAX_BANK];
610 	u8 old_stat[MAX_BANK];
611 	bool pending_seen = false;
612 	bool trigger_seen = false;
613 	u8 trigger[MAX_BANK];
614 	int reg_direction[MAX_BANK];
615 	int ret, i;
616 
617 	if (chip->driver_data & PCA_PCAL) {
618 		/* Read the current interrupt status from the device */
619 		ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
620 		if (ret)
621 			return false;
622 
623 		/* Check latched inputs and clear interrupt status */
624 		ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
625 		if (ret)
626 			return false;
627 
628 		for (i = 0; i < NBANK(chip); i++) {
629 			/* Apply filter for rising/falling edge selection */
630 			pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
631 				(cur_stat[i] & chip->irq_trig_raise[i]);
632 			pending[i] &= trigger[i];
633 			if (pending[i])
634 				pending_seen = true;
635 		}
636 
637 		return pending_seen;
638 	}
639 
640 	ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
641 	if (ret)
642 		return false;
643 
644 	/* Remove output pins from the equation */
645 	regmap_bulk_read(chip->regmap, chip->regs->direction, reg_direction,
646 			 NBANK(chip));
647 	for (i = 0; i < NBANK(chip); i++)
648 		cur_stat[i] &= reg_direction[i];
649 
650 	memcpy(old_stat, chip->irq_stat, NBANK(chip));
651 
652 	for (i = 0; i < NBANK(chip); i++) {
653 		trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
654 		if (trigger[i])
655 			trigger_seen = true;
656 	}
657 
658 	if (!trigger_seen)
659 		return false;
660 
661 	memcpy(chip->irq_stat, cur_stat, NBANK(chip));
662 
663 	for (i = 0; i < NBANK(chip); i++) {
664 		pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
665 			(cur_stat[i] & chip->irq_trig_raise[i]);
666 		pending[i] &= trigger[i];
667 		if (pending[i])
668 			pending_seen = true;
669 	}
670 
671 	return pending_seen;
672 }
673 
674 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
675 {
676 	struct pca953x_chip *chip = devid;
677 	u8 pending[MAX_BANK];
678 	u8 level;
679 	unsigned nhandled = 0;
680 	int i;
681 
682 	if (!pca953x_irq_pending(chip, pending))
683 		return IRQ_NONE;
684 
685 	for (i = 0; i < NBANK(chip); i++) {
686 		while (pending[i]) {
687 			level = __ffs(pending[i]);
688 			handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,
689 							level + (BANK_SZ * i)));
690 			pending[i] &= ~(1 << level);
691 			nhandled++;
692 		}
693 	}
694 
695 	return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
696 }
697 
698 static int pca953x_irq_setup(struct pca953x_chip *chip,
699 			     int irq_base)
700 {
701 	struct i2c_client *client = chip->client;
702 	int reg_direction[MAX_BANK];
703 	int ret, i;
704 
705 	if (client->irq && irq_base != -1
706 			&& (chip->driver_data & PCA_INT)) {
707 		ret = pca953x_read_regs(chip,
708 					chip->regs->input, chip->irq_stat);
709 		if (ret)
710 			return ret;
711 
712 		/*
713 		 * There is no way to know which GPIO line generated the
714 		 * interrupt.  We have to rely on the previous read for
715 		 * this purpose.
716 		 */
717 		regmap_bulk_read(chip->regmap, chip->regs->direction,
718 				 reg_direction, NBANK(chip));
719 		for (i = 0; i < NBANK(chip); i++)
720 			chip->irq_stat[i] &= reg_direction[i];
721 		mutex_init(&chip->irq_lock);
722 
723 		ret = devm_request_threaded_irq(&client->dev,
724 					client->irq,
725 					   NULL,
726 					   pca953x_irq_handler,
727 					   IRQF_TRIGGER_LOW | IRQF_ONESHOT |
728 						   IRQF_SHARED,
729 					   dev_name(&client->dev), chip);
730 		if (ret) {
731 			dev_err(&client->dev, "failed to request irq %d\n",
732 				client->irq);
733 			return ret;
734 		}
735 
736 		ret =  gpiochip_irqchip_add_nested(&chip->gpio_chip,
737 						   &pca953x_irq_chip,
738 						   irq_base,
739 						   handle_simple_irq,
740 						   IRQ_TYPE_NONE);
741 		if (ret) {
742 			dev_err(&client->dev,
743 				"could not connect irqchip to gpiochip\n");
744 			return ret;
745 		}
746 
747 		gpiochip_set_nested_irqchip(&chip->gpio_chip,
748 					    &pca953x_irq_chip,
749 					    client->irq);
750 	}
751 
752 	return 0;
753 }
754 
755 #else /* CONFIG_GPIO_PCA953X_IRQ */
756 static int pca953x_irq_setup(struct pca953x_chip *chip,
757 			     int irq_base)
758 {
759 	struct i2c_client *client = chip->client;
760 
761 	if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
762 		dev_warn(&client->dev, "interrupt support not compiled in\n");
763 
764 	return 0;
765 }
766 #endif
767 
768 static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
769 {
770 	int ret;
771 	u8 val[MAX_BANK];
772 
773 	ret = regcache_sync_region(chip->regmap, chip->regs->output,
774 				   chip->regs->output + NBANK(chip));
775 	if (ret != 0)
776 		goto out;
777 
778 	ret = regcache_sync_region(chip->regmap, chip->regs->direction,
779 				   chip->regs->direction + NBANK(chip));
780 	if (ret != 0)
781 		goto out;
782 
783 	/* set platform specific polarity inversion */
784 	if (invert)
785 		memset(val, 0xFF, NBANK(chip));
786 	else
787 		memset(val, 0, NBANK(chip));
788 
789 	ret = pca953x_write_regs(chip, chip->regs->invert, val);
790 out:
791 	return ret;
792 }
793 
794 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
795 {
796 	int ret;
797 	u8 val[MAX_BANK];
798 
799 	ret = device_pca95xx_init(chip, invert);
800 	if (ret)
801 		goto out;
802 
803 	/* To enable register 6, 7 to control pull up and pull down */
804 	memset(val, 0x02, NBANK(chip));
805 	ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
806 	if (ret)
807 		goto out;
808 
809 	return 0;
810 out:
811 	return ret;
812 }
813 
814 static const struct of_device_id pca953x_dt_ids[];
815 
816 static int pca953x_probe(struct i2c_client *client,
817 				   const struct i2c_device_id *i2c_id)
818 {
819 	struct pca953x_platform_data *pdata;
820 	struct pca953x_chip *chip;
821 	int irq_base = 0;
822 	int ret;
823 	u32 invert = 0;
824 	struct regulator *reg;
825 
826 	chip = devm_kzalloc(&client->dev,
827 			sizeof(struct pca953x_chip), GFP_KERNEL);
828 	if (chip == NULL)
829 		return -ENOMEM;
830 
831 	pdata = dev_get_platdata(&client->dev);
832 	if (pdata) {
833 		irq_base = pdata->irq_base;
834 		chip->gpio_start = pdata->gpio_base;
835 		invert = pdata->invert;
836 		chip->names = pdata->names;
837 	} else {
838 		struct gpio_desc *reset_gpio;
839 
840 		chip->gpio_start = -1;
841 		irq_base = 0;
842 
843 		/*
844 		 * See if we need to de-assert a reset pin.
845 		 *
846 		 * There is no known ACPI-enabled platforms that are
847 		 * using "reset" GPIO. Otherwise any of those platform
848 		 * must use _DSD method with corresponding property.
849 		 */
850 		reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
851 						     GPIOD_OUT_LOW);
852 		if (IS_ERR(reset_gpio))
853 			return PTR_ERR(reset_gpio);
854 	}
855 
856 	chip->client = client;
857 
858 	reg = devm_regulator_get(&client->dev, "vcc");
859 	if (IS_ERR(reg)) {
860 		ret = PTR_ERR(reg);
861 		if (ret != -EPROBE_DEFER)
862 			dev_err(&client->dev, "reg get err: %d\n", ret);
863 		return ret;
864 	}
865 	ret = regulator_enable(reg);
866 	if (ret) {
867 		dev_err(&client->dev, "reg en err: %d\n", ret);
868 		return ret;
869 	}
870 	chip->regulator = reg;
871 
872 	if (i2c_id) {
873 		chip->driver_data = i2c_id->driver_data;
874 	} else {
875 		const struct acpi_device_id *acpi_id;
876 		struct device *dev = &client->dev;
877 
878 		chip->driver_data = (uintptr_t)of_device_get_match_data(dev);
879 		if (!chip->driver_data) {
880 			acpi_id = acpi_match_device(pca953x_acpi_ids, dev);
881 			if (!acpi_id) {
882 				ret = -ENODEV;
883 				goto err_exit;
884 			}
885 
886 			chip->driver_data = acpi_id->driver_data;
887 		}
888 	}
889 
890 	i2c_set_clientdata(client, chip);
891 
892 	chip->regmap = devm_regmap_init_i2c(client, &pca953x_i2c_regmap);
893 	if (IS_ERR(chip->regmap)) {
894 		ret = PTR_ERR(chip->regmap);
895 		goto err_exit;
896 	}
897 
898 	regcache_mark_dirty(chip->regmap);
899 
900 	mutex_init(&chip->i2c_lock);
901 	/*
902 	 * In case we have an i2c-mux controlled by a GPIO provided by an
903 	 * expander using the same driver higher on the device tree, read the
904 	 * i2c adapter nesting depth and use the retrieved value as lockdep
905 	 * subclass for chip->i2c_lock.
906 	 *
907 	 * REVISIT: This solution is not complete. It protects us from lockdep
908 	 * false positives when the expander controlling the i2c-mux is on
909 	 * a different level on the device tree, but not when it's on the same
910 	 * level on a different branch (in which case the subclass number
911 	 * would be the same).
912 	 *
913 	 * TODO: Once a correct solution is developed, a similar fix should be
914 	 * applied to all other i2c-controlled GPIO expanders (and potentially
915 	 * regmap-i2c).
916 	 */
917 	lockdep_set_subclass(&chip->i2c_lock,
918 			     i2c_adapter_depth(client->adapter));
919 
920 	/* initialize cached registers from their original values.
921 	 * we can't share this chip with another i2c master.
922 	 */
923 	pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
924 
925 	if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
926 		chip->regs = &pca953x_regs;
927 		ret = device_pca95xx_init(chip, invert);
928 	} else {
929 		chip->regs = &pca957x_regs;
930 		ret = device_pca957x_init(chip, invert);
931 	}
932 	if (ret)
933 		goto err_exit;
934 
935 	ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
936 	if (ret)
937 		goto err_exit;
938 
939 	ret = pca953x_irq_setup(chip, irq_base);
940 	if (ret)
941 		goto err_exit;
942 
943 	if (pdata && pdata->setup) {
944 		ret = pdata->setup(client, chip->gpio_chip.base,
945 				chip->gpio_chip.ngpio, pdata->context);
946 		if (ret < 0)
947 			dev_warn(&client->dev, "setup failed, %d\n", ret);
948 	}
949 
950 	return 0;
951 
952 err_exit:
953 	regulator_disable(chip->regulator);
954 	return ret;
955 }
956 
957 static int pca953x_remove(struct i2c_client *client)
958 {
959 	struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
960 	struct pca953x_chip *chip = i2c_get_clientdata(client);
961 	int ret;
962 
963 	if (pdata && pdata->teardown) {
964 		ret = pdata->teardown(client, chip->gpio_chip.base,
965 				chip->gpio_chip.ngpio, pdata->context);
966 		if (ret < 0)
967 			dev_err(&client->dev, "%s failed, %d\n",
968 					"teardown", ret);
969 	} else {
970 		ret = 0;
971 	}
972 
973 	regulator_disable(chip->regulator);
974 
975 	return ret;
976 }
977 
978 #ifdef CONFIG_PM_SLEEP
979 static int pca953x_regcache_sync(struct device *dev)
980 {
981 	struct pca953x_chip *chip = dev_get_drvdata(dev);
982 	int ret;
983 
984 	/*
985 	 * The ordering between direction and output is important,
986 	 * sync these registers first and only then sync the rest.
987 	 */
988 	ret = regcache_sync_region(chip->regmap, chip->regs->direction,
989 				   chip->regs->direction + NBANK(chip));
990 	if (ret != 0) {
991 		dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret);
992 		return ret;
993 	}
994 
995 	ret = regcache_sync_region(chip->regmap, chip->regs->output,
996 				   chip->regs->output + NBANK(chip));
997 	if (ret != 0) {
998 		dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret);
999 		return ret;
1000 	}
1001 
1002 #ifdef CONFIG_GPIO_PCA953X_IRQ
1003 	if (chip->driver_data & PCA_PCAL) {
1004 		ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH,
1005 					   PCAL953X_IN_LATCH + NBANK(chip));
1006 		if (ret != 0) {
1007 			dev_err(dev, "Failed to sync INT latch registers: %d\n",
1008 				ret);
1009 			return ret;
1010 		}
1011 
1012 		ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK,
1013 					   PCAL953X_INT_MASK + NBANK(chip));
1014 		if (ret != 0) {
1015 			dev_err(dev, "Failed to sync INT mask registers: %d\n",
1016 				ret);
1017 			return ret;
1018 		}
1019 	}
1020 #endif
1021 
1022 	return 0;
1023 }
1024 
1025 static int pca953x_suspend(struct device *dev)
1026 {
1027 	struct pca953x_chip *chip = dev_get_drvdata(dev);
1028 
1029 	regcache_cache_only(chip->regmap, true);
1030 
1031 	regulator_disable(chip->regulator);
1032 
1033 	return 0;
1034 }
1035 
1036 static int pca953x_resume(struct device *dev)
1037 {
1038 	struct pca953x_chip *chip = dev_get_drvdata(dev);
1039 	int ret;
1040 
1041 	ret = regulator_enable(chip->regulator);
1042 	if (ret != 0) {
1043 		dev_err(dev, "Failed to enable regulator: %d\n", ret);
1044 		return 0;
1045 	}
1046 
1047 	regcache_cache_only(chip->regmap, false);
1048 	regcache_mark_dirty(chip->regmap);
1049 	ret = pca953x_regcache_sync(dev);
1050 	if (ret)
1051 		return ret;
1052 
1053 	ret = regcache_sync(chip->regmap);
1054 	if (ret != 0) {
1055 		dev_err(dev, "Failed to restore register map: %d\n", ret);
1056 		return ret;
1057 	}
1058 
1059 	return 0;
1060 }
1061 #endif
1062 
1063 /* convenience to stop overlong match-table lines */
1064 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
1065 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
1066 
1067 static const struct of_device_id pca953x_dt_ids[] = {
1068 	{ .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
1069 	{ .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
1070 	{ .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
1071 	{ .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
1072 	{ .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
1073 	{ .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
1074 	{ .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
1075 	{ .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
1076 	{ .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
1077 	{ .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
1078 	{ .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
1079 	{ .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
1080 	{ .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
1081 	{ .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
1082 
1083 	{ .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
1084 	{ .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
1085 
1086 	{ .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
1087 	{ .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
1088 	{ .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
1089 	{ .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
1090 	{ .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
1091 
1092 	{ .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
1093 	{ .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
1094 	{ .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
1095 	{ .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
1096 	{ .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
1097 
1098 	{ .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
1099 
1100 	{ .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
1101 	{ }
1102 };
1103 
1104 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
1105 
1106 static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume);
1107 
1108 static struct i2c_driver pca953x_driver = {
1109 	.driver = {
1110 		.name	= "pca953x",
1111 		.pm	= &pca953x_pm_ops,
1112 		.of_match_table = pca953x_dt_ids,
1113 		.acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
1114 	},
1115 	.probe		= pca953x_probe,
1116 	.remove		= pca953x_remove,
1117 	.id_table	= pca953x_id,
1118 };
1119 
1120 static int __init pca953x_init(void)
1121 {
1122 	return i2c_add_driver(&pca953x_driver);
1123 }
1124 /* register after i2c postcore initcall and before
1125  * subsys initcalls that may rely on these GPIOs
1126  */
1127 subsys_initcall(pca953x_init);
1128 
1129 static void __exit pca953x_exit(void)
1130 {
1131 	i2c_del_driver(&pca953x_driver);
1132 }
1133 module_exit(pca953x_exit);
1134 
1135 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1136 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1137 MODULE_LICENSE("GPL");
1138