1 /* 2 * PCA953x 4/8/16/24/40 bit I/O ports 3 * 4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com> 5 * Copyright (C) 2007 Marvell International Ltd. 6 * 7 * Derived from drivers/i2c/chips/pca9539.c 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; version 2 of the License. 12 */ 13 14 #include <linux/acpi.h> 15 #include <linux/gpio.h> 16 #include <linux/gpio/consumer.h> 17 #include <linux/i2c.h> 18 #include <linux/init.h> 19 #include <linux/interrupt.h> 20 #include <linux/module.h> 21 #include <linux/of_platform.h> 22 #include <linux/platform_data/pca953x.h> 23 #include <linux/regulator/consumer.h> 24 #include <linux/slab.h> 25 26 #include <asm/unaligned.h> 27 28 #define PCA953X_INPUT 0 29 #define PCA953X_OUTPUT 1 30 #define PCA953X_INVERT 2 31 #define PCA953X_DIRECTION 3 32 33 #define REG_ADDR_AI 0x80 34 35 #define PCA957X_IN 0 36 #define PCA957X_INVRT 1 37 #define PCA957X_BKEN 2 38 #define PCA957X_PUPD 3 39 #define PCA957X_CFG 4 40 #define PCA957X_OUT 5 41 #define PCA957X_MSK 6 42 #define PCA957X_INTS 7 43 44 #define PCAL953X_IN_LATCH 34 45 #define PCAL953X_INT_MASK 37 46 #define PCAL953X_INT_STAT 38 47 48 #define PCA_GPIO_MASK 0x00FF 49 #define PCA_INT 0x0100 50 #define PCA_PCAL 0x0200 51 #define PCA953X_TYPE 0x1000 52 #define PCA957X_TYPE 0x2000 53 #define PCA_TYPE_MASK 0xF000 54 55 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK) 56 57 static const struct i2c_device_id pca953x_id[] = { 58 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, }, 59 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, }, 60 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, }, 61 { "pca9536", 4 | PCA953X_TYPE, }, 62 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, }, 63 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, }, 64 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, }, 65 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, }, 66 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, }, 67 { "pca9556", 8 | PCA953X_TYPE, }, 68 { "pca9557", 8 | PCA953X_TYPE, }, 69 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, }, 70 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, }, 71 { "pca9698", 40 | PCA953X_TYPE, }, 72 73 { "pcal9555a", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, }, 74 75 { "max7310", 8 | PCA953X_TYPE, }, 76 { "max7312", 16 | PCA953X_TYPE | PCA_INT, }, 77 { "max7313", 16 | PCA953X_TYPE | PCA_INT, }, 78 { "max7315", 8 | PCA953X_TYPE | PCA_INT, }, 79 { "max7318", 16 | PCA953X_TYPE | PCA_INT, }, 80 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, }, 81 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, }, 82 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, }, 83 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, }, 84 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, }, 85 { "tca9554", 8 | PCA953X_TYPE | PCA_INT, }, 86 { "xra1202", 8 | PCA953X_TYPE }, 87 { } 88 }; 89 MODULE_DEVICE_TABLE(i2c, pca953x_id); 90 91 static const struct acpi_device_id pca953x_acpi_ids[] = { 92 { "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, }, 93 { } 94 }; 95 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids); 96 97 #define MAX_BANK 5 98 #define BANK_SZ 8 99 100 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ) 101 102 struct pca953x_reg_config { 103 int direction; 104 int output; 105 int input; 106 }; 107 108 static const struct pca953x_reg_config pca953x_regs = { 109 .direction = PCA953X_DIRECTION, 110 .output = PCA953X_OUTPUT, 111 .input = PCA953X_INPUT, 112 }; 113 114 static const struct pca953x_reg_config pca957x_regs = { 115 .direction = PCA957X_CFG, 116 .output = PCA957X_OUT, 117 .input = PCA957X_IN, 118 }; 119 120 struct pca953x_chip { 121 unsigned gpio_start; 122 u8 reg_output[MAX_BANK]; 123 u8 reg_direction[MAX_BANK]; 124 struct mutex i2c_lock; 125 126 #ifdef CONFIG_GPIO_PCA953X_IRQ 127 struct mutex irq_lock; 128 u8 irq_mask[MAX_BANK]; 129 u8 irq_stat[MAX_BANK]; 130 u8 irq_trig_raise[MAX_BANK]; 131 u8 irq_trig_fall[MAX_BANK]; 132 #endif 133 134 struct i2c_client *client; 135 struct gpio_chip gpio_chip; 136 const char *const *names; 137 unsigned long driver_data; 138 struct regulator *regulator; 139 140 const struct pca953x_reg_config *regs; 141 142 int (*write_regs)(struct pca953x_chip *, int, u8 *); 143 int (*read_regs)(struct pca953x_chip *, int, u8 *); 144 }; 145 146 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, 147 int off) 148 { 149 int ret; 150 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 151 int offset = off / BANK_SZ; 152 153 ret = i2c_smbus_read_byte_data(chip->client, 154 (reg << bank_shift) + offset); 155 *val = ret; 156 157 if (ret < 0) { 158 dev_err(&chip->client->dev, "failed reading register\n"); 159 return ret; 160 } 161 162 return 0; 163 } 164 165 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, 166 int off) 167 { 168 int ret; 169 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 170 int offset = off / BANK_SZ; 171 172 ret = i2c_smbus_write_byte_data(chip->client, 173 (reg << bank_shift) + offset, val); 174 175 if (ret < 0) { 176 dev_err(&chip->client->dev, "failed writing register\n"); 177 return ret; 178 } 179 180 return 0; 181 } 182 183 static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val) 184 { 185 return i2c_smbus_write_byte_data(chip->client, reg, *val); 186 } 187 188 static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) 189 { 190 u16 word = get_unaligned((u16 *)val); 191 192 return i2c_smbus_write_word_data(chip->client, reg << 1, word); 193 } 194 195 static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) 196 { 197 int ret; 198 199 ret = i2c_smbus_write_byte_data(chip->client, reg << 1, val[0]); 200 if (ret < 0) 201 return ret; 202 203 return i2c_smbus_write_byte_data(chip->client, (reg << 1) + 1, val[1]); 204 } 205 206 static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val) 207 { 208 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 209 210 return i2c_smbus_write_i2c_block_data(chip->client, 211 (reg << bank_shift) | REG_ADDR_AI, 212 NBANK(chip), val); 213 } 214 215 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) 216 { 217 int ret = 0; 218 219 ret = chip->write_regs(chip, reg, val); 220 if (ret < 0) { 221 dev_err(&chip->client->dev, "failed writing register\n"); 222 return ret; 223 } 224 225 return 0; 226 } 227 228 static int pca953x_read_regs_8(struct pca953x_chip *chip, int reg, u8 *val) 229 { 230 int ret; 231 232 ret = i2c_smbus_read_byte_data(chip->client, reg); 233 *val = ret; 234 235 return ret; 236 } 237 238 static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val) 239 { 240 int ret; 241 242 ret = i2c_smbus_read_word_data(chip->client, reg << 1); 243 put_unaligned(ret, (u16 *)val); 244 245 return ret; 246 } 247 248 static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val) 249 { 250 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 251 252 return i2c_smbus_read_i2c_block_data(chip->client, 253 (reg << bank_shift) | REG_ADDR_AI, 254 NBANK(chip), val); 255 } 256 257 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) 258 { 259 int ret; 260 261 ret = chip->read_regs(chip, reg, val); 262 if (ret < 0) { 263 dev_err(&chip->client->dev, "failed reading register\n"); 264 return ret; 265 } 266 267 return 0; 268 } 269 270 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) 271 { 272 struct pca953x_chip *chip = gpiochip_get_data(gc); 273 u8 reg_val; 274 int ret; 275 276 mutex_lock(&chip->i2c_lock); 277 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ)); 278 279 ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off); 280 if (ret) 281 goto exit; 282 283 chip->reg_direction[off / BANK_SZ] = reg_val; 284 exit: 285 mutex_unlock(&chip->i2c_lock); 286 return ret; 287 } 288 289 static int pca953x_gpio_direction_output(struct gpio_chip *gc, 290 unsigned off, int val) 291 { 292 struct pca953x_chip *chip = gpiochip_get_data(gc); 293 u8 reg_val; 294 int ret; 295 296 mutex_lock(&chip->i2c_lock); 297 /* set output level */ 298 if (val) 299 reg_val = chip->reg_output[off / BANK_SZ] 300 | (1u << (off % BANK_SZ)); 301 else 302 reg_val = chip->reg_output[off / BANK_SZ] 303 & ~(1u << (off % BANK_SZ)); 304 305 ret = pca953x_write_single(chip, chip->regs->output, reg_val, off); 306 if (ret) 307 goto exit; 308 309 chip->reg_output[off / BANK_SZ] = reg_val; 310 311 /* then direction */ 312 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ)); 313 ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off); 314 if (ret) 315 goto exit; 316 317 chip->reg_direction[off / BANK_SZ] = reg_val; 318 exit: 319 mutex_unlock(&chip->i2c_lock); 320 return ret; 321 } 322 323 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) 324 { 325 struct pca953x_chip *chip = gpiochip_get_data(gc); 326 u32 reg_val; 327 int ret; 328 329 mutex_lock(&chip->i2c_lock); 330 ret = pca953x_read_single(chip, chip->regs->input, ®_val, off); 331 mutex_unlock(&chip->i2c_lock); 332 if (ret < 0) { 333 /* NOTE: diagnostic already emitted; that's all we should 334 * do unless gpio_*_value_cansleep() calls become different 335 * from their nonsleeping siblings (and report faults). 336 */ 337 return 0; 338 } 339 340 return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0; 341 } 342 343 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) 344 { 345 struct pca953x_chip *chip = gpiochip_get_data(gc); 346 u8 reg_val; 347 int ret; 348 349 mutex_lock(&chip->i2c_lock); 350 if (val) 351 reg_val = chip->reg_output[off / BANK_SZ] 352 | (1u << (off % BANK_SZ)); 353 else 354 reg_val = chip->reg_output[off / BANK_SZ] 355 & ~(1u << (off % BANK_SZ)); 356 357 ret = pca953x_write_single(chip, chip->regs->output, reg_val, off); 358 if (ret) 359 goto exit; 360 361 chip->reg_output[off / BANK_SZ] = reg_val; 362 exit: 363 mutex_unlock(&chip->i2c_lock); 364 } 365 366 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off) 367 { 368 struct pca953x_chip *chip = gpiochip_get_data(gc); 369 u32 reg_val; 370 int ret; 371 372 mutex_lock(&chip->i2c_lock); 373 ret = pca953x_read_single(chip, chip->regs->direction, ®_val, off); 374 mutex_unlock(&chip->i2c_lock); 375 if (ret < 0) 376 return ret; 377 378 return !!(reg_val & (1u << (off % BANK_SZ))); 379 } 380 381 static void pca953x_gpio_set_multiple(struct gpio_chip *gc, 382 unsigned long *mask, unsigned long *bits) 383 { 384 struct pca953x_chip *chip = gpiochip_get_data(gc); 385 unsigned int bank_mask, bank_val; 386 int bank_shift, bank; 387 u8 reg_val[MAX_BANK]; 388 int ret; 389 390 bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 391 392 mutex_lock(&chip->i2c_lock); 393 memcpy(reg_val, chip->reg_output, NBANK(chip)); 394 for (bank = 0; bank < NBANK(chip); bank++) { 395 bank_mask = mask[bank / sizeof(*mask)] >> 396 ((bank % sizeof(*mask)) * 8); 397 if (bank_mask) { 398 bank_val = bits[bank / sizeof(*bits)] >> 399 ((bank % sizeof(*bits)) * 8); 400 bank_val &= bank_mask; 401 reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val; 402 } 403 } 404 405 ret = i2c_smbus_write_i2c_block_data(chip->client, 406 chip->regs->output << bank_shift, 407 NBANK(chip), reg_val); 408 if (ret) 409 goto exit; 410 411 memcpy(chip->reg_output, reg_val, NBANK(chip)); 412 exit: 413 mutex_unlock(&chip->i2c_lock); 414 } 415 416 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) 417 { 418 struct gpio_chip *gc; 419 420 gc = &chip->gpio_chip; 421 422 gc->direction_input = pca953x_gpio_direction_input; 423 gc->direction_output = pca953x_gpio_direction_output; 424 gc->get = pca953x_gpio_get_value; 425 gc->set = pca953x_gpio_set_value; 426 gc->get_direction = pca953x_gpio_get_direction; 427 gc->set_multiple = pca953x_gpio_set_multiple; 428 gc->can_sleep = true; 429 430 gc->base = chip->gpio_start; 431 gc->ngpio = gpios; 432 gc->label = chip->client->name; 433 gc->parent = &chip->client->dev; 434 gc->owner = THIS_MODULE; 435 gc->names = chip->names; 436 } 437 438 #ifdef CONFIG_GPIO_PCA953X_IRQ 439 static void pca953x_irq_mask(struct irq_data *d) 440 { 441 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 442 struct pca953x_chip *chip = gpiochip_get_data(gc); 443 444 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ)); 445 } 446 447 static void pca953x_irq_unmask(struct irq_data *d) 448 { 449 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 450 struct pca953x_chip *chip = gpiochip_get_data(gc); 451 452 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ); 453 } 454 455 static void pca953x_irq_bus_lock(struct irq_data *d) 456 { 457 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 458 struct pca953x_chip *chip = gpiochip_get_data(gc); 459 460 mutex_lock(&chip->irq_lock); 461 } 462 463 static void pca953x_irq_bus_sync_unlock(struct irq_data *d) 464 { 465 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 466 struct pca953x_chip *chip = gpiochip_get_data(gc); 467 u8 new_irqs; 468 int level, i; 469 u8 invert_irq_mask[MAX_BANK]; 470 471 if (chip->driver_data & PCA_PCAL) { 472 /* Enable latch on interrupt-enabled inputs */ 473 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask); 474 475 for (i = 0; i < NBANK(chip); i++) 476 invert_irq_mask[i] = ~chip->irq_mask[i]; 477 478 /* Unmask enabled interrupts */ 479 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask); 480 } 481 482 /* Look for any newly setup interrupt */ 483 for (i = 0; i < NBANK(chip); i++) { 484 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i]; 485 new_irqs &= ~chip->reg_direction[i]; 486 487 while (new_irqs) { 488 level = __ffs(new_irqs); 489 pca953x_gpio_direction_input(&chip->gpio_chip, 490 level + (BANK_SZ * i)); 491 new_irqs &= ~(1 << level); 492 } 493 } 494 495 mutex_unlock(&chip->irq_lock); 496 } 497 498 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type) 499 { 500 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 501 struct pca953x_chip *chip = gpiochip_get_data(gc); 502 int bank_nb = d->hwirq / BANK_SZ; 503 u8 mask = 1 << (d->hwirq % BANK_SZ); 504 505 if (!(type & IRQ_TYPE_EDGE_BOTH)) { 506 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", 507 d->irq, type); 508 return -EINVAL; 509 } 510 511 if (type & IRQ_TYPE_EDGE_FALLING) 512 chip->irq_trig_fall[bank_nb] |= mask; 513 else 514 chip->irq_trig_fall[bank_nb] &= ~mask; 515 516 if (type & IRQ_TYPE_EDGE_RISING) 517 chip->irq_trig_raise[bank_nb] |= mask; 518 else 519 chip->irq_trig_raise[bank_nb] &= ~mask; 520 521 return 0; 522 } 523 524 static struct irq_chip pca953x_irq_chip = { 525 .name = "pca953x", 526 .irq_mask = pca953x_irq_mask, 527 .irq_unmask = pca953x_irq_unmask, 528 .irq_bus_lock = pca953x_irq_bus_lock, 529 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock, 530 .irq_set_type = pca953x_irq_set_type, 531 }; 532 533 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) 534 { 535 u8 cur_stat[MAX_BANK]; 536 u8 old_stat[MAX_BANK]; 537 bool pending_seen = false; 538 bool trigger_seen = false; 539 u8 trigger[MAX_BANK]; 540 int ret, i; 541 542 if (chip->driver_data & PCA_PCAL) { 543 /* Read the current interrupt status from the device */ 544 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger); 545 if (ret) 546 return false; 547 548 /* Check latched inputs and clear interrupt status */ 549 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat); 550 if (ret) 551 return false; 552 553 for (i = 0; i < NBANK(chip); i++) { 554 /* Apply filter for rising/falling edge selection */ 555 pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) | 556 (cur_stat[i] & chip->irq_trig_raise[i]); 557 pending[i] &= trigger[i]; 558 if (pending[i]) 559 pending_seen = true; 560 } 561 562 return pending_seen; 563 } 564 565 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat); 566 if (ret) 567 return false; 568 569 /* Remove output pins from the equation */ 570 for (i = 0; i < NBANK(chip); i++) 571 cur_stat[i] &= chip->reg_direction[i]; 572 573 memcpy(old_stat, chip->irq_stat, NBANK(chip)); 574 575 for (i = 0; i < NBANK(chip); i++) { 576 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i]; 577 if (trigger[i]) 578 trigger_seen = true; 579 } 580 581 if (!trigger_seen) 582 return false; 583 584 memcpy(chip->irq_stat, cur_stat, NBANK(chip)); 585 586 for (i = 0; i < NBANK(chip); i++) { 587 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) | 588 (cur_stat[i] & chip->irq_trig_raise[i]); 589 pending[i] &= trigger[i]; 590 if (pending[i]) 591 pending_seen = true; 592 } 593 594 return pending_seen; 595 } 596 597 static irqreturn_t pca953x_irq_handler(int irq, void *devid) 598 { 599 struct pca953x_chip *chip = devid; 600 u8 pending[MAX_BANK]; 601 u8 level; 602 unsigned nhandled = 0; 603 int i; 604 605 if (!pca953x_irq_pending(chip, pending)) 606 return IRQ_NONE; 607 608 for (i = 0; i < NBANK(chip); i++) { 609 while (pending[i]) { 610 level = __ffs(pending[i]); 611 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain, 612 level + (BANK_SZ * i))); 613 pending[i] &= ~(1 << level); 614 nhandled++; 615 } 616 } 617 618 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE; 619 } 620 621 static int pca953x_irq_setup(struct pca953x_chip *chip, 622 int irq_base) 623 { 624 struct i2c_client *client = chip->client; 625 int ret, i; 626 627 if (client->irq && irq_base != -1 628 && (chip->driver_data & PCA_INT)) { 629 ret = pca953x_read_regs(chip, 630 chip->regs->input, chip->irq_stat); 631 if (ret) 632 return ret; 633 634 /* 635 * There is no way to know which GPIO line generated the 636 * interrupt. We have to rely on the previous read for 637 * this purpose. 638 */ 639 for (i = 0; i < NBANK(chip); i++) 640 chip->irq_stat[i] &= chip->reg_direction[i]; 641 mutex_init(&chip->irq_lock); 642 643 ret = devm_request_threaded_irq(&client->dev, 644 client->irq, 645 NULL, 646 pca953x_irq_handler, 647 IRQF_TRIGGER_LOW | IRQF_ONESHOT | 648 IRQF_SHARED, 649 dev_name(&client->dev), chip); 650 if (ret) { 651 dev_err(&client->dev, "failed to request irq %d\n", 652 client->irq); 653 return ret; 654 } 655 656 ret = gpiochip_irqchip_add_nested(&chip->gpio_chip, 657 &pca953x_irq_chip, 658 irq_base, 659 handle_simple_irq, 660 IRQ_TYPE_NONE); 661 if (ret) { 662 dev_err(&client->dev, 663 "could not connect irqchip to gpiochip\n"); 664 return ret; 665 } 666 667 gpiochip_set_nested_irqchip(&chip->gpio_chip, 668 &pca953x_irq_chip, 669 client->irq); 670 } 671 672 return 0; 673 } 674 675 #else /* CONFIG_GPIO_PCA953X_IRQ */ 676 static int pca953x_irq_setup(struct pca953x_chip *chip, 677 int irq_base) 678 { 679 struct i2c_client *client = chip->client; 680 681 if (irq_base != -1 && (chip->driver_data & PCA_INT)) 682 dev_warn(&client->dev, "interrupt support not compiled in\n"); 683 684 return 0; 685 } 686 #endif 687 688 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) 689 { 690 int ret; 691 u8 val[MAX_BANK]; 692 693 chip->regs = &pca953x_regs; 694 695 ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output); 696 if (ret) 697 goto out; 698 699 ret = pca953x_read_regs(chip, chip->regs->direction, 700 chip->reg_direction); 701 if (ret) 702 goto out; 703 704 /* set platform specific polarity inversion */ 705 if (invert) 706 memset(val, 0xFF, NBANK(chip)); 707 else 708 memset(val, 0, NBANK(chip)); 709 710 ret = pca953x_write_regs(chip, PCA953X_INVERT, val); 711 out: 712 return ret; 713 } 714 715 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) 716 { 717 int ret; 718 u8 val[MAX_BANK]; 719 720 chip->regs = &pca957x_regs; 721 722 ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output); 723 if (ret) 724 goto out; 725 ret = pca953x_read_regs(chip, chip->regs->direction, 726 chip->reg_direction); 727 if (ret) 728 goto out; 729 730 /* set platform specific polarity inversion */ 731 if (invert) 732 memset(val, 0xFF, NBANK(chip)); 733 else 734 memset(val, 0, NBANK(chip)); 735 ret = pca953x_write_regs(chip, PCA957X_INVRT, val); 736 if (ret) 737 goto out; 738 739 /* To enable register 6, 7 to control pull up and pull down */ 740 memset(val, 0x02, NBANK(chip)); 741 ret = pca953x_write_regs(chip, PCA957X_BKEN, val); 742 if (ret) 743 goto out; 744 745 return 0; 746 out: 747 return ret; 748 } 749 750 static const struct of_device_id pca953x_dt_ids[]; 751 752 static int pca953x_probe(struct i2c_client *client, 753 const struct i2c_device_id *i2c_id) 754 { 755 struct pca953x_platform_data *pdata; 756 struct pca953x_chip *chip; 757 int irq_base = 0; 758 int ret; 759 u32 invert = 0; 760 struct regulator *reg; 761 762 chip = devm_kzalloc(&client->dev, 763 sizeof(struct pca953x_chip), GFP_KERNEL); 764 if (chip == NULL) 765 return -ENOMEM; 766 767 pdata = dev_get_platdata(&client->dev); 768 if (pdata) { 769 irq_base = pdata->irq_base; 770 chip->gpio_start = pdata->gpio_base; 771 invert = pdata->invert; 772 chip->names = pdata->names; 773 } else { 774 struct gpio_desc *reset_gpio; 775 776 chip->gpio_start = -1; 777 irq_base = 0; 778 779 /* 780 * See if we need to de-assert a reset pin. 781 * 782 * There is no known ACPI-enabled platforms that are 783 * using "reset" GPIO. Otherwise any of those platform 784 * must use _DSD method with corresponding property. 785 */ 786 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset", 787 GPIOD_OUT_LOW); 788 if (IS_ERR(reset_gpio)) 789 return PTR_ERR(reset_gpio); 790 } 791 792 chip->client = client; 793 794 reg = devm_regulator_get(&client->dev, "vcc"); 795 if (IS_ERR(reg)) { 796 ret = PTR_ERR(reg); 797 if (ret != -EPROBE_DEFER) 798 dev_err(&client->dev, "reg get err: %d\n", ret); 799 return ret; 800 } 801 ret = regulator_enable(reg); 802 if (ret) { 803 dev_err(&client->dev, "reg en err: %d\n", ret); 804 return ret; 805 } 806 chip->regulator = reg; 807 808 if (i2c_id) { 809 chip->driver_data = i2c_id->driver_data; 810 } else { 811 const struct acpi_device_id *acpi_id; 812 const struct of_device_id *match; 813 814 match = of_match_device(pca953x_dt_ids, &client->dev); 815 if (match) { 816 chip->driver_data = (int)(uintptr_t)match->data; 817 } else { 818 acpi_id = acpi_match_device(pca953x_acpi_ids, &client->dev); 819 if (!acpi_id) { 820 ret = -ENODEV; 821 goto err_exit; 822 } 823 824 chip->driver_data = acpi_id->driver_data; 825 } 826 } 827 828 mutex_init(&chip->i2c_lock); 829 /* 830 * In case we have an i2c-mux controlled by a GPIO provided by an 831 * expander using the same driver higher on the device tree, read the 832 * i2c adapter nesting depth and use the retrieved value as lockdep 833 * subclass for chip->i2c_lock. 834 * 835 * REVISIT: This solution is not complete. It protects us from lockdep 836 * false positives when the expander controlling the i2c-mux is on 837 * a different level on the device tree, but not when it's on the same 838 * level on a different branch (in which case the subclass number 839 * would be the same). 840 * 841 * TODO: Once a correct solution is developed, a similar fix should be 842 * applied to all other i2c-controlled GPIO expanders (and potentially 843 * regmap-i2c). 844 */ 845 lockdep_set_subclass(&chip->i2c_lock, 846 i2c_adapter_depth(client->adapter)); 847 848 /* initialize cached registers from their original values. 849 * we can't share this chip with another i2c master. 850 */ 851 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK); 852 853 if (chip->gpio_chip.ngpio <= 8) { 854 chip->write_regs = pca953x_write_regs_8; 855 chip->read_regs = pca953x_read_regs_8; 856 } else if (chip->gpio_chip.ngpio >= 24) { 857 chip->write_regs = pca953x_write_regs_24; 858 chip->read_regs = pca953x_read_regs_24; 859 } else { 860 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) 861 chip->write_regs = pca953x_write_regs_16; 862 else 863 chip->write_regs = pca957x_write_regs_16; 864 chip->read_regs = pca953x_read_regs_16; 865 } 866 867 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) 868 ret = device_pca953x_init(chip, invert); 869 else 870 ret = device_pca957x_init(chip, invert); 871 if (ret) 872 goto err_exit; 873 874 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip); 875 if (ret) 876 goto err_exit; 877 878 ret = pca953x_irq_setup(chip, irq_base); 879 if (ret) 880 goto err_exit; 881 882 if (pdata && pdata->setup) { 883 ret = pdata->setup(client, chip->gpio_chip.base, 884 chip->gpio_chip.ngpio, pdata->context); 885 if (ret < 0) 886 dev_warn(&client->dev, "setup failed, %d\n", ret); 887 } 888 889 i2c_set_clientdata(client, chip); 890 return 0; 891 892 err_exit: 893 regulator_disable(chip->regulator); 894 return ret; 895 } 896 897 static int pca953x_remove(struct i2c_client *client) 898 { 899 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev); 900 struct pca953x_chip *chip = i2c_get_clientdata(client); 901 int ret; 902 903 if (pdata && pdata->teardown) { 904 ret = pdata->teardown(client, chip->gpio_chip.base, 905 chip->gpio_chip.ngpio, pdata->context); 906 if (ret < 0) 907 dev_err(&client->dev, "%s failed, %d\n", 908 "teardown", ret); 909 } else { 910 ret = 0; 911 } 912 913 regulator_disable(chip->regulator); 914 915 return ret; 916 } 917 918 /* convenience to stop overlong match-table lines */ 919 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int) 920 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int) 921 922 static const struct of_device_id pca953x_dt_ids[] = { 923 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), }, 924 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), }, 925 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), }, 926 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), }, 927 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), }, 928 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), }, 929 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), }, 930 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), }, 931 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), }, 932 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), }, 933 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), }, 934 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), }, 935 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), }, 936 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), }, 937 938 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), }, 939 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), }, 940 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), }, 941 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), }, 942 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), }, 943 944 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), }, 945 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), }, 946 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), }, 947 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), }, 948 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), }, 949 950 { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), }, 951 952 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), }, 953 { } 954 }; 955 956 MODULE_DEVICE_TABLE(of, pca953x_dt_ids); 957 958 static struct i2c_driver pca953x_driver = { 959 .driver = { 960 .name = "pca953x", 961 .of_match_table = pca953x_dt_ids, 962 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids), 963 }, 964 .probe = pca953x_probe, 965 .remove = pca953x_remove, 966 .id_table = pca953x_id, 967 }; 968 969 static int __init pca953x_init(void) 970 { 971 return i2c_add_driver(&pca953x_driver); 972 } 973 /* register after i2c postcore initcall and before 974 * subsys initcalls that may rely on these GPIOs 975 */ 976 subsys_initcall(pca953x_init); 977 978 static void __exit pca953x_exit(void) 979 { 980 i2c_del_driver(&pca953x_driver); 981 } 982 module_exit(pca953x_exit); 983 984 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>"); 985 MODULE_DESCRIPTION("GPIO expander driver for PCA953x"); 986 MODULE_LICENSE("GPL"); 987