1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * PCA953x 4/8/16/24/40 bit I/O ports 4 * 5 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com> 6 * Copyright (C) 2007 Marvell International Ltd. 7 * 8 * Derived from drivers/i2c/chips/pca9539.c 9 */ 10 11 #include <linux/acpi.h> 12 #include <linux/bitmap.h> 13 #include <linux/gpio/driver.h> 14 #include <linux/gpio/consumer.h> 15 #include <linux/i2c.h> 16 #include <linux/init.h> 17 #include <linux/interrupt.h> 18 #include <linux/module.h> 19 #include <linux/of_platform.h> 20 #include <linux/platform_data/pca953x.h> 21 #include <linux/regmap.h> 22 #include <linux/regulator/consumer.h> 23 #include <linux/slab.h> 24 25 #include <asm/unaligned.h> 26 27 #define PCA953X_INPUT 0x00 28 #define PCA953X_OUTPUT 0x01 29 #define PCA953X_INVERT 0x02 30 #define PCA953X_DIRECTION 0x03 31 32 #define REG_ADDR_MASK GENMASK(5, 0) 33 #define REG_ADDR_EXT BIT(6) 34 #define REG_ADDR_AI BIT(7) 35 36 #define PCA957X_IN 0x00 37 #define PCA957X_INVRT 0x01 38 #define PCA957X_BKEN 0x02 39 #define PCA957X_PUPD 0x03 40 #define PCA957X_CFG 0x04 41 #define PCA957X_OUT 0x05 42 #define PCA957X_MSK 0x06 43 #define PCA957X_INTS 0x07 44 45 #define PCAL953X_OUT_STRENGTH 0x20 46 #define PCAL953X_IN_LATCH 0x22 47 #define PCAL953X_PULL_EN 0x23 48 #define PCAL953X_PULL_SEL 0x24 49 #define PCAL953X_INT_MASK 0x25 50 #define PCAL953X_INT_STAT 0x26 51 #define PCAL953X_OUT_CONF 0x27 52 53 #define PCAL6524_INT_EDGE 0x28 54 #define PCAL6524_INT_CLR 0x2a 55 #define PCAL6524_IN_STATUS 0x2b 56 #define PCAL6524_OUT_INDCONF 0x2c 57 #define PCAL6524_DEBOUNCE 0x2d 58 59 #define PCA_GPIO_MASK GENMASK(7, 0) 60 61 #define PCAL_GPIO_MASK GENMASK(4, 0) 62 #define PCAL_PINCTRL_MASK GENMASK(6, 5) 63 64 #define PCA_INT BIT(8) 65 #define PCA_PCAL BIT(9) 66 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT) 67 #define PCA953X_TYPE BIT(12) 68 #define PCA957X_TYPE BIT(13) 69 #define PCA_TYPE_MASK GENMASK(15, 12) 70 71 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK) 72 73 static const struct i2c_device_id pca953x_id[] = { 74 { "pca6416", 16 | PCA953X_TYPE | PCA_INT, }, 75 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, }, 76 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, }, 77 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, }, 78 { "pca9536", 4 | PCA953X_TYPE, }, 79 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, }, 80 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, }, 81 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, }, 82 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, }, 83 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, }, 84 { "pca9556", 8 | PCA953X_TYPE, }, 85 { "pca9557", 8 | PCA953X_TYPE, }, 86 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, }, 87 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, }, 88 { "pca9698", 40 | PCA953X_TYPE, }, 89 90 { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, 91 { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, }, 92 { "pcal9535", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, 93 { "pcal9554b", 8 | PCA953X_TYPE | PCA_LATCH_INT, }, 94 { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, 95 96 { "max7310", 8 | PCA953X_TYPE, }, 97 { "max7312", 16 | PCA953X_TYPE | PCA_INT, }, 98 { "max7313", 16 | PCA953X_TYPE | PCA_INT, }, 99 { "max7315", 8 | PCA953X_TYPE | PCA_INT, }, 100 { "max7318", 16 | PCA953X_TYPE | PCA_INT, }, 101 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, }, 102 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, }, 103 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, }, 104 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, }, 105 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, }, 106 { "tca9554", 8 | PCA953X_TYPE | PCA_INT, }, 107 { "xra1202", 8 | PCA953X_TYPE }, 108 { } 109 }; 110 MODULE_DEVICE_TABLE(i2c, pca953x_id); 111 112 #ifdef CONFIG_GPIO_PCA953X_IRQ 113 114 #include <linux/dmi.h> 115 #include <linux/gpio.h> 116 #include <linux/list.h> 117 118 static const struct dmi_system_id pca953x_dmi_acpi_irq_info[] = { 119 { 120 /* 121 * On Intel Galileo Gen 2 board the IRQ pin of one of 122 * the I²C GPIO expanders, which has GpioInt() resource, 123 * is provided as an absolute number instead of being 124 * relative. Since first controller (gpio-sch.c) and 125 * second (gpio-dwapb.c) are at the fixed bases, we may 126 * safely refer to the number in the global space to get 127 * an IRQ out of it. 128 */ 129 .matches = { 130 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"), 131 }, 132 }, 133 {} 134 }; 135 136 #ifdef CONFIG_ACPI 137 static int pca953x_acpi_get_pin(struct acpi_resource *ares, void *data) 138 { 139 struct acpi_resource_gpio *agpio; 140 int *pin = data; 141 142 if (acpi_gpio_get_irq_resource(ares, &agpio)) 143 *pin = agpio->pin_table[0]; 144 return 1; 145 } 146 147 static int pca953x_acpi_find_pin(struct device *dev) 148 { 149 struct acpi_device *adev = ACPI_COMPANION(dev); 150 int pin = -ENOENT, ret; 151 LIST_HEAD(r); 152 153 ret = acpi_dev_get_resources(adev, &r, pca953x_acpi_get_pin, &pin); 154 acpi_dev_free_resource_list(&r); 155 if (ret < 0) 156 return ret; 157 158 return pin; 159 } 160 #else 161 static inline int pca953x_acpi_find_pin(struct device *dev) { return -ENXIO; } 162 #endif 163 164 static int pca953x_acpi_get_irq(struct device *dev) 165 { 166 int pin, ret; 167 168 pin = pca953x_acpi_find_pin(dev); 169 if (pin < 0) 170 return pin; 171 172 dev_info(dev, "Applying ACPI interrupt quirk (GPIO %d)\n", pin); 173 174 if (!gpio_is_valid(pin)) 175 return -EINVAL; 176 177 ret = gpio_request(pin, "pca953x interrupt"); 178 if (ret) 179 return ret; 180 181 ret = gpio_to_irq(pin); 182 183 /* When pin is used as an IRQ, no need to keep it requested */ 184 gpio_free(pin); 185 186 return ret; 187 } 188 #endif 189 190 static const struct acpi_device_id pca953x_acpi_ids[] = { 191 { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, 192 { } 193 }; 194 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids); 195 196 #define MAX_BANK 5 197 #define BANK_SZ 8 198 #define MAX_LINE (MAX_BANK * BANK_SZ) 199 200 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ) 201 202 struct pca953x_reg_config { 203 int direction; 204 int output; 205 int input; 206 int invert; 207 }; 208 209 static const struct pca953x_reg_config pca953x_regs = { 210 .direction = PCA953X_DIRECTION, 211 .output = PCA953X_OUTPUT, 212 .input = PCA953X_INPUT, 213 .invert = PCA953X_INVERT, 214 }; 215 216 static const struct pca953x_reg_config pca957x_regs = { 217 .direction = PCA957X_CFG, 218 .output = PCA957X_OUT, 219 .input = PCA957X_IN, 220 .invert = PCA957X_INVRT, 221 }; 222 223 struct pca953x_chip { 224 unsigned gpio_start; 225 struct mutex i2c_lock; 226 struct regmap *regmap; 227 228 #ifdef CONFIG_GPIO_PCA953X_IRQ 229 struct mutex irq_lock; 230 DECLARE_BITMAP(irq_mask, MAX_LINE); 231 DECLARE_BITMAP(irq_stat, MAX_LINE); 232 DECLARE_BITMAP(irq_trig_raise, MAX_LINE); 233 DECLARE_BITMAP(irq_trig_fall, MAX_LINE); 234 struct irq_chip irq_chip; 235 #endif 236 atomic_t wakeup_path; 237 238 struct i2c_client *client; 239 struct gpio_chip gpio_chip; 240 const char *const *names; 241 unsigned long driver_data; 242 struct regulator *regulator; 243 244 const struct pca953x_reg_config *regs; 245 }; 246 247 static int pca953x_bank_shift(struct pca953x_chip *chip) 248 { 249 return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 250 } 251 252 #define PCA953x_BANK_INPUT BIT(0) 253 #define PCA953x_BANK_OUTPUT BIT(1) 254 #define PCA953x_BANK_POLARITY BIT(2) 255 #define PCA953x_BANK_CONFIG BIT(3) 256 257 #define PCA957x_BANK_INPUT BIT(0) 258 #define PCA957x_BANK_POLARITY BIT(1) 259 #define PCA957x_BANK_BUSHOLD BIT(2) 260 #define PCA957x_BANK_CONFIG BIT(4) 261 #define PCA957x_BANK_OUTPUT BIT(5) 262 263 #define PCAL9xxx_BANK_IN_LATCH BIT(8 + 2) 264 #define PCAL9xxx_BANK_PULL_EN BIT(8 + 3) 265 #define PCAL9xxx_BANK_PULL_SEL BIT(8 + 4) 266 #define PCAL9xxx_BANK_IRQ_MASK BIT(8 + 5) 267 #define PCAL9xxx_BANK_IRQ_STAT BIT(8 + 6) 268 269 /* 270 * We care about the following registers: 271 * - Standard set, below 0x40, each port can be replicated up to 8 times 272 * - PCA953x standard 273 * Input port 0x00 + 0 * bank_size R 274 * Output port 0x00 + 1 * bank_size RW 275 * Polarity Inversion port 0x00 + 2 * bank_size RW 276 * Configuration port 0x00 + 3 * bank_size RW 277 * - PCA957x with mixed up registers 278 * Input port 0x00 + 0 * bank_size R 279 * Polarity Inversion port 0x00 + 1 * bank_size RW 280 * Bus hold port 0x00 + 2 * bank_size RW 281 * Configuration port 0x00 + 4 * bank_size RW 282 * Output port 0x00 + 5 * bank_size RW 283 * 284 * - Extended set, above 0x40, often chip specific. 285 * - PCAL6524/PCAL9555A with custom PCAL IRQ handling: 286 * Input latch register 0x40 + 2 * bank_size RW 287 * Pull-up/pull-down enable reg 0x40 + 3 * bank_size RW 288 * Pull-up/pull-down select reg 0x40 + 4 * bank_size RW 289 * Interrupt mask register 0x40 + 5 * bank_size RW 290 * Interrupt status register 0x40 + 6 * bank_size R 291 * 292 * - Registers with bit 0x80 set, the AI bit 293 * The bit is cleared and the registers fall into one of the 294 * categories above. 295 */ 296 297 static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg, 298 u32 checkbank) 299 { 300 int bank_shift = pca953x_bank_shift(chip); 301 int bank = (reg & REG_ADDR_MASK) >> bank_shift; 302 int offset = reg & (BIT(bank_shift) - 1); 303 304 /* Special PCAL extended register check. */ 305 if (reg & REG_ADDR_EXT) { 306 if (!(chip->driver_data & PCA_PCAL)) 307 return false; 308 bank += 8; 309 } 310 311 /* Register is not in the matching bank. */ 312 if (!(BIT(bank) & checkbank)) 313 return false; 314 315 /* Register is not within allowed range of bank. */ 316 if (offset >= NBANK(chip)) 317 return false; 318 319 return true; 320 } 321 322 static bool pca953x_readable_register(struct device *dev, unsigned int reg) 323 { 324 struct pca953x_chip *chip = dev_get_drvdata(dev); 325 u32 bank; 326 327 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { 328 bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT | 329 PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG; 330 } else { 331 bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT | 332 PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG | 333 PCA957x_BANK_BUSHOLD; 334 } 335 336 if (chip->driver_data & PCA_PCAL) { 337 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN | 338 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK | 339 PCAL9xxx_BANK_IRQ_STAT; 340 } 341 342 return pca953x_check_register(chip, reg, bank); 343 } 344 345 static bool pca953x_writeable_register(struct device *dev, unsigned int reg) 346 { 347 struct pca953x_chip *chip = dev_get_drvdata(dev); 348 u32 bank; 349 350 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { 351 bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY | 352 PCA953x_BANK_CONFIG; 353 } else { 354 bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY | 355 PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD; 356 } 357 358 if (chip->driver_data & PCA_PCAL) 359 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN | 360 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK; 361 362 return pca953x_check_register(chip, reg, bank); 363 } 364 365 static bool pca953x_volatile_register(struct device *dev, unsigned int reg) 366 { 367 struct pca953x_chip *chip = dev_get_drvdata(dev); 368 u32 bank; 369 370 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) 371 bank = PCA953x_BANK_INPUT; 372 else 373 bank = PCA957x_BANK_INPUT; 374 375 if (chip->driver_data & PCA_PCAL) 376 bank |= PCAL9xxx_BANK_IRQ_STAT; 377 378 return pca953x_check_register(chip, reg, bank); 379 } 380 381 static const struct regmap_config pca953x_i2c_regmap = { 382 .reg_bits = 8, 383 .val_bits = 8, 384 385 .readable_reg = pca953x_readable_register, 386 .writeable_reg = pca953x_writeable_register, 387 .volatile_reg = pca953x_volatile_register, 388 389 .disable_locking = true, 390 .cache_type = REGCACHE_RBTREE, 391 .max_register = 0x7f, 392 }; 393 394 static const struct regmap_config pca953x_ai_i2c_regmap = { 395 .reg_bits = 8, 396 .val_bits = 8, 397 398 .read_flag_mask = REG_ADDR_AI, 399 .write_flag_mask = REG_ADDR_AI, 400 401 .readable_reg = pca953x_readable_register, 402 .writeable_reg = pca953x_writeable_register, 403 .volatile_reg = pca953x_volatile_register, 404 405 .disable_locking = true, 406 .cache_type = REGCACHE_RBTREE, 407 .max_register = 0x7f, 408 }; 409 410 static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off) 411 { 412 int bank_shift = pca953x_bank_shift(chip); 413 int addr = (reg & PCAL_GPIO_MASK) << bank_shift; 414 int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; 415 u8 regaddr = pinctrl | addr | (off / BANK_SZ); 416 417 return regaddr; 418 } 419 420 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, unsigned long *val) 421 { 422 u8 regaddr = pca953x_recalc_addr(chip, reg, 0); 423 u8 value[MAX_BANK]; 424 int i, ret; 425 426 for (i = 0; i < NBANK(chip); i++) 427 value[i] = bitmap_get_value8(val, i * BANK_SZ); 428 429 ret = regmap_bulk_write(chip->regmap, regaddr, value, NBANK(chip)); 430 if (ret < 0) { 431 dev_err(&chip->client->dev, "failed writing register\n"); 432 return ret; 433 } 434 435 return 0; 436 } 437 438 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, unsigned long *val) 439 { 440 u8 regaddr = pca953x_recalc_addr(chip, reg, 0); 441 u8 value[MAX_BANK]; 442 int i, ret; 443 444 ret = regmap_bulk_read(chip->regmap, regaddr, value, NBANK(chip)); 445 if (ret < 0) { 446 dev_err(&chip->client->dev, "failed reading register\n"); 447 return ret; 448 } 449 450 for (i = 0; i < NBANK(chip); i++) 451 bitmap_set_value8(val, value[i], i * BANK_SZ); 452 453 return 0; 454 } 455 456 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) 457 { 458 struct pca953x_chip *chip = gpiochip_get_data(gc); 459 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off); 460 u8 bit = BIT(off % BANK_SZ); 461 int ret; 462 463 mutex_lock(&chip->i2c_lock); 464 ret = regmap_write_bits(chip->regmap, dirreg, bit, bit); 465 mutex_unlock(&chip->i2c_lock); 466 return ret; 467 } 468 469 static int pca953x_gpio_direction_output(struct gpio_chip *gc, 470 unsigned off, int val) 471 { 472 struct pca953x_chip *chip = gpiochip_get_data(gc); 473 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off); 474 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off); 475 u8 bit = BIT(off % BANK_SZ); 476 int ret; 477 478 mutex_lock(&chip->i2c_lock); 479 /* set output level */ 480 ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0); 481 if (ret) 482 goto exit; 483 484 /* then direction */ 485 ret = regmap_write_bits(chip->regmap, dirreg, bit, 0); 486 exit: 487 mutex_unlock(&chip->i2c_lock); 488 return ret; 489 } 490 491 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) 492 { 493 struct pca953x_chip *chip = gpiochip_get_data(gc); 494 u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off); 495 u8 bit = BIT(off % BANK_SZ); 496 u32 reg_val; 497 int ret; 498 499 mutex_lock(&chip->i2c_lock); 500 ret = regmap_read(chip->regmap, inreg, ®_val); 501 mutex_unlock(&chip->i2c_lock); 502 if (ret < 0) { 503 /* 504 * NOTE: 505 * diagnostic already emitted; that's all we should 506 * do unless gpio_*_value_cansleep() calls become different 507 * from their nonsleeping siblings (and report faults). 508 */ 509 return 0; 510 } 511 512 return !!(reg_val & bit); 513 } 514 515 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) 516 { 517 struct pca953x_chip *chip = gpiochip_get_data(gc); 518 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off); 519 u8 bit = BIT(off % BANK_SZ); 520 521 mutex_lock(&chip->i2c_lock); 522 regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0); 523 mutex_unlock(&chip->i2c_lock); 524 } 525 526 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off) 527 { 528 struct pca953x_chip *chip = gpiochip_get_data(gc); 529 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off); 530 u8 bit = BIT(off % BANK_SZ); 531 u32 reg_val; 532 int ret; 533 534 mutex_lock(&chip->i2c_lock); 535 ret = regmap_read(chip->regmap, dirreg, ®_val); 536 mutex_unlock(&chip->i2c_lock); 537 if (ret < 0) 538 return ret; 539 540 if (reg_val & bit) 541 return GPIO_LINE_DIRECTION_IN; 542 543 return GPIO_LINE_DIRECTION_OUT; 544 } 545 546 static int pca953x_gpio_get_multiple(struct gpio_chip *gc, 547 unsigned long *mask, unsigned long *bits) 548 { 549 struct pca953x_chip *chip = gpiochip_get_data(gc); 550 DECLARE_BITMAP(reg_val, MAX_LINE); 551 int ret; 552 553 mutex_lock(&chip->i2c_lock); 554 ret = pca953x_read_regs(chip, chip->regs->input, reg_val); 555 mutex_unlock(&chip->i2c_lock); 556 if (ret) 557 return ret; 558 559 bitmap_replace(bits, bits, reg_val, mask, gc->ngpio); 560 return 0; 561 } 562 563 static void pca953x_gpio_set_multiple(struct gpio_chip *gc, 564 unsigned long *mask, unsigned long *bits) 565 { 566 struct pca953x_chip *chip = gpiochip_get_data(gc); 567 DECLARE_BITMAP(reg_val, MAX_LINE); 568 int ret; 569 570 mutex_lock(&chip->i2c_lock); 571 ret = pca953x_read_regs(chip, chip->regs->output, reg_val); 572 if (ret) 573 goto exit; 574 575 bitmap_replace(reg_val, reg_val, bits, mask, gc->ngpio); 576 577 pca953x_write_regs(chip, chip->regs->output, reg_val); 578 exit: 579 mutex_unlock(&chip->i2c_lock); 580 } 581 582 static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip, 583 unsigned int offset, 584 unsigned long config) 585 { 586 u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset); 587 u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset); 588 u8 bit = BIT(offset % BANK_SZ); 589 int ret; 590 591 /* 592 * pull-up/pull-down configuration requires PCAL extended 593 * registers 594 */ 595 if (!(chip->driver_data & PCA_PCAL)) 596 return -ENOTSUPP; 597 598 mutex_lock(&chip->i2c_lock); 599 600 /* Disable pull-up/pull-down */ 601 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0); 602 if (ret) 603 goto exit; 604 605 /* Configure pull-up/pull-down */ 606 if (config == PIN_CONFIG_BIAS_PULL_UP) 607 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit); 608 else if (config == PIN_CONFIG_BIAS_PULL_DOWN) 609 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0); 610 if (ret) 611 goto exit; 612 613 /* Enable pull-up/pull-down */ 614 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit); 615 616 exit: 617 mutex_unlock(&chip->i2c_lock); 618 return ret; 619 } 620 621 static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset, 622 unsigned long config) 623 { 624 struct pca953x_chip *chip = gpiochip_get_data(gc); 625 626 switch (pinconf_to_config_param(config)) { 627 case PIN_CONFIG_BIAS_PULL_UP: 628 case PIN_CONFIG_BIAS_PULL_DOWN: 629 return pca953x_gpio_set_pull_up_down(chip, offset, config); 630 default: 631 return -ENOTSUPP; 632 } 633 } 634 635 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) 636 { 637 struct gpio_chip *gc; 638 639 gc = &chip->gpio_chip; 640 641 gc->direction_input = pca953x_gpio_direction_input; 642 gc->direction_output = pca953x_gpio_direction_output; 643 gc->get = pca953x_gpio_get_value; 644 gc->set = pca953x_gpio_set_value; 645 gc->get_direction = pca953x_gpio_get_direction; 646 gc->get_multiple = pca953x_gpio_get_multiple; 647 gc->set_multiple = pca953x_gpio_set_multiple; 648 gc->set_config = pca953x_gpio_set_config; 649 gc->can_sleep = true; 650 651 gc->base = chip->gpio_start; 652 gc->ngpio = gpios; 653 gc->label = dev_name(&chip->client->dev); 654 gc->parent = &chip->client->dev; 655 gc->owner = THIS_MODULE; 656 gc->names = chip->names; 657 } 658 659 #ifdef CONFIG_GPIO_PCA953X_IRQ 660 static void pca953x_irq_mask(struct irq_data *d) 661 { 662 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 663 struct pca953x_chip *chip = gpiochip_get_data(gc); 664 irq_hw_number_t hwirq = irqd_to_hwirq(d); 665 666 clear_bit(hwirq, chip->irq_mask); 667 } 668 669 static void pca953x_irq_unmask(struct irq_data *d) 670 { 671 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 672 struct pca953x_chip *chip = gpiochip_get_data(gc); 673 irq_hw_number_t hwirq = irqd_to_hwirq(d); 674 675 set_bit(hwirq, chip->irq_mask); 676 } 677 678 static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on) 679 { 680 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 681 struct pca953x_chip *chip = gpiochip_get_data(gc); 682 683 if (on) 684 atomic_inc(&chip->wakeup_path); 685 else 686 atomic_dec(&chip->wakeup_path); 687 688 return irq_set_irq_wake(chip->client->irq, on); 689 } 690 691 static void pca953x_irq_bus_lock(struct irq_data *d) 692 { 693 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 694 struct pca953x_chip *chip = gpiochip_get_data(gc); 695 696 mutex_lock(&chip->irq_lock); 697 } 698 699 static void pca953x_irq_bus_sync_unlock(struct irq_data *d) 700 { 701 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 702 struct pca953x_chip *chip = gpiochip_get_data(gc); 703 DECLARE_BITMAP(irq_mask, MAX_LINE); 704 DECLARE_BITMAP(reg_direction, MAX_LINE); 705 int level; 706 707 if (chip->driver_data & PCA_PCAL) { 708 /* Enable latch on interrupt-enabled inputs */ 709 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask); 710 711 bitmap_complement(irq_mask, chip->irq_mask, gc->ngpio); 712 713 /* Unmask enabled interrupts */ 714 pca953x_write_regs(chip, PCAL953X_INT_MASK, irq_mask); 715 } 716 717 /* Switch direction to input if needed */ 718 pca953x_read_regs(chip, chip->regs->direction, reg_direction); 719 720 bitmap_or(irq_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio); 721 bitmap_complement(reg_direction, reg_direction, gc->ngpio); 722 bitmap_and(irq_mask, irq_mask, reg_direction, gc->ngpio); 723 724 /* Look for any newly setup interrupt */ 725 for_each_set_bit(level, irq_mask, gc->ngpio) 726 pca953x_gpio_direction_input(&chip->gpio_chip, level); 727 728 mutex_unlock(&chip->irq_lock); 729 } 730 731 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type) 732 { 733 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 734 struct pca953x_chip *chip = gpiochip_get_data(gc); 735 irq_hw_number_t hwirq = irqd_to_hwirq(d); 736 737 if (!(type & IRQ_TYPE_EDGE_BOTH)) { 738 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", 739 d->irq, type); 740 return -EINVAL; 741 } 742 743 assign_bit(hwirq, chip->irq_trig_fall, type & IRQ_TYPE_EDGE_FALLING); 744 assign_bit(hwirq, chip->irq_trig_raise, type & IRQ_TYPE_EDGE_RISING); 745 746 return 0; 747 } 748 749 static void pca953x_irq_shutdown(struct irq_data *d) 750 { 751 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 752 struct pca953x_chip *chip = gpiochip_get_data(gc); 753 irq_hw_number_t hwirq = irqd_to_hwirq(d); 754 755 clear_bit(hwirq, chip->irq_trig_raise); 756 clear_bit(hwirq, chip->irq_trig_fall); 757 } 758 759 static bool pca953x_irq_pending(struct pca953x_chip *chip, unsigned long *pending) 760 { 761 struct gpio_chip *gc = &chip->gpio_chip; 762 DECLARE_BITMAP(reg_direction, MAX_LINE); 763 DECLARE_BITMAP(old_stat, MAX_LINE); 764 DECLARE_BITMAP(cur_stat, MAX_LINE); 765 DECLARE_BITMAP(new_stat, MAX_LINE); 766 DECLARE_BITMAP(trigger, MAX_LINE); 767 int ret; 768 769 if (chip->driver_data & PCA_PCAL) { 770 /* Read the current interrupt status from the device */ 771 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger); 772 if (ret) 773 return false; 774 775 /* Check latched inputs and clear interrupt status */ 776 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat); 777 if (ret) 778 return false; 779 780 /* Apply filter for rising/falling edge selection */ 781 bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise, cur_stat, gc->ngpio); 782 783 bitmap_and(pending, new_stat, trigger, gc->ngpio); 784 785 return !bitmap_empty(pending, gc->ngpio); 786 } 787 788 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat); 789 if (ret) 790 return false; 791 792 /* Remove output pins from the equation */ 793 pca953x_read_regs(chip, chip->regs->direction, reg_direction); 794 795 bitmap_copy(old_stat, chip->irq_stat, gc->ngpio); 796 797 bitmap_and(new_stat, cur_stat, reg_direction, gc->ngpio); 798 bitmap_xor(cur_stat, new_stat, old_stat, gc->ngpio); 799 bitmap_and(trigger, cur_stat, chip->irq_mask, gc->ngpio); 800 801 if (bitmap_empty(trigger, gc->ngpio)) 802 return false; 803 804 bitmap_copy(chip->irq_stat, new_stat, gc->ngpio); 805 806 bitmap_and(cur_stat, chip->irq_trig_fall, old_stat, gc->ngpio); 807 bitmap_and(old_stat, chip->irq_trig_raise, new_stat, gc->ngpio); 808 bitmap_or(new_stat, old_stat, cur_stat, gc->ngpio); 809 bitmap_and(pending, new_stat, trigger, gc->ngpio); 810 811 return !bitmap_empty(pending, gc->ngpio); 812 } 813 814 static irqreturn_t pca953x_irq_handler(int irq, void *devid) 815 { 816 struct pca953x_chip *chip = devid; 817 struct gpio_chip *gc = &chip->gpio_chip; 818 DECLARE_BITMAP(pending, MAX_LINE); 819 int level; 820 bool ret; 821 822 bitmap_zero(pending, MAX_LINE); 823 824 mutex_lock(&chip->i2c_lock); 825 ret = pca953x_irq_pending(chip, pending); 826 mutex_unlock(&chip->i2c_lock); 827 828 if (ret) { 829 ret = 0; 830 831 for_each_set_bit(level, pending, gc->ngpio) { 832 int nested_irq = irq_find_mapping(gc->irq.domain, level); 833 834 if (unlikely(nested_irq <= 0)) { 835 dev_warn_ratelimited(gc->parent, "unmapped interrupt %d\n", level); 836 continue; 837 } 838 839 handle_nested_irq(nested_irq); 840 ret = 1; 841 } 842 } 843 844 return IRQ_RETVAL(ret); 845 } 846 847 static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base) 848 { 849 struct i2c_client *client = chip->client; 850 struct irq_chip *irq_chip = &chip->irq_chip; 851 DECLARE_BITMAP(reg_direction, MAX_LINE); 852 DECLARE_BITMAP(irq_stat, MAX_LINE); 853 struct gpio_irq_chip *girq; 854 int ret; 855 856 if (dmi_first_match(pca953x_dmi_acpi_irq_info)) { 857 ret = pca953x_acpi_get_irq(&client->dev); 858 if (ret > 0) 859 client->irq = ret; 860 } 861 862 if (!client->irq) 863 return 0; 864 865 if (irq_base == -1) 866 return 0; 867 868 if (!(chip->driver_data & PCA_INT)) 869 return 0; 870 871 ret = pca953x_read_regs(chip, chip->regs->input, irq_stat); 872 if (ret) 873 return ret; 874 875 /* 876 * There is no way to know which GPIO line generated the 877 * interrupt. We have to rely on the previous read for 878 * this purpose. 879 */ 880 pca953x_read_regs(chip, chip->regs->direction, reg_direction); 881 bitmap_and(chip->irq_stat, irq_stat, reg_direction, chip->gpio_chip.ngpio); 882 mutex_init(&chip->irq_lock); 883 884 irq_chip->name = dev_name(&client->dev); 885 irq_chip->irq_mask = pca953x_irq_mask; 886 irq_chip->irq_unmask = pca953x_irq_unmask; 887 irq_chip->irq_set_wake = pca953x_irq_set_wake; 888 irq_chip->irq_bus_lock = pca953x_irq_bus_lock; 889 irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock; 890 irq_chip->irq_set_type = pca953x_irq_set_type; 891 irq_chip->irq_shutdown = pca953x_irq_shutdown; 892 893 girq = &chip->gpio_chip.irq; 894 girq->chip = irq_chip; 895 /* This will let us handle the parent IRQ in the driver */ 896 girq->parent_handler = NULL; 897 girq->num_parents = 0; 898 girq->parents = NULL; 899 girq->default_type = IRQ_TYPE_NONE; 900 girq->handler = handle_simple_irq; 901 girq->threaded = true; 902 girq->first = irq_base; /* FIXME: get rid of this */ 903 904 ret = devm_request_threaded_irq(&client->dev, client->irq, 905 NULL, pca953x_irq_handler, 906 IRQF_ONESHOT | IRQF_SHARED, 907 dev_name(&client->dev), chip); 908 if (ret) { 909 dev_err(&client->dev, "failed to request irq %d\n", 910 client->irq); 911 return ret; 912 } 913 914 return 0; 915 } 916 917 #else /* CONFIG_GPIO_PCA953X_IRQ */ 918 static int pca953x_irq_setup(struct pca953x_chip *chip, 919 int irq_base) 920 { 921 struct i2c_client *client = chip->client; 922 923 if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT)) 924 dev_warn(&client->dev, "interrupt support not compiled in\n"); 925 926 return 0; 927 } 928 #endif 929 930 static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert) 931 { 932 DECLARE_BITMAP(val, MAX_LINE); 933 int ret; 934 935 ret = regcache_sync_region(chip->regmap, chip->regs->output, 936 chip->regs->output + NBANK(chip)); 937 if (ret) 938 goto out; 939 940 ret = regcache_sync_region(chip->regmap, chip->regs->direction, 941 chip->regs->direction + NBANK(chip)); 942 if (ret) 943 goto out; 944 945 /* set platform specific polarity inversion */ 946 if (invert) 947 bitmap_fill(val, MAX_LINE); 948 else 949 bitmap_zero(val, MAX_LINE); 950 951 ret = pca953x_write_regs(chip, chip->regs->invert, val); 952 out: 953 return ret; 954 } 955 956 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) 957 { 958 DECLARE_BITMAP(val, MAX_LINE); 959 unsigned int i; 960 int ret; 961 962 ret = device_pca95xx_init(chip, invert); 963 if (ret) 964 goto out; 965 966 /* To enable register 6, 7 to control pull up and pull down */ 967 for (i = 0; i < NBANK(chip); i++) 968 bitmap_set_value8(val, 0x02, i * BANK_SZ); 969 970 ret = pca953x_write_regs(chip, PCA957X_BKEN, val); 971 if (ret) 972 goto out; 973 974 return 0; 975 out: 976 return ret; 977 } 978 979 static int pca953x_probe(struct i2c_client *client, 980 const struct i2c_device_id *i2c_id) 981 { 982 struct pca953x_platform_data *pdata; 983 struct pca953x_chip *chip; 984 int irq_base = 0; 985 int ret; 986 u32 invert = 0; 987 struct regulator *reg; 988 const struct regmap_config *regmap_config; 989 990 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); 991 if (chip == NULL) 992 return -ENOMEM; 993 994 pdata = dev_get_platdata(&client->dev); 995 if (pdata) { 996 irq_base = pdata->irq_base; 997 chip->gpio_start = pdata->gpio_base; 998 invert = pdata->invert; 999 chip->names = pdata->names; 1000 } else { 1001 struct gpio_desc *reset_gpio; 1002 1003 chip->gpio_start = -1; 1004 irq_base = 0; 1005 1006 /* 1007 * See if we need to de-assert a reset pin. 1008 * 1009 * There is no known ACPI-enabled platforms that are 1010 * using "reset" GPIO. Otherwise any of those platform 1011 * must use _DSD method with corresponding property. 1012 */ 1013 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset", 1014 GPIOD_OUT_LOW); 1015 if (IS_ERR(reset_gpio)) 1016 return PTR_ERR(reset_gpio); 1017 } 1018 1019 chip->client = client; 1020 1021 reg = devm_regulator_get(&client->dev, "vcc"); 1022 if (IS_ERR(reg)) 1023 return dev_err_probe(&client->dev, PTR_ERR(reg), "reg get err\n"); 1024 1025 ret = regulator_enable(reg); 1026 if (ret) { 1027 dev_err(&client->dev, "reg en err: %d\n", ret); 1028 return ret; 1029 } 1030 chip->regulator = reg; 1031 1032 if (i2c_id) { 1033 chip->driver_data = i2c_id->driver_data; 1034 } else { 1035 const void *match; 1036 1037 match = device_get_match_data(&client->dev); 1038 if (!match) { 1039 ret = -ENODEV; 1040 goto err_exit; 1041 } 1042 1043 chip->driver_data = (uintptr_t)match; 1044 } 1045 1046 i2c_set_clientdata(client, chip); 1047 1048 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK); 1049 1050 if (NBANK(chip) > 2 || PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) { 1051 dev_info(&client->dev, "using AI\n"); 1052 regmap_config = &pca953x_ai_i2c_regmap; 1053 } else { 1054 dev_info(&client->dev, "using no AI\n"); 1055 regmap_config = &pca953x_i2c_regmap; 1056 } 1057 1058 chip->regmap = devm_regmap_init_i2c(client, regmap_config); 1059 if (IS_ERR(chip->regmap)) { 1060 ret = PTR_ERR(chip->regmap); 1061 goto err_exit; 1062 } 1063 1064 regcache_mark_dirty(chip->regmap); 1065 1066 mutex_init(&chip->i2c_lock); 1067 /* 1068 * In case we have an i2c-mux controlled by a GPIO provided by an 1069 * expander using the same driver higher on the device tree, read the 1070 * i2c adapter nesting depth and use the retrieved value as lockdep 1071 * subclass for chip->i2c_lock. 1072 * 1073 * REVISIT: This solution is not complete. It protects us from lockdep 1074 * false positives when the expander controlling the i2c-mux is on 1075 * a different level on the device tree, but not when it's on the same 1076 * level on a different branch (in which case the subclass number 1077 * would be the same). 1078 * 1079 * TODO: Once a correct solution is developed, a similar fix should be 1080 * applied to all other i2c-controlled GPIO expanders (and potentially 1081 * regmap-i2c). 1082 */ 1083 lockdep_set_subclass(&chip->i2c_lock, 1084 i2c_adapter_depth(client->adapter)); 1085 1086 /* initialize cached registers from their original values. 1087 * we can't share this chip with another i2c master. 1088 */ 1089 1090 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { 1091 chip->regs = &pca953x_regs; 1092 ret = device_pca95xx_init(chip, invert); 1093 } else { 1094 chip->regs = &pca957x_regs; 1095 ret = device_pca957x_init(chip, invert); 1096 } 1097 if (ret) 1098 goto err_exit; 1099 1100 ret = pca953x_irq_setup(chip, irq_base); 1101 if (ret) 1102 goto err_exit; 1103 1104 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip); 1105 if (ret) 1106 goto err_exit; 1107 1108 if (pdata && pdata->setup) { 1109 ret = pdata->setup(client, chip->gpio_chip.base, 1110 chip->gpio_chip.ngpio, pdata->context); 1111 if (ret < 0) 1112 dev_warn(&client->dev, "setup failed, %d\n", ret); 1113 } 1114 1115 return 0; 1116 1117 err_exit: 1118 regulator_disable(chip->regulator); 1119 return ret; 1120 } 1121 1122 static int pca953x_remove(struct i2c_client *client) 1123 { 1124 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev); 1125 struct pca953x_chip *chip = i2c_get_clientdata(client); 1126 int ret; 1127 1128 if (pdata && pdata->teardown) { 1129 ret = pdata->teardown(client, chip->gpio_chip.base, 1130 chip->gpio_chip.ngpio, pdata->context); 1131 if (ret < 0) 1132 dev_err(&client->dev, "teardown failed, %d\n", ret); 1133 } else { 1134 ret = 0; 1135 } 1136 1137 regulator_disable(chip->regulator); 1138 1139 return ret; 1140 } 1141 1142 #ifdef CONFIG_PM_SLEEP 1143 static int pca953x_regcache_sync(struct device *dev) 1144 { 1145 struct pca953x_chip *chip = dev_get_drvdata(dev); 1146 int ret; 1147 1148 /* 1149 * The ordering between direction and output is important, 1150 * sync these registers first and only then sync the rest. 1151 */ 1152 ret = regcache_sync_region(chip->regmap, chip->regs->direction, 1153 chip->regs->direction + NBANK(chip)); 1154 if (ret) { 1155 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret); 1156 return ret; 1157 } 1158 1159 ret = regcache_sync_region(chip->regmap, chip->regs->output, 1160 chip->regs->output + NBANK(chip)); 1161 if (ret) { 1162 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret); 1163 return ret; 1164 } 1165 1166 #ifdef CONFIG_GPIO_PCA953X_IRQ 1167 if (chip->driver_data & PCA_PCAL) { 1168 ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH, 1169 PCAL953X_IN_LATCH + NBANK(chip)); 1170 if (ret) { 1171 dev_err(dev, "Failed to sync INT latch registers: %d\n", 1172 ret); 1173 return ret; 1174 } 1175 1176 ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK, 1177 PCAL953X_INT_MASK + NBANK(chip)); 1178 if (ret) { 1179 dev_err(dev, "Failed to sync INT mask registers: %d\n", 1180 ret); 1181 return ret; 1182 } 1183 } 1184 #endif 1185 1186 return 0; 1187 } 1188 1189 static int pca953x_suspend(struct device *dev) 1190 { 1191 struct pca953x_chip *chip = dev_get_drvdata(dev); 1192 1193 regcache_cache_only(chip->regmap, true); 1194 1195 if (atomic_read(&chip->wakeup_path)) 1196 device_set_wakeup_path(dev); 1197 else 1198 regulator_disable(chip->regulator); 1199 1200 return 0; 1201 } 1202 1203 static int pca953x_resume(struct device *dev) 1204 { 1205 struct pca953x_chip *chip = dev_get_drvdata(dev); 1206 int ret; 1207 1208 if (!atomic_read(&chip->wakeup_path)) { 1209 ret = regulator_enable(chip->regulator); 1210 if (ret) { 1211 dev_err(dev, "Failed to enable regulator: %d\n", ret); 1212 return 0; 1213 } 1214 } 1215 1216 regcache_cache_only(chip->regmap, false); 1217 regcache_mark_dirty(chip->regmap); 1218 ret = pca953x_regcache_sync(dev); 1219 if (ret) 1220 return ret; 1221 1222 ret = regcache_sync(chip->regmap); 1223 if (ret) { 1224 dev_err(dev, "Failed to restore register map: %d\n", ret); 1225 return ret; 1226 } 1227 1228 return 0; 1229 } 1230 #endif 1231 1232 /* convenience to stop overlong match-table lines */ 1233 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int) 1234 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int) 1235 1236 static const struct of_device_id pca953x_dt_ids[] = { 1237 { .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), }, 1238 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), }, 1239 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), }, 1240 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), }, 1241 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), }, 1242 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), }, 1243 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), }, 1244 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), }, 1245 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), }, 1246 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), }, 1247 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), }, 1248 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), }, 1249 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), }, 1250 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), }, 1251 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), }, 1252 1253 { .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), }, 1254 { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), }, 1255 { .compatible = "nxp,pcal9535", .data = OF_953X(16, PCA_LATCH_INT), }, 1256 { .compatible = "nxp,pcal9554b", .data = OF_953X( 8, PCA_LATCH_INT), }, 1257 { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), }, 1258 1259 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), }, 1260 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), }, 1261 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), }, 1262 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), }, 1263 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), }, 1264 1265 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), }, 1266 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), }, 1267 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), }, 1268 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), }, 1269 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), }, 1270 { .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), }, 1271 1272 { .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), }, 1273 { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), }, 1274 1275 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), }, 1276 { } 1277 }; 1278 1279 MODULE_DEVICE_TABLE(of, pca953x_dt_ids); 1280 1281 static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume); 1282 1283 static struct i2c_driver pca953x_driver = { 1284 .driver = { 1285 .name = "pca953x", 1286 .pm = &pca953x_pm_ops, 1287 .of_match_table = pca953x_dt_ids, 1288 .acpi_match_table = pca953x_acpi_ids, 1289 }, 1290 .probe = pca953x_probe, 1291 .remove = pca953x_remove, 1292 .id_table = pca953x_id, 1293 }; 1294 1295 static int __init pca953x_init(void) 1296 { 1297 return i2c_add_driver(&pca953x_driver); 1298 } 1299 /* register after i2c postcore initcall and before 1300 * subsys initcalls that may rely on these GPIOs 1301 */ 1302 subsys_initcall(pca953x_init); 1303 1304 static void __exit pca953x_exit(void) 1305 { 1306 i2c_del_driver(&pca953x_driver); 1307 } 1308 module_exit(pca953x_exit); 1309 1310 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>"); 1311 MODULE_DESCRIPTION("GPIO expander driver for PCA953x"); 1312 MODULE_LICENSE("GPL"); 1313