xref: /openbmc/linux/drivers/gpio/gpio-pca953x.c (revision 089a49b6)
1 /*
2  *  PCA953x 4/8/16 bit I/O ports
3  *
4  *  Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
5  *  Copyright (C) 2007 Marvell International Ltd.
6  *
7  *  Derived from drivers/i2c/chips/pca9539.c
8  *
9  *  This program is free software; you can redistribute it and/or modify
10  *  it under the terms of the GNU General Public License as published by
11  *  the Free Software Foundation; version 2 of the License.
12  */
13 
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/gpio.h>
17 #include <linux/interrupt.h>
18 #include <linux/irq.h>
19 #include <linux/irqdomain.h>
20 #include <linux/i2c.h>
21 #include <linux/platform_data/pca953x.h>
22 #include <linux/slab.h>
23 #ifdef CONFIG_OF_GPIO
24 #include <linux/of_platform.h>
25 #endif
26 
27 #define PCA953X_INPUT		0
28 #define PCA953X_OUTPUT		1
29 #define PCA953X_INVERT		2
30 #define PCA953X_DIRECTION	3
31 
32 #define REG_ADDR_AI		0x80
33 
34 #define PCA957X_IN		0
35 #define PCA957X_INVRT		1
36 #define PCA957X_BKEN		2
37 #define PCA957X_PUPD		3
38 #define PCA957X_CFG		4
39 #define PCA957X_OUT		5
40 #define PCA957X_MSK		6
41 #define PCA957X_INTS		7
42 
43 #define PCA_GPIO_MASK		0x00FF
44 #define PCA_INT			0x0100
45 #define PCA953X_TYPE		0x1000
46 #define PCA957X_TYPE		0x2000
47 
48 static const struct i2c_device_id pca953x_id[] = {
49 	{ "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
50 	{ "pca9534", 8  | PCA953X_TYPE | PCA_INT, },
51 	{ "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
52 	{ "pca9536", 4  | PCA953X_TYPE, },
53 	{ "pca9537", 4  | PCA953X_TYPE | PCA_INT, },
54 	{ "pca9538", 8  | PCA953X_TYPE | PCA_INT, },
55 	{ "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
56 	{ "pca9554", 8  | PCA953X_TYPE | PCA_INT, },
57 	{ "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
58 	{ "pca9556", 8  | PCA953X_TYPE, },
59 	{ "pca9557", 8  | PCA953X_TYPE, },
60 	{ "pca9574", 8  | PCA957X_TYPE | PCA_INT, },
61 	{ "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
62 
63 	{ "max7310", 8  | PCA953X_TYPE, },
64 	{ "max7312", 16 | PCA953X_TYPE | PCA_INT, },
65 	{ "max7313", 16 | PCA953X_TYPE | PCA_INT, },
66 	{ "max7315", 8  | PCA953X_TYPE | PCA_INT, },
67 	{ "pca6107", 8  | PCA953X_TYPE | PCA_INT, },
68 	{ "tca6408", 8  | PCA953X_TYPE | PCA_INT, },
69 	{ "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
70 	{ "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
71 	{ }
72 };
73 MODULE_DEVICE_TABLE(i2c, pca953x_id);
74 
75 #define MAX_BANK 5
76 #define BANK_SZ 8
77 
78 #define NBANK(chip) (chip->gpio_chip.ngpio / BANK_SZ)
79 
80 struct pca953x_chip {
81 	unsigned gpio_start;
82 	u8 reg_output[MAX_BANK];
83 	u8 reg_direction[MAX_BANK];
84 	struct mutex i2c_lock;
85 
86 #ifdef CONFIG_GPIO_PCA953X_IRQ
87 	struct mutex irq_lock;
88 	u8 irq_mask[MAX_BANK];
89 	u8 irq_stat[MAX_BANK];
90 	u8 irq_trig_raise[MAX_BANK];
91 	u8 irq_trig_fall[MAX_BANK];
92 	struct irq_domain *domain;
93 #endif
94 
95 	struct i2c_client *client;
96 	struct gpio_chip gpio_chip;
97 	const char *const *names;
98 	int	chip_type;
99 };
100 
101 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
102 				int off)
103 {
104 	int ret;
105 	int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
106 	int offset = off / BANK_SZ;
107 
108 	ret = i2c_smbus_read_byte_data(chip->client,
109 				(reg << bank_shift) + offset);
110 	*val = ret;
111 
112 	if (ret < 0) {
113 		dev_err(&chip->client->dev, "failed reading register\n");
114 		return ret;
115 	}
116 
117 	return 0;
118 }
119 
120 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
121 				int off)
122 {
123 	int ret = 0;
124 	int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
125 	int offset = off / BANK_SZ;
126 
127 	ret = i2c_smbus_write_byte_data(chip->client,
128 					(reg << bank_shift) + offset, val);
129 
130 	if (ret < 0) {
131 		dev_err(&chip->client->dev, "failed writing register\n");
132 		return ret;
133 	}
134 
135 	return 0;
136 }
137 
138 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
139 {
140 	int ret = 0;
141 
142 	if (chip->gpio_chip.ngpio <= 8)
143 		ret = i2c_smbus_write_byte_data(chip->client, reg, *val);
144 	else if (chip->gpio_chip.ngpio >= 24) {
145 		int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
146 		ret = i2c_smbus_write_i2c_block_data(chip->client,
147 					(reg << bank_shift) | REG_ADDR_AI,
148 					NBANK(chip), val);
149 	} else {
150 		switch (chip->chip_type) {
151 		case PCA953X_TYPE:
152 			ret = i2c_smbus_write_word_data(chip->client,
153 							reg << 1, (u16) *val);
154 			break;
155 		case PCA957X_TYPE:
156 			ret = i2c_smbus_write_byte_data(chip->client, reg << 1,
157 							val[0]);
158 			if (ret < 0)
159 				break;
160 			ret = i2c_smbus_write_byte_data(chip->client,
161 							(reg << 1) + 1,
162 							val[1]);
163 			break;
164 		}
165 	}
166 
167 	if (ret < 0) {
168 		dev_err(&chip->client->dev, "failed writing register\n");
169 		return ret;
170 	}
171 
172 	return 0;
173 }
174 
175 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
176 {
177 	int ret;
178 
179 	if (chip->gpio_chip.ngpio <= 8) {
180 		ret = i2c_smbus_read_byte_data(chip->client, reg);
181 		*val = ret;
182 	} else if (chip->gpio_chip.ngpio >= 24) {
183 		int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
184 
185 		ret = i2c_smbus_read_i2c_block_data(chip->client,
186 					(reg << bank_shift) | REG_ADDR_AI,
187 					NBANK(chip), val);
188 	} else {
189 		ret = i2c_smbus_read_word_data(chip->client, reg << 1);
190 		val[0] = (u16)ret & 0xFF;
191 		val[1] = (u16)ret >> 8;
192 	}
193 	if (ret < 0) {
194 		dev_err(&chip->client->dev, "failed reading register\n");
195 		return ret;
196 	}
197 
198 	return 0;
199 }
200 
201 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
202 {
203 	struct pca953x_chip *chip;
204 	u8 reg_val;
205 	int ret, offset = 0;
206 
207 	chip = container_of(gc, struct pca953x_chip, gpio_chip);
208 
209 	mutex_lock(&chip->i2c_lock);
210 	reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
211 
212 	switch (chip->chip_type) {
213 	case PCA953X_TYPE:
214 		offset = PCA953X_DIRECTION;
215 		break;
216 	case PCA957X_TYPE:
217 		offset = PCA957X_CFG;
218 		break;
219 	}
220 	ret = pca953x_write_single(chip, offset, reg_val, off);
221 	if (ret)
222 		goto exit;
223 
224 	chip->reg_direction[off / BANK_SZ] = reg_val;
225 	ret = 0;
226 exit:
227 	mutex_unlock(&chip->i2c_lock);
228 	return ret;
229 }
230 
231 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
232 		unsigned off, int val)
233 {
234 	struct pca953x_chip *chip;
235 	u8 reg_val;
236 	int ret, offset = 0;
237 
238 	chip = container_of(gc, struct pca953x_chip, gpio_chip);
239 
240 	mutex_lock(&chip->i2c_lock);
241 	/* set output level */
242 	if (val)
243 		reg_val = chip->reg_output[off / BANK_SZ]
244 			| (1u << (off % BANK_SZ));
245 	else
246 		reg_val = chip->reg_output[off / BANK_SZ]
247 			& ~(1u << (off % BANK_SZ));
248 
249 	switch (chip->chip_type) {
250 	case PCA953X_TYPE:
251 		offset = PCA953X_OUTPUT;
252 		break;
253 	case PCA957X_TYPE:
254 		offset = PCA957X_OUT;
255 		break;
256 	}
257 	ret = pca953x_write_single(chip, offset, reg_val, off);
258 	if (ret)
259 		goto exit;
260 
261 	chip->reg_output[off / BANK_SZ] = reg_val;
262 
263 	/* then direction */
264 	reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
265 	switch (chip->chip_type) {
266 	case PCA953X_TYPE:
267 		offset = PCA953X_DIRECTION;
268 		break;
269 	case PCA957X_TYPE:
270 		offset = PCA957X_CFG;
271 		break;
272 	}
273 	ret = pca953x_write_single(chip, offset, reg_val, off);
274 	if (ret)
275 		goto exit;
276 
277 	chip->reg_direction[off / BANK_SZ] = reg_val;
278 	ret = 0;
279 exit:
280 	mutex_unlock(&chip->i2c_lock);
281 	return ret;
282 }
283 
284 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
285 {
286 	struct pca953x_chip *chip;
287 	u32 reg_val;
288 	int ret, offset = 0;
289 
290 	chip = container_of(gc, struct pca953x_chip, gpio_chip);
291 
292 	mutex_lock(&chip->i2c_lock);
293 	switch (chip->chip_type) {
294 	case PCA953X_TYPE:
295 		offset = PCA953X_INPUT;
296 		break;
297 	case PCA957X_TYPE:
298 		offset = PCA957X_IN;
299 		break;
300 	}
301 	ret = pca953x_read_single(chip, offset, &reg_val, off);
302 	mutex_unlock(&chip->i2c_lock);
303 	if (ret < 0) {
304 		/* NOTE:  diagnostic already emitted; that's all we should
305 		 * do unless gpio_*_value_cansleep() calls become different
306 		 * from their nonsleeping siblings (and report faults).
307 		 */
308 		return 0;
309 	}
310 
311 	return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0;
312 }
313 
314 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
315 {
316 	struct pca953x_chip *chip;
317 	u8 reg_val;
318 	int ret, offset = 0;
319 
320 	chip = container_of(gc, struct pca953x_chip, gpio_chip);
321 
322 	mutex_lock(&chip->i2c_lock);
323 	if (val)
324 		reg_val = chip->reg_output[off / BANK_SZ]
325 			| (1u << (off % BANK_SZ));
326 	else
327 		reg_val = chip->reg_output[off / BANK_SZ]
328 			& ~(1u << (off % BANK_SZ));
329 
330 	switch (chip->chip_type) {
331 	case PCA953X_TYPE:
332 		offset = PCA953X_OUTPUT;
333 		break;
334 	case PCA957X_TYPE:
335 		offset = PCA957X_OUT;
336 		break;
337 	}
338 	ret = pca953x_write_single(chip, offset, reg_val, off);
339 	if (ret)
340 		goto exit;
341 
342 	chip->reg_output[off / BANK_SZ] = reg_val;
343 exit:
344 	mutex_unlock(&chip->i2c_lock);
345 }
346 
347 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
348 {
349 	struct gpio_chip *gc;
350 
351 	gc = &chip->gpio_chip;
352 
353 	gc->direction_input  = pca953x_gpio_direction_input;
354 	gc->direction_output = pca953x_gpio_direction_output;
355 	gc->get = pca953x_gpio_get_value;
356 	gc->set = pca953x_gpio_set_value;
357 	gc->can_sleep = 1;
358 
359 	gc->base = chip->gpio_start;
360 	gc->ngpio = gpios;
361 	gc->label = chip->client->name;
362 	gc->dev = &chip->client->dev;
363 	gc->owner = THIS_MODULE;
364 	gc->names = chip->names;
365 }
366 
367 #ifdef CONFIG_GPIO_PCA953X_IRQ
368 static int pca953x_gpio_to_irq(struct gpio_chip *gc, unsigned off)
369 {
370 	struct pca953x_chip *chip;
371 
372 	chip = container_of(gc, struct pca953x_chip, gpio_chip);
373 	return irq_create_mapping(chip->domain, off);
374 }
375 
376 static void pca953x_irq_mask(struct irq_data *d)
377 {
378 	struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
379 
380 	chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
381 }
382 
383 static void pca953x_irq_unmask(struct irq_data *d)
384 {
385 	struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
386 
387 	chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
388 }
389 
390 static void pca953x_irq_bus_lock(struct irq_data *d)
391 {
392 	struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
393 
394 	mutex_lock(&chip->irq_lock);
395 }
396 
397 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
398 {
399 	struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
400 	u8 new_irqs;
401 	int level, i;
402 
403 	/* Look for any newly setup interrupt */
404 	for (i = 0; i < NBANK(chip); i++) {
405 		new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
406 		new_irqs &= ~chip->reg_direction[i];
407 
408 		while (new_irqs) {
409 			level = __ffs(new_irqs);
410 			pca953x_gpio_direction_input(&chip->gpio_chip,
411 							level + (BANK_SZ * i));
412 			new_irqs &= ~(1 << level);
413 		}
414 	}
415 
416 	mutex_unlock(&chip->irq_lock);
417 }
418 
419 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
420 {
421 	struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
422 	int bank_nb = d->hwirq / BANK_SZ;
423 	u8 mask = 1 << (d->hwirq % BANK_SZ);
424 
425 	if (!(type & IRQ_TYPE_EDGE_BOTH)) {
426 		dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
427 			d->irq, type);
428 		return -EINVAL;
429 	}
430 
431 	if (type & IRQ_TYPE_EDGE_FALLING)
432 		chip->irq_trig_fall[bank_nb] |= mask;
433 	else
434 		chip->irq_trig_fall[bank_nb] &= ~mask;
435 
436 	if (type & IRQ_TYPE_EDGE_RISING)
437 		chip->irq_trig_raise[bank_nb] |= mask;
438 	else
439 		chip->irq_trig_raise[bank_nb] &= ~mask;
440 
441 	return 0;
442 }
443 
444 static struct irq_chip pca953x_irq_chip = {
445 	.name			= "pca953x",
446 	.irq_mask		= pca953x_irq_mask,
447 	.irq_unmask		= pca953x_irq_unmask,
448 	.irq_bus_lock		= pca953x_irq_bus_lock,
449 	.irq_bus_sync_unlock	= pca953x_irq_bus_sync_unlock,
450 	.irq_set_type		= pca953x_irq_set_type,
451 };
452 
453 static u8 pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
454 {
455 	u8 cur_stat[MAX_BANK];
456 	u8 old_stat[MAX_BANK];
457 	u8 pendings = 0;
458 	u8 trigger[MAX_BANK], triggers = 0;
459 	int ret, i, offset = 0;
460 
461 	switch (chip->chip_type) {
462 	case PCA953X_TYPE:
463 		offset = PCA953X_INPUT;
464 		break;
465 	case PCA957X_TYPE:
466 		offset = PCA957X_IN;
467 		break;
468 	}
469 	ret = pca953x_read_regs(chip, offset, cur_stat);
470 	if (ret)
471 		return 0;
472 
473 	/* Remove output pins from the equation */
474 	for (i = 0; i < NBANK(chip); i++)
475 		cur_stat[i] &= chip->reg_direction[i];
476 
477 	memcpy(old_stat, chip->irq_stat, NBANK(chip));
478 
479 	for (i = 0; i < NBANK(chip); i++) {
480 		trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
481 		triggers += trigger[i];
482 	}
483 
484 	if (!triggers)
485 		return 0;
486 
487 	memcpy(chip->irq_stat, cur_stat, NBANK(chip));
488 
489 	for (i = 0; i < NBANK(chip); i++) {
490 		pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
491 			(cur_stat[i] & chip->irq_trig_raise[i]);
492 		pending[i] &= trigger[i];
493 		pendings += pending[i];
494 	}
495 
496 	return pendings;
497 }
498 
499 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
500 {
501 	struct pca953x_chip *chip = devid;
502 	u8 pending[MAX_BANK];
503 	u8 level;
504 	int i;
505 
506 	if (!pca953x_irq_pending(chip, pending))
507 		return IRQ_HANDLED;
508 
509 	for (i = 0; i < NBANK(chip); i++) {
510 		while (pending[i]) {
511 			level = __ffs(pending[i]);
512 			handle_nested_irq(irq_find_mapping(chip->domain,
513 							level + (BANK_SZ * i)));
514 			pending[i] &= ~(1 << level);
515 		}
516 	}
517 
518 	return IRQ_HANDLED;
519 }
520 
521 static int pca953x_gpio_irq_map(struct irq_domain *d, unsigned int irq,
522 		       irq_hw_number_t hwirq)
523 {
524 	irq_clear_status_flags(irq, IRQ_NOREQUEST);
525 	irq_set_chip_data(irq, d->host_data);
526 	irq_set_chip(irq, &pca953x_irq_chip);
527 	irq_set_nested_thread(irq, true);
528 #ifdef CONFIG_ARM
529 	set_irq_flags(irq, IRQF_VALID);
530 #else
531 	irq_set_noprobe(irq);
532 #endif
533 
534 	return 0;
535 }
536 
537 static const struct irq_domain_ops pca953x_irq_simple_ops = {
538 	.map = pca953x_gpio_irq_map,
539 	.xlate = irq_domain_xlate_twocell,
540 };
541 
542 static int pca953x_irq_setup(struct pca953x_chip *chip,
543 			     const struct i2c_device_id *id,
544 			     int irq_base)
545 {
546 	struct i2c_client *client = chip->client;
547 	int ret, i, offset = 0;
548 
549 	if (irq_base != -1
550 			&& (id->driver_data & PCA_INT)) {
551 
552 		switch (chip->chip_type) {
553 		case PCA953X_TYPE:
554 			offset = PCA953X_INPUT;
555 			break;
556 		case PCA957X_TYPE:
557 			offset = PCA957X_IN;
558 			break;
559 		}
560 		ret = pca953x_read_regs(chip, offset, chip->irq_stat);
561 		if (ret)
562 			return ret;
563 
564 		/*
565 		 * There is no way to know which GPIO line generated the
566 		 * interrupt.  We have to rely on the previous read for
567 		 * this purpose.
568 		 */
569 		for (i = 0; i < NBANK(chip); i++)
570 			chip->irq_stat[i] &= chip->reg_direction[i];
571 		mutex_init(&chip->irq_lock);
572 
573 		chip->domain = irq_domain_add_simple(client->dev.of_node,
574 						chip->gpio_chip.ngpio,
575 						irq_base,
576 						&pca953x_irq_simple_ops,
577 						chip);
578 		if (!chip->domain)
579 			return -ENODEV;
580 
581 		ret = devm_request_threaded_irq(&client->dev,
582 					client->irq,
583 					   NULL,
584 					   pca953x_irq_handler,
585 					   IRQF_TRIGGER_LOW | IRQF_ONESHOT,
586 					   dev_name(&client->dev), chip);
587 		if (ret) {
588 			dev_err(&client->dev, "failed to request irq %d\n",
589 				client->irq);
590 			return ret;
591 		}
592 
593 		chip->gpio_chip.to_irq = pca953x_gpio_to_irq;
594 	}
595 
596 	return 0;
597 }
598 
599 #else /* CONFIG_GPIO_PCA953X_IRQ */
600 static int pca953x_irq_setup(struct pca953x_chip *chip,
601 			     const struct i2c_device_id *id,
602 			     int irq_base)
603 {
604 	struct i2c_client *client = chip->client;
605 
606 	if (irq_base != -1 && (id->driver_data & PCA_INT))
607 		dev_warn(&client->dev, "interrupt support not compiled in\n");
608 
609 	return 0;
610 }
611 #endif
612 
613 /*
614  * Handlers for alternative sources of platform_data
615  */
616 #ifdef CONFIG_OF_GPIO
617 /*
618  * Translate OpenFirmware node properties into platform_data
619  * WARNING: This is DEPRECATED and will be removed eventually!
620  */
621 static void
622 pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, u32 *invert)
623 {
624 	struct device_node *node;
625 	const __be32 *val;
626 	int size;
627 
628 	node = client->dev.of_node;
629 	if (node == NULL)
630 		return;
631 
632 	*gpio_base = -1;
633 	val = of_get_property(node, "linux,gpio-base", &size);
634 	WARN(val, "%s: device-tree property 'linux,gpio-base' is deprecated!", __func__);
635 	if (val) {
636 		if (size != sizeof(*val))
637 			dev_warn(&client->dev, "%s: wrong linux,gpio-base\n",
638 				 node->full_name);
639 		else
640 			*gpio_base = be32_to_cpup(val);
641 	}
642 
643 	val = of_get_property(node, "polarity", NULL);
644 	WARN(val, "%s: device-tree property 'polarity' is deprecated!", __func__);
645 	if (val)
646 		*invert = *val;
647 }
648 #else
649 static void
650 pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, u32 *invert)
651 {
652 	*gpio_base = -1;
653 }
654 #endif
655 
656 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
657 {
658 	int ret;
659 	u8 val[MAX_BANK];
660 
661 	ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output);
662 	if (ret)
663 		goto out;
664 
665 	ret = pca953x_read_regs(chip, PCA953X_DIRECTION,
666 			       chip->reg_direction);
667 	if (ret)
668 		goto out;
669 
670 	/* set platform specific polarity inversion */
671 	if (invert)
672 		memset(val, 0xFF, NBANK(chip));
673 	else
674 		memset(val, 0, NBANK(chip));
675 
676 	ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
677 out:
678 	return ret;
679 }
680 
681 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
682 {
683 	int ret;
684 	u8 val[MAX_BANK];
685 
686 	/* Let every port in proper state, that could save power */
687 	memset(val, 0, NBANK(chip));
688 	pca953x_write_regs(chip, PCA957X_PUPD, val);
689 	memset(val, 0xFF, NBANK(chip));
690 	pca953x_write_regs(chip, PCA957X_CFG, val);
691 	memset(val, 0, NBANK(chip));
692 	pca953x_write_regs(chip, PCA957X_OUT, val);
693 
694 	ret = pca953x_read_regs(chip, PCA957X_IN, val);
695 	if (ret)
696 		goto out;
697 	ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output);
698 	if (ret)
699 		goto out;
700 	ret = pca953x_read_regs(chip, PCA957X_CFG, chip->reg_direction);
701 	if (ret)
702 		goto out;
703 
704 	/* set platform specific polarity inversion */
705 	if (invert)
706 		memset(val, 0xFF, NBANK(chip));
707 	else
708 		memset(val, 0, NBANK(chip));
709 	pca953x_write_regs(chip, PCA957X_INVRT, val);
710 
711 	/* To enable register 6, 7 to controll pull up and pull down */
712 	memset(val, 0x02, NBANK(chip));
713 	pca953x_write_regs(chip, PCA957X_BKEN, val);
714 
715 	return 0;
716 out:
717 	return ret;
718 }
719 
720 static int pca953x_probe(struct i2c_client *client,
721 				   const struct i2c_device_id *id)
722 {
723 	struct pca953x_platform_data *pdata;
724 	struct pca953x_chip *chip;
725 	int irq_base = 0;
726 	int ret;
727 	u32 invert = 0;
728 
729 	chip = devm_kzalloc(&client->dev,
730 			sizeof(struct pca953x_chip), GFP_KERNEL);
731 	if (chip == NULL)
732 		return -ENOMEM;
733 
734 	pdata = dev_get_platdata(&client->dev);
735 	if (pdata) {
736 		irq_base = pdata->irq_base;
737 		chip->gpio_start = pdata->gpio_base;
738 		invert = pdata->invert;
739 		chip->names = pdata->names;
740 	} else {
741 		pca953x_get_alt_pdata(client, &chip->gpio_start, &invert);
742 #ifdef CONFIG_OF_GPIO
743 		/* If I2C node has no interrupts property, disable GPIO interrupts */
744 		if (of_find_property(client->dev.of_node, "interrupts", NULL) == NULL)
745 			irq_base = -1;
746 #endif
747 	}
748 
749 	chip->client = client;
750 
751 	chip->chip_type = id->driver_data & (PCA953X_TYPE | PCA957X_TYPE);
752 
753 	mutex_init(&chip->i2c_lock);
754 
755 	/* initialize cached registers from their original values.
756 	 * we can't share this chip with another i2c master.
757 	 */
758 	pca953x_setup_gpio(chip, id->driver_data & PCA_GPIO_MASK);
759 
760 	if (chip->chip_type == PCA953X_TYPE)
761 		ret = device_pca953x_init(chip, invert);
762 	else
763 		ret = device_pca957x_init(chip, invert);
764 	if (ret)
765 		return ret;
766 
767 	ret = pca953x_irq_setup(chip, id, irq_base);
768 	if (ret)
769 		return ret;
770 
771 	ret = gpiochip_add(&chip->gpio_chip);
772 	if (ret)
773 		return ret;
774 
775 	if (pdata && pdata->setup) {
776 		ret = pdata->setup(client, chip->gpio_chip.base,
777 				chip->gpio_chip.ngpio, pdata->context);
778 		if (ret < 0)
779 			dev_warn(&client->dev, "setup failed, %d\n", ret);
780 	}
781 
782 	i2c_set_clientdata(client, chip);
783 	return 0;
784 }
785 
786 static int pca953x_remove(struct i2c_client *client)
787 {
788 	struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
789 	struct pca953x_chip *chip = i2c_get_clientdata(client);
790 	int ret = 0;
791 
792 	if (pdata && pdata->teardown) {
793 		ret = pdata->teardown(client, chip->gpio_chip.base,
794 				chip->gpio_chip.ngpio, pdata->context);
795 		if (ret < 0) {
796 			dev_err(&client->dev, "%s failed, %d\n",
797 					"teardown", ret);
798 			return ret;
799 		}
800 	}
801 
802 	ret = gpiochip_remove(&chip->gpio_chip);
803 	if (ret) {
804 		dev_err(&client->dev, "%s failed, %d\n",
805 				"gpiochip_remove()", ret);
806 		return ret;
807 	}
808 
809 	return 0;
810 }
811 
812 static const struct of_device_id pca953x_dt_ids[] = {
813 	{ .compatible = "nxp,pca9505", },
814 	{ .compatible = "nxp,pca9534", },
815 	{ .compatible = "nxp,pca9535", },
816 	{ .compatible = "nxp,pca9536", },
817 	{ .compatible = "nxp,pca9537", },
818 	{ .compatible = "nxp,pca9538", },
819 	{ .compatible = "nxp,pca9539", },
820 	{ .compatible = "nxp,pca9554", },
821 	{ .compatible = "nxp,pca9555", },
822 	{ .compatible = "nxp,pca9556", },
823 	{ .compatible = "nxp,pca9557", },
824 	{ .compatible = "nxp,pca9574", },
825 	{ .compatible = "nxp,pca9575", },
826 
827 	{ .compatible = "maxim,max7310", },
828 	{ .compatible = "maxim,max7312", },
829 	{ .compatible = "maxim,max7313", },
830 	{ .compatible = "maxim,max7315", },
831 
832 	{ .compatible = "ti,pca6107", },
833 	{ .compatible = "ti,tca6408", },
834 	{ .compatible = "ti,tca6416", },
835 	{ .compatible = "ti,tca6424", },
836 	{ }
837 };
838 
839 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
840 
841 static struct i2c_driver pca953x_driver = {
842 	.driver = {
843 		.name	= "pca953x",
844 		.of_match_table = pca953x_dt_ids,
845 	},
846 	.probe		= pca953x_probe,
847 	.remove		= pca953x_remove,
848 	.id_table	= pca953x_id,
849 };
850 
851 static int __init pca953x_init(void)
852 {
853 	return i2c_add_driver(&pca953x_driver);
854 }
855 /* register after i2c postcore initcall and before
856  * subsys initcalls that may rely on these GPIOs
857  */
858 subsys_initcall(pca953x_init);
859 
860 static void __exit pca953x_exit(void)
861 {
862 	i2c_del_driver(&pca953x_driver);
863 }
864 module_exit(pca953x_exit);
865 
866 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
867 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
868 MODULE_LICENSE("GPL");
869