18e8e69d6SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 20da094d8SJassi Brar /* 30da094d8SJassi Brar * linux/drivers/gpio/gpio-mb86s7x.c 40da094d8SJassi Brar * 50da094d8SJassi Brar * Copyright (C) 2015 Fujitsu Semiconductor Limited 60da094d8SJassi Brar * Copyright (C) 2015 Linaro Ltd. 70da094d8SJassi Brar */ 80da094d8SJassi Brar 9f3d705d5SArd Biesheuvel #include <linux/acpi.h> 100da094d8SJassi Brar #include <linux/io.h> 110da094d8SJassi Brar #include <linux/init.h> 120da094d8SJassi Brar #include <linux/clk.h> 13e1289dbaSArd Biesheuvel #include <linux/module.h> 140da094d8SJassi Brar #include <linux/err.h> 150da094d8SJassi Brar #include <linux/errno.h> 160da094d8SJassi Brar #include <linux/ioport.h> 170da094d8SJassi Brar #include <linux/of_device.h> 180da094d8SJassi Brar #include <linux/gpio/driver.h> 190da094d8SJassi Brar #include <linux/platform_device.h> 200da094d8SJassi Brar #include <linux/spinlock.h> 210da094d8SJassi Brar #include <linux/slab.h> 220da094d8SJassi Brar 23f3d705d5SArd Biesheuvel #include "gpiolib.h" 2477cb907aSAndy Shevchenko #include "gpiolib-acpi.h" 25f3d705d5SArd Biesheuvel 260da094d8SJassi Brar /* 270da094d8SJassi Brar * Only first 8bits of a register correspond to each pin, 280da094d8SJassi Brar * so there are 4 registers for 32 pins. 290da094d8SJassi Brar */ 300da094d8SJassi Brar #define PDR(x) (0x0 + x / 8 * 4) 310da094d8SJassi Brar #define DDR(x) (0x10 + x / 8 * 4) 320da094d8SJassi Brar #define PFR(x) (0x20 + x / 8 * 4) 330da094d8SJassi Brar 340da094d8SJassi Brar #define OFFSET(x) BIT((x) % 8) 350da094d8SJassi Brar 360da094d8SJassi Brar struct mb86s70_gpio_chip { 370da094d8SJassi Brar struct gpio_chip gc; 380da094d8SJassi Brar void __iomem *base; 390da094d8SJassi Brar struct clk *clk; 400da094d8SJassi Brar spinlock_t lock; 410da094d8SJassi Brar }; 420da094d8SJassi Brar 430da094d8SJassi Brar static int mb86s70_gpio_request(struct gpio_chip *gc, unsigned gpio) 440da094d8SJassi Brar { 4501f76b26SLinus Walleij struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc); 460da094d8SJassi Brar unsigned long flags; 470da094d8SJassi Brar u32 val; 480da094d8SJassi Brar 490da094d8SJassi Brar spin_lock_irqsave(&gchip->lock, flags); 500da094d8SJassi Brar 510da094d8SJassi Brar val = readl(gchip->base + PFR(gpio)); 520da094d8SJassi Brar val &= ~OFFSET(gpio); 530da094d8SJassi Brar writel(val, gchip->base + PFR(gpio)); 540da094d8SJassi Brar 550da094d8SJassi Brar spin_unlock_irqrestore(&gchip->lock, flags); 560da094d8SJassi Brar 570da094d8SJassi Brar return 0; 580da094d8SJassi Brar } 590da094d8SJassi Brar 600da094d8SJassi Brar static void mb86s70_gpio_free(struct gpio_chip *gc, unsigned gpio) 610da094d8SJassi Brar { 6201f76b26SLinus Walleij struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc); 630da094d8SJassi Brar unsigned long flags; 640da094d8SJassi Brar u32 val; 650da094d8SJassi Brar 660da094d8SJassi Brar spin_lock_irqsave(&gchip->lock, flags); 670da094d8SJassi Brar 680da094d8SJassi Brar val = readl(gchip->base + PFR(gpio)); 690da094d8SJassi Brar val |= OFFSET(gpio); 700da094d8SJassi Brar writel(val, gchip->base + PFR(gpio)); 710da094d8SJassi Brar 720da094d8SJassi Brar spin_unlock_irqrestore(&gchip->lock, flags); 730da094d8SJassi Brar } 740da094d8SJassi Brar 750da094d8SJassi Brar static int mb86s70_gpio_direction_input(struct gpio_chip *gc, unsigned gpio) 760da094d8SJassi Brar { 7701f76b26SLinus Walleij struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc); 780da094d8SJassi Brar unsigned long flags; 790da094d8SJassi Brar unsigned char val; 800da094d8SJassi Brar 810da094d8SJassi Brar spin_lock_irqsave(&gchip->lock, flags); 820da094d8SJassi Brar 830da094d8SJassi Brar val = readl(gchip->base + DDR(gpio)); 840da094d8SJassi Brar val &= ~OFFSET(gpio); 850da094d8SJassi Brar writel(val, gchip->base + DDR(gpio)); 860da094d8SJassi Brar 870da094d8SJassi Brar spin_unlock_irqrestore(&gchip->lock, flags); 880da094d8SJassi Brar 890da094d8SJassi Brar return 0; 900da094d8SJassi Brar } 910da094d8SJassi Brar 920da094d8SJassi Brar static int mb86s70_gpio_direction_output(struct gpio_chip *gc, 930da094d8SJassi Brar unsigned gpio, int value) 940da094d8SJassi Brar { 9501f76b26SLinus Walleij struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc); 960da094d8SJassi Brar unsigned long flags; 970da094d8SJassi Brar unsigned char val; 980da094d8SJassi Brar 990da094d8SJassi Brar spin_lock_irqsave(&gchip->lock, flags); 1000da094d8SJassi Brar 1010da094d8SJassi Brar val = readl(gchip->base + PDR(gpio)); 1020da094d8SJassi Brar if (value) 1030da094d8SJassi Brar val |= OFFSET(gpio); 1040da094d8SJassi Brar else 1050da094d8SJassi Brar val &= ~OFFSET(gpio); 1060da094d8SJassi Brar writel(val, gchip->base + PDR(gpio)); 1070da094d8SJassi Brar 1080da094d8SJassi Brar val = readl(gchip->base + DDR(gpio)); 1090da094d8SJassi Brar val |= OFFSET(gpio); 1100da094d8SJassi Brar writel(val, gchip->base + DDR(gpio)); 1110da094d8SJassi Brar 1120da094d8SJassi Brar spin_unlock_irqrestore(&gchip->lock, flags); 1130da094d8SJassi Brar 1140da094d8SJassi Brar return 0; 1150da094d8SJassi Brar } 1160da094d8SJassi Brar 1170da094d8SJassi Brar static int mb86s70_gpio_get(struct gpio_chip *gc, unsigned gpio) 1180da094d8SJassi Brar { 11901f76b26SLinus Walleij struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc); 1200da094d8SJassi Brar 1210da094d8SJassi Brar return !!(readl(gchip->base + PDR(gpio)) & OFFSET(gpio)); 1220da094d8SJassi Brar } 1230da094d8SJassi Brar 1240da094d8SJassi Brar static void mb86s70_gpio_set(struct gpio_chip *gc, unsigned gpio, int value) 1250da094d8SJassi Brar { 12601f76b26SLinus Walleij struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc); 1270da094d8SJassi Brar unsigned long flags; 1280da094d8SJassi Brar unsigned char val; 1290da094d8SJassi Brar 1300da094d8SJassi Brar spin_lock_irqsave(&gchip->lock, flags); 1310da094d8SJassi Brar 1320da094d8SJassi Brar val = readl(gchip->base + PDR(gpio)); 1330da094d8SJassi Brar if (value) 1340da094d8SJassi Brar val |= OFFSET(gpio); 1350da094d8SJassi Brar else 1360da094d8SJassi Brar val &= ~OFFSET(gpio); 1370da094d8SJassi Brar writel(val, gchip->base + PDR(gpio)); 1380da094d8SJassi Brar 1390da094d8SJassi Brar spin_unlock_irqrestore(&gchip->lock, flags); 1400da094d8SJassi Brar } 1410da094d8SJassi Brar 142f3d705d5SArd Biesheuvel static int mb86s70_gpio_to_irq(struct gpio_chip *gc, unsigned int offset) 143f3d705d5SArd Biesheuvel { 144f3d705d5SArd Biesheuvel int irq, index; 145f3d705d5SArd Biesheuvel 146f3d705d5SArd Biesheuvel for (index = 0;; index++) { 147f3d705d5SArd Biesheuvel irq = platform_get_irq(to_platform_device(gc->parent), index); 148db67aa33SAndy Shevchenko if (irq < 0) 149db67aa33SAndy Shevchenko return irq; 150db67aa33SAndy Shevchenko if (irq == 0) 151f3d705d5SArd Biesheuvel break; 152f3d705d5SArd Biesheuvel if (irq_get_irq_data(irq)->hwirq == offset) 153f3d705d5SArd Biesheuvel return irq; 154f3d705d5SArd Biesheuvel } 155f3d705d5SArd Biesheuvel return -EINVAL; 156f3d705d5SArd Biesheuvel } 157f3d705d5SArd Biesheuvel 1580da094d8SJassi Brar static int mb86s70_gpio_probe(struct platform_device *pdev) 1590da094d8SJassi Brar { 1600da094d8SJassi Brar struct mb86s70_gpio_chip *gchip; 1610da094d8SJassi Brar int ret; 1620da094d8SJassi Brar 1630da094d8SJassi Brar gchip = devm_kzalloc(&pdev->dev, sizeof(*gchip), GFP_KERNEL); 1640da094d8SJassi Brar if (gchip == NULL) 1650da094d8SJassi Brar return -ENOMEM; 1660da094d8SJassi Brar 1670da094d8SJassi Brar platform_set_drvdata(pdev, gchip); 1680da094d8SJassi Brar 169329e23f9SEnrico Weigelt, metux IT consult gchip->base = devm_platform_ioremap_resource(pdev, 0); 1700da094d8SJassi Brar if (IS_ERR(gchip->base)) 1710da094d8SJassi Brar return PTR_ERR(gchip->base); 1720da094d8SJassi Brar 173672de527SAndy Shevchenko gchip->clk = devm_clk_get_optional(&pdev->dev, NULL); 1740da094d8SJassi Brar if (IS_ERR(gchip->clk)) 1750da094d8SJassi Brar return PTR_ERR(gchip->clk); 1760da094d8SJassi Brar 177d829b37aSArvind Yadav ret = clk_prepare_enable(gchip->clk); 178d829b37aSArvind Yadav if (ret) 179d829b37aSArvind Yadav return ret; 1800da094d8SJassi Brar 1810da094d8SJassi Brar spin_lock_init(&gchip->lock); 1820da094d8SJassi Brar 1830da094d8SJassi Brar gchip->gc.direction_output = mb86s70_gpio_direction_output; 1840da094d8SJassi Brar gchip->gc.direction_input = mb86s70_gpio_direction_input; 1850da094d8SJassi Brar gchip->gc.request = mb86s70_gpio_request; 1860da094d8SJassi Brar gchip->gc.free = mb86s70_gpio_free; 1870da094d8SJassi Brar gchip->gc.get = mb86s70_gpio_get; 1880da094d8SJassi Brar gchip->gc.set = mb86s70_gpio_set; 189db67aa33SAndy Shevchenko gchip->gc.to_irq = mb86s70_gpio_to_irq; 1900da094d8SJassi Brar gchip->gc.label = dev_name(&pdev->dev); 1910da094d8SJassi Brar gchip->gc.ngpio = 32; 1920da094d8SJassi Brar gchip->gc.owner = THIS_MODULE; 19358383c78SLinus Walleij gchip->gc.parent = &pdev->dev; 1940da094d8SJassi Brar gchip->gc.base = -1; 1950da094d8SJassi Brar 19601f76b26SLinus Walleij ret = gpiochip_add_data(&gchip->gc, gchip); 1970da094d8SJassi Brar if (ret) { 1980da094d8SJassi Brar dev_err(&pdev->dev, "couldn't register gpio driver\n"); 1990da094d8SJassi Brar clk_disable_unprepare(gchip->clk); 200f3d705d5SArd Biesheuvel return ret; 2010da094d8SJassi Brar } 2020da094d8SJassi Brar 203f3d705d5SArd Biesheuvel acpi_gpiochip_request_interrupts(&gchip->gc); 204f3d705d5SArd Biesheuvel 205f3d705d5SArd Biesheuvel return 0; 2060da094d8SJassi Brar } 2070da094d8SJassi Brar 2080da094d8SJassi Brar static int mb86s70_gpio_remove(struct platform_device *pdev) 2090da094d8SJassi Brar { 2100da094d8SJassi Brar struct mb86s70_gpio_chip *gchip = platform_get_drvdata(pdev); 2110da094d8SJassi Brar 212f3d705d5SArd Biesheuvel acpi_gpiochip_free_interrupts(&gchip->gc); 2130da094d8SJassi Brar gpiochip_remove(&gchip->gc); 2140da094d8SJassi Brar clk_disable_unprepare(gchip->clk); 2150da094d8SJassi Brar 2160da094d8SJassi Brar return 0; 2170da094d8SJassi Brar } 2180da094d8SJassi Brar 2190da094d8SJassi Brar static const struct of_device_id mb86s70_gpio_dt_ids[] = { 2200da094d8SJassi Brar { .compatible = "fujitsu,mb86s70-gpio" }, 2210da094d8SJassi Brar { /* sentinel */ } 2220da094d8SJassi Brar }; 223e1289dbaSArd Biesheuvel MODULE_DEVICE_TABLE(of, mb86s70_gpio_dt_ids); 2240da094d8SJassi Brar 225f3d705d5SArd Biesheuvel #ifdef CONFIG_ACPI 226f3d705d5SArd Biesheuvel static const struct acpi_device_id mb86s70_gpio_acpi_ids[] = { 227f3d705d5SArd Biesheuvel { "SCX0007" }, 228f3d705d5SArd Biesheuvel { /* sentinel */ } 229f3d705d5SArd Biesheuvel }; 230f3d705d5SArd Biesheuvel MODULE_DEVICE_TABLE(acpi, mb86s70_gpio_acpi_ids); 231f3d705d5SArd Biesheuvel #endif 232f3d705d5SArd Biesheuvel 2330da094d8SJassi Brar static struct platform_driver mb86s70_gpio_driver = { 2340da094d8SJassi Brar .driver = { 2350da094d8SJassi Brar .name = "mb86s70-gpio", 2360da094d8SJassi Brar .of_match_table = mb86s70_gpio_dt_ids, 237f3d705d5SArd Biesheuvel .acpi_match_table = ACPI_PTR(mb86s70_gpio_acpi_ids), 2380da094d8SJassi Brar }, 2390da094d8SJassi Brar .probe = mb86s70_gpio_probe, 2400da094d8SJassi Brar .remove = mb86s70_gpio_remove, 2410da094d8SJassi Brar }; 242e1289dbaSArd Biesheuvel module_platform_driver(mb86s70_gpio_driver); 2430da094d8SJassi Brar 244e1289dbaSArd Biesheuvel MODULE_DESCRIPTION("MB86S7x GPIO Driver"); 245e1289dbaSArd Biesheuvel MODULE_ALIAS("platform:mb86s70-gpio"); 246e1289dbaSArd Biesheuvel MODULE_LICENSE("GPL"); 247